06 May, 2020
40 commits
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Add QSPI NOR relavant configurations and QSPI clock init to board
codesSigned-off-by: Ye Li
(cherry picked from commit c55c3db3d2d61c902cd68e9fee9de9b9750b946f) -
Update defconfig to enable TMU for i.MX8M EVK board.
Signed-off-by: Ye Li
(cherry picked from commit 339bc1a3a377d52c027ccdb146fe7f1cd0c28882)
(cherry picked from commit e6e05cb1d56e8a5c7ad9d738d121085e7162a5fa) -
Current cpu info common function in imx-common only supports imx-thermal, update
the codes to also support TMU.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 878a4ff40987742a30cf8990b2da98205fd6cff5)
(cherry picked from commit be6ab22634214f36716c239413b9203ab1123376)
(cherry picked from commit e4131272acf3b3ef4f9f5949e50fab9ae7c3b116) -
Porting the TMU driver from kernel and supporting DM in the driver.
Users need to provide the TMU node and sensors nodes in DTB.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit f883de99b93de8c2fadd382d8cf961667bacd038)
(cherry picked from commit 8e09d0f0ab33d9a52098546b147d41c4c2598c0d)
(cherry picked from commit 327d5a951adde39428eeab877a85fe43b51977aa) -
i.MX8MQ EVK has two USB ports, the port 0 is typec, the port 1 is host.
This patch enables both device and host mode (xhci) for typec port by setting tcpc
to relevant UFP/DFP mode. For port 1, it is only supports the host mode (xhci).PD charge is enabled at default on typec port for the dead battery. In this case,
the typec port only works in device mode.Signed-off-by: Ye Li
(cherry picked from commit 27345e2b5e85c11b361dffda37172ad1f141d7ba)
(cherry picked from commit a1fca2fec215aca9cac700bbd40eff6f0bed94fc) -
Since the CONFIG_BLK is defined by DM MMC, to support USB storage,
we have to use DM USB. Add the basic DM support for xhci-imx8m driver.
Also update DTSi to add USB alias seq.Signed-off-by: Ye Li
(cherry picked from commit bff4001d090fabf76d0a9a2060c0dc1386b3cab8)
(cherry picked from commit eb7927f1ffbe57b86adaf18bc34ac848428427f3) -
imx8mq usb xhci is a dwc3 based controller, its synopsys PHY
can be controlled by usbmix glue layer. imx8mq has 2 USB3 instance,
this patch enables both two USB3 controllers.Reviewed-by : Peng Fan
Signed-off-by: Li Jun(cherry picked from commit cb77028d960277df2dc357a86e6851da74924c1a)
Signed-off-by: Ye Li
(cherry picked from commit 5a6326b0498115ca524537d5695ccd582d335157)
(cherry picked from commit 4d2664a31ef2b45e6cd3ef6fbb83d81ea04b555e) -
ATF will power off all PUs at default, so for USB, we enable
its PU power for both host and device modes in board_usb_init and
disable the power when usb is stop in board_usb_cleanup.This is only needed when power domain driver is disabled
Signed-off-by: Ye Li
Reviewed-by: Li Jun
(cherry picked from commit 20e8f5ab5e18fa578283ad232e500a47e71fdd28)
(cherry picked from commit 9eb9b42c0acc42f46deba696da63582a4a32a9fb) -
Some dwc3 based USB3 IP may have a wrong default suspend clk
setting, so add an interface to correct it by board setting.Acked-by: Peng Fan
Signed-off-by: Li Jun
(cherry picked from commit 240b636718313e03db505a713e66e3f893cb7727)
(cherry picked from commit ac64f460533f734ac5b2659f8e8ba9fbdd56e539)
(cherry picked from commit 45cf59ff70696a147e39034c6b8418cb687c9f84) -
Print out atf commit in U-Boot.
Signed-off-by: Peng Fan
(cherry picked from commit df89948806c38e38119767a67ef0e18f24ac886b)
(cherry picked from commit 3a17aa1659fbfe675b74ada60a481d93bb557cdc)
(cherry picked from commit 60780b360889a4366159d342dd7e197faf0d1ca2) -
We found USB issue when using super-speed for mfgtool, temporally work around
the problem to use high-speed only.Signed-off-by: Ye Li
Reviewed-by: Li Jun
(cherry picked from commit e31f99c05c37ac35080e415cfd8c8e2a1c96f865)
(cherry picked from commit 6134c7ee3967fe303bdb2bb7e981ac698b909c5d)
(cherry picked from commit 46f606811b9adfb5bff35ef487de31bae8109801) -
When booting for mfgtool, we need to disable DCSS and HDMI since the HDMI
firmware won't be loaded by mfgtool. Add the detect in u-boot and update the
DTB.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 1d01cec0296d56ba8436941864d8da81013e0732)
(cherry picked from commit 89512c1b28add9daf8001c51a44b9da826cbb9ad)
(cherry picked from commit 61d9b430f9a21754441923d9aea350a931f7f7a5) -
Only the GPR0 bit[13] is used as GPR_ENET1_TX_CLK_SEL, bit[17] is reserved
on imx8mq. So we don't need to clear bit[17].Add the definition of bit[13] in register file.
Also fix the size of gpr array, should be 48 not 47.Signed-off-by: Ye Li
(cherry picked from commit 528e88c4eef7dd27ef7ab223dd7935c164daa35c) -
Update thermal node properties, i2c pinmux, gpmi/apbh-dma nodes and
alias for mmc/usb/qspi.Remove unused memreserve for ATF
Signed-off-by: Ye Li
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Signed-off-by: Ye Li
(cherry picked from commit c8c5c3469f6ffa4789ae9e10c4a97c232657493c)
(cherry picked from commit ef9c92deaf636e044d61cf1f3cc4d9d1fa2de501) -
Add ENET no-DM support, CDNS USB3 host/gadget, M4 bootaux and memtest etc
Update some SPL configs:
1. Remove FIT support and enable TINY printf for saving SPL size.
2. Fix wrong SPL regulator driver enabled, show use fixed regulator not
gpio.
3. Add flexspi defconfig which uses SPI relevant SPL configs and disable
MMC, GPIO and regulator SPL drivers.
4. Enable the panic. Since we use PSCI to reset, but ATF is not boot when
SPL is running.
5. Use full malloc not simple malloc which has dedicated malloc pool
to support large pool size. The simple malloc size is also used by
early malloc which occupies the stack space. This causes we can't
have a large malloc poolSigned-off-by: Ye Li
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Add i2c alias for i2c mux bus, add mipi lvds i2c nodes, usbotg1, usbotg3,
fec, flexspi, and update iomux.Signed-off-by: Ye Li
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Add board codes and defconfig file for iMX8QM MEK board. Support
peripherals: UART, USB3 host/gadget, Flexspi, SD/eMMC, ENET, i2c.Signed-off-by: Ye Li
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Update DTS files for iMX8QM MEK board. Porting them from imx_v2019.04
u-bootSigned-off-by: Ye Li
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If without this flag, calling dev_power_domain_ctrl will iteratively remove
the power domain device will causes iteratively power off parent PD. This is
not expected by imx8-power-domain-legacy driver. Power off parent PD is
controlled by the driver internally.So set DM_FLAG_DEFAULT_PD_CTRL_OFF to avoid such issue
Signed-off-by: Ye Li
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The CONFIG_DEVRES is not a necessary config for pinctrl. We decouple the
dependence from the kconfig. So the DEVRES is not default enabled.When using USB gadget driver like CDNS3 or DWC3, without enabling gadget DM
driver, the calling to devm_kzalloc will cause crash if CONFIG_DEVRES is set.Signed-off-by: Ye Li
(cherry picked from commit baeed1c2a36c07126e35a3cdb34f4f392e88c939) -
Currently the driver gets value from PSR register, but this register
is only for input mode. For output mode, it always return 0 not the
value we set for output.This patch changes to use DR register, which returns the DR value for
output mode, and PSR value for input mode.Signed-off-by: Ye Li
(cherry picked from commit 4afc3f90943c6b117f79b66d2cd04e64f437b0c2)
(cherry picked from commit 8cca3efba0d508b2c267f8a32b302970dd05244d)
(cherry picked from commit 7980dc9700bdeb610cfa91b4b53abe450c688b9b) -
This patch aim at documenting USB related dt-bindings for the
Cadence USB controller.Signed-off-by: Sherry Sun
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The cdns3-usb-phy driver supports both host and peripheral
mode of usb driver which use cadence usb3 IP.Signed-off-by: Sherry Sun
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Add the USB3 host driver for NXP imx8 platform, and the
cadence IP is in it. The USB3 host driver support DM
mode, it will probe USB3 host node in dts.Signed-off-by: Sherry Sun
Signed-off-by: Ye Li -
This driver is ported from NXP i.MX U-Boot version imx_v2019.04
and some changes have also been made to adapt to U-Boot.Add the Cadence USB3 IP(CDNS3) driver for the gadget (device mode).
The CDNS3 gadget driver support DM mode. CONFIG_DM_USB_GADGET should
be enabled when use this driver.Signed-off-by: Sherry Sun
Signed-off-by: Ye Li -
Since some new fields in usb_ep structure been moved to usb_ss_ep.
The CDNS3 gadget driver should replies on this operation to bind the
usb_ss_ep with the endpoint descriptor when function layer uses
usb_ep_autoconfig to add endpoint descriptors to gadget. So that
CDNS3 driver can know the EP information and configure the EP once
the set configuration request is received.Signed-off-by: Sherry Sun
Signed-off-by: Ye Li -
Upstream version is an initial version, it can't be used directly.
We will use downstream version instead.Signed-off-by: Ye Li
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The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
this causes problem while CDNS3 USB controller index is 1.
Modify the API of fsg to pass the controller index.Signed-off-by: Ye Li
Reviewed-by: Jun Li
(cherry picked from commit c633b49f9140390323e5e6e16ba57b8531d964a3) -
Enable the UART0 LPCG clock in sc_pm_setup_uart for early print
not depending on the reset default value.Signed-off-by: Ye Li
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Make sure that all devices that are powered up by SPL are powered down
before entering into the u-boot. Otherwise the subsystem/device will never
be powered down by SCFW, due to SPL and u-boot are in different partitions.Benefiting from power domain driver, this patch implements the function
"power_off_pd_devices" to power off all active devices.Signed-off-by: Ye Li
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Signed-off-by: Ye Li
(cherry picked from commit e1b5acafb549eb8c09379e466151ddd358b48ad7) -
Add support for more clocks used by iMX8 from DTB:
ref_clock, tx_2x_clock, ahb_clock
And update get clock rate interface to support multiple fec ports.Signed-off-by: Ye Li
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Update imx8 clock driver to support LPCG and full clocks tree for some
modules aligned with kernel.We classify the clock into serveral types: slice, fixed, lpcg, gpr and mux.
Generally slice and fixed clocks are the sources. lpcg, gpr and mux are
the downstream of those sources and are used for gating, muxing or dividing
functions.This patch replaces the functions defined in imx8qm and imx8qxp with the clock
tables of different clock types. clk-imx8 use unified functions to process these
clock tables.Note: since the clock depends on the power domain of its resource, must power
on the resource firstly, then we can get the clock. Otherwise, we can't access lpcg.
Thus, the clock dump only works for the slice clock.Signed-off-by: Ye Li
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Add new API denitions for clock change.
Signed-off-by: Ye Li
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Each module may have one or more lpcg registers for SW/HW enabling its
clocks. Add lpcg register address and its driver for accessing lpcg.Signed-off-by: Ye Li
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Add return value check
Coverity 392391
Signed-off-by: Peng Fan
(cherry picked from commit 3f8052264b97b0bf87452876307ca115b7a518a3)
(cherry picked from commit edd2be5f4b978242bba403f97a9b7e4febbf9bab)
(cherry picked from commit d537b7077a34795941e7cb2bf00161f1cac00a6b) -
Implemented the clock enable and disable interfaces for CDNS3 USB
driver and EHCI-MX6 USB otg driver.Signed-off-by: Ye Li
Acked-by: Peter Chen
(cherry picked from commit 2f0dc4c503d8ac831fb809ec124e79712defae77)
(cherry picked from commit c7a808574b37557199bd2b17c963ec207854b801) -
When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the actual clock rate is just half of the expected clock.This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.Signed-off-by: Haibo Chen
Signed-off-by: Ye Li
(cherry picked from commit 2a8a0cf0f5d2fcb06d217e3d026219532fed5eb7)
(cherry picked from commit c340cddc28f7a314ae52add5d934c7194a83404c) -
Ported the tcpc driver for USB typec port controller from imx_v2019.04
The functionalities in this driver include:
1. USB power delivery support at dead battery
2. Support configure to UFP or DFP mode
3. Support callback to setup external PD switch. When PD process is enabled,
we call this function only when SINK_VBUS is enabled to avoid system power
shut down.Signed-off-by: Li Jun
Signed-off-by: Ye Li
