12 Jul, 2017
1 commit
-
Change is consistent with other SOCs and it is in preparation
for adding SOMs. SOC's related files are moved from cpu/ to
mach-imx/.This change is also coherent with the structure in kernel.
Signed-off-by: Stefano Babic
CC: Fabio Estevam
CC: Akshay Bhat
CC: Ken Lin
CC: Marek Vasut
CC: Heiko Schocher
CC: "Sébastien Szymanski"
CC: Christian Gmeiner
CC: Stefan Roese
CC: Patrick Bruenn
CC: Troy Kisky
CC: Nikita Kiryanov
CC: Otavio Salvador
CC: "Eric Bénard"
CC: Jagan Teki
CC: Ye Li
CC: Peng Fan
CC: Adrian Alonso
CC: Alison Wang
CC: Tim Harvey
CC: Martin Donnelly
CC: Marcin Niestroj
CC: Lukasz Majewski
CC: Adam Ford
CC: "Albert ARIBAUD (3ADEV)"
CC: Boris Brezillon
CC: Soeren Moch
CC: Richard Hu
CC: Wig Cheng
CC: Vanessa Maegima
CC: Max Krummenacher
CC: Stefan Agner
CC: Markus Niebel
CC: Breno Lima
CC: Francesco Montefoschi
CC: Jaehoon Chung
CC: Scott Wood
CC: Joe Hershberger
CC: Anatolij Gustschin
CC: Simon Glass
CC: "Andrew F. Davis"
CC: "Łukasz Majewski"
CC: Patrice Chotard
CC: Nobuhiro Iwamatsu
CC: Hans de Goede
CC: Masahiro Yamada
CC: Stephen Warren
CC: Andre Przywara
CC: "Álvaro Fernández Rojas"
CC: York Sun
CC: Xiaoliang Yang
CC: Chen-Yu Tsai
CC: George McCollister
CC: Sven Ebenfeld
CC: Filip Brozovic
CC: Petr Kulhavy
CC: Eric Nelson
CC: Bai Ping
CC: Anson Huang
CC: Sanchayan Maity
CC: Lokesh Vutla
CC: Patrick Delaunay
CC: Gary Bisson
CC: Alexander Graf
CC: u-boot@lists.denx.de
Reviewed-by: Fabio Estevam
Reviewed-by: Christian Gmeiner
24 Sep, 2016
1 commit
-
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap )Replace all include directives for with .
Signed-off-by: Masahiro Yamada
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini
12 Sep, 2015
1 commit
-
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.Signed-off-by: Simon Glass
27 Aug, 2013
1 commit
-
The chipselect must be written into the CTRL0 register after the SSP
block is reset, otherwise the block will always use ChipSelect #0.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Jagannadha Sutradharudu Teki
Cc: Otavio Salvador
Cc: Stefano Babic
Acked-by: Stefano Babic
24 Jul, 2013
1 commit
-
Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
22 Apr, 2013
1 commit
-
The following headers are moved to a i.MX common location:
- regs-common.h
- regs-apbh.h
- regs-bch.h
- regs-gpmi.h
- dma.hThis way this header can be re-used also by other i.MX platforms.
For example the i.MX6 which will need it for the upcoming NAND
support.Signed-off-by: Stefan Roese
Cc: Stefano Babic
Cc: Marek Vasut
Cc: Fabio Estevam
19 Mar, 2013
1 commit
-
Rather than each driver having its own way to allocate a SPI slave,
use the new allocation function everywhere. This will make it easier
to extend the interface without breaking drivers.Signed-off-by: Simon Glass
08 Mar, 2013
3 commits
-
The CONFIG_MXS_SPI_DMA_ENABLE is no longer relevant as the SPI DMA
has proven to work correctly. Remove this configuration option.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic -
The MX23 has slightly different register layout. Adjust the SPI
driver to match the layout, both the PIO and DMA part.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic -
This patch streamlines the differences between the MX23 and MX28 by
implementing a few helper functions to handle different DMA channel
mapping, different clock domain for SSP block and fixes a few minor
bugs.First of all, the DMA channel mapping is now fixed in dma.h by defining
the actual channel map for both MX23 and MX28. Thus, MX23 now does no
longer use MX28 channel map which was wrong. Also, there is a fix for
MX28 DMA channel map, where the last four channels were incorrect.Next, because correct DMA channel map is in place, the mxs_dma_init_channel()
call now bases the channel ID starting from SSP port #0. This removes the
need for DMA channel offset being added and cleans up the code. For the
same reason, the SSP0 offset can now be used in mxs_dma_desc_append(), thus
no need to adjust dma channel number in the driver either.Lastly, the SSP clock ID is now retrieved by calling mxs_ssp_clock_by_bus()
which handles the fact that MX23 has shared SSP clock for both ports, while
MX28 has per-port SSP clock.Finally, the mxs_ssp_bus_id_valid() pulls out two implementations of the
same functionality from MMC and SPI driver into common code.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
21 Jan, 2013
2 commits
-
Signed-off-by: Otavio Salvador
Cc: Fabio Estevam
Cc: Marek Vasut
Cc: Stefano Babic -
Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.Signed-off-by: Marek Vasut
Cc: Andy Fleming
Cc: Fabio Estevam
Cc: Stefano Babic
06 Sep, 2012
2 commits
-
It turns out that in order for the SPI DMA to properly support
continuous transfers longer than 65280 bytes, there are some very
important parts that were left out from the documentation.Firstly, the XFER_SIZE register is not written with the whole length
of a transfer, but is written by each and every chained descriptor
with the length of the descriptors data buffer.Next, unlike the demo code supplied by FSL, which only writes one PIO
word per descriptor, this does not apply if the descriptors are chained,
since the XFER_SIZE register must be written. Therefore, it is essential
to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
written with zero, since they don't apply. The DMA programs the PIO words
in an incrementing order, so four PIO words.Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
must not be set during the whole transfer, but it must be set only on the
last descriptor in the chain.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic -
This patch fixes dcache-related problem. The problem manifested
when dcache was enabled and the following command issued twice:mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000
The SHA1 checksum was correct during the first call. Yet with
every subsequent call of the above command, it differed and was
wrong.It turns out this was because of a race condition. On the first
time the command was called, no cacheline contained any data from
the destination memory location. The DMA transfered data into the
location and the cache above the location was invalidated. Then the
checksum was computed, but that meant the data were loaded into data
cache.On any subsequent call, the DMA again transfered data into the same
destination. Yet during the transfer, some of the DCache lines were
evicted and written back into the main memory. Once the DMA transfer
completed, the data cache was invalidated over the memory location as
usual. But the data that were to be loaded back into the data cache
by subsequent SHA1 checksuming were corrupted.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
01 Sep, 2012
7 commits
-
This change implements DMA chaining into SPI driver. This allows
the transfers to go much faster, while also fixing SF issues.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic -
Use calloc() instead of malloc() to allocate the mxs_spi_slave structure.
Clearing the memory is necessary since most of the time this gets done
super early in boot, but on warm reboots, and when SPI probing is done
long after the init stages it could actually pick up previously used memory,
and things like the chipselect polarity and other data end up being filled
with trash data if not explicitly set by the board files.This solves a semi-random, almost unreproducable error whereby SPI devices
act very, very strangly on boot.Signed-off-by: Matt Sealey
Acked-by: Stefano Babic -
The sys_proto.h functions (except the boot modes) are compatible with
i.MX233 and i.MX28 so we use 'mxs' prefix for its methods.Signed-off-by: Otavio Salvador
-
Signed-off-by: Otavio Salvador
-
The DMA transfers happen only if the transfered data are larger
than 512 bytes. Otherwise PIO is used. This is a small speed
optimization.The DMA transfer doesn't work if unaligned transfer is requested
due to the limitation of the DMA controller. This has to be fixed
by introducing generic bounce buffer. Therefore the DMA feature
is now disabled by default.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk -
Pull out all the PIO transfer logic into separate function,
so DMA can be added.Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk -
This makes it easier to adapt for addition of DMA support.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Otavio Salvador
Cc: Stefano Babic
Cc: Wolfgang Denk
15 May, 2012
2 commits
-
MXS SSP controller may have up to three chip selects per port: SS0, SS1 and SS2.
Currently only SS0 is supported in the mxs_spi driver.
Allow all the three chip select to work by selecting the desired one
in bits 20 and 21 of the HW_SSP_CTRL0 register.Signed-off-by: Fabio Estevam
Acked-by: Marek Vasut -
Introduce spi_cs_is_valid() for validating spi bus and chip select numbers.
Signed-off-by: Fabio Estevam
Acked-by: Marek Vasut
Acked-by: Mike Frysinger
27 Mar, 2012
1 commit
-
Instead of returning -1, it is preferred to return -ETIMEDOUT in case of timeouts.
Signed-off-by: Fabio Estevam
Acked-by: Marek Vasut
12 Feb, 2012
1 commit
-
The generic spi flash driver (drivers/mtd/spi/spi_flash.c) uses the
spi low level driver's spi_xfer() function with len=0 to deassert the
SPI flash' chip select. But the i.MX28 spi driver rejects this call
due to len=0.This patch implements an exception for len=0 with the SPI_XFER_END
flag set. This results in an extra read with the chip select being
deasserted afterwards. There seems to be no way to deassert the signal
by hand.Signed-off-by: Matthias Fuchs
Tested-by: Fabio Estevam
11 Nov, 2011
1 commit
-
Signed-off-by: Marek Vasut
Cc: Stefano Babic
Cc: Wolfgang Denk
Cc: Detlev Zundel
