15 May, 2015
4 commits
-
Short circuit the retry loop in legacy_hub_port_reset() by returning an
error from usb_control_msg() when a device was handed over to a companion
by the ehci code. This avoids trying to reset low / fullspeed devices 5
times needlessly. Also do not print an error when a device has been handed
over.Signed-off-by: Hans de Goede
-
Actually check for usb_set_port_feature() errors and propagate these if they
happen.Signed-off-by: Hans de Goede
-
Propagate the error returned by submit_control_msg() rather then always
returning -EIO when the hcd code indicates an error.Signed-off-by: Hans de Goede
-
When after a reset the port status connection bit is still set and the enable
bit is not then we're dealing with a full-speed device and should hand it over
to the companion controller.Signed-off-by: Hans de Goede
14 May, 2015
36 commits
-
With d6b72da0 we started including this file unconditionally. This
isn't allowed in a file that we also use on armv8. This will get
cleaned up a bit better once we really start using these same features
(and have similar fdt updates needed) on armv8.Signed-off-by: Tom Rini
-
The setexpr command used to segfault when accessing memory in sandbox.
The pointer accesses should be mapped.Signed-off-by: Joe Hershberger
Cc: Simon Glass
Reviewed-by: Simon Glass -
During the Kconfig conversion one of the changes was missed.
CONFIG_SPL_STACK_R should be CONFIG_SPL_STACK_R_ADDR since we want the
address.Reported-by: Tim Harvey
Signed-off-by: Simon Glass -
All the Tegra boards borrow the files from board/nvidia/common/
directory, i.e., board/nvidia/common/* are not vendor-common files,
but SoC-common files.Move NVIDIA common files to arch/arm/mach-tegra/ to clean up
Makefiles.As arch/arm/mach-tegra/board.c already exists, this commit renames
board/nvidia/common/board.c to arch/arm/mach-tegra/board2.c,
expecting they will be consolidated as a second step.Signed-off-by: Masahiro Yamada
Acked-by: Marcel Ziswiler
Cc: Stephen Warren
Cc: Tom Warren
Cc: Simon Glass
Acked-by: Simon Glass
Signed-off-by: Tom Warren -
The secure world code is relocated to the MB just below the top of 4G, we
reserve it in the FDT (by setting CONFIG_ARMV7_SECURE_RESERVE_SIZE) but it is
not protected in h/w.Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
Upstream Linux is broken with default configs when PSCI, thus non-secure
mode is enabled. So the user should explicitly enable this mode, e.g.
when she disabled CONFIG_CPU_IDLE in Linux (in which case it's safe to
use). We can revert this workaround once Linux got fixed.Signed-off-by: Jan Kiszka
Signed-off-by: Tom Warren -
Make sure to enable the SMMU when booting the kernel in non-secure mode.
This is necessary because some of the SMMU registers are restricted to
TrustZone-secured requestors, hence the kernel wouldn't be able to turn
the SMMU on. At the same time, enable translation for all memory clients
for the same reasons. The kernel will still be able to control SMMU IOVA
translation using the per-SWGROUP enable bits.Signed-off-by: Thierry Reding
Signed-off-by: Jan Kiszka
Signed-off-by: Tom Warren -
We only set CNTFRQ in arch_timer_init for the boot CPU. But this has to
happen for all cores.Fixing this resolves problems of KVM with emulating the generic
timer/counter.Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
These registers can be used to prevent non-secure world from accessing a
megabyte aligned region of RAM, use them to protect the u-boot secure monitor
code.At first I tried to do this from s_init(), however this inexplicably causes
u-boot's networking (e.g. DHCP) to fail, while networking under Linux was fine.So instead I have added a new weak arch function protect_secure_section()
called from relocate_secure_section() and reserved the region there. This is
better overall since it defers the reservation until after the sec vs. non-sec
decision (which can be influenced by an envvar) has been made when booting the
os.Signed-off-by: Ian Campbell
[Jan: tiny style adjustment]
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
This is based on Thierry Reding's work and uses Ian Campell's
preparatory patches. It comes with full support for CPU_ON/OFF PSCI
services. The algorithm used in this version for turning CPUs on and
off was proposed by Peter De Schrijver and Thierry Reding in
http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/210881. It
consists of first enabling CPU1..3 via the PMC, just to powergate them
again with the help of the Flow Controller. Once the Flow Controller is
in place, we can leave the PMC alone while processing CPU_ON and CPU_OFF
PSCI requests.Signed-off-by: Jan Kiszka
Signed-off-by: Tom Warren -
Tegra boards will have to initialize power management for the PSCI
support this way.Signed-off-by: Jan Kiszka
Signed-off-by: Tom Warren -
Will be used for unpowergating CPUs.
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
In this case the secure code lives in RAM, and hence the memory node in
the device tree needs to be adjusted. This avoids that the OS will map
and possibly access the reservation.Add support for setting CONFIG_ARMV7_SECURE_RESERVE_SIZE to carve out
such a region. We only support cutting off memory from the beginning or
the end of a RAM bank as we do not want to increase their number (which
would happen if punching a hole) for simplicity reasonsThis will be used in a subsequent patch for Jetson-TK1.
Signed-off-by: Jan Kiszka
Signed-off-by: Tom Warren -
I will need mc_security_cfg0/1 in a future patch and I added the rest while
debugging, so thought I might as well commit them.Signed-off-by: Ian Campbell
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
Use a per-CPU variable for saving the target PC during CPU_ON
operations. This allows us to run this service independently on targets
that have more than 2 cores and also core-local power control.CC: Marc Zyngier
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
This algorithm will be useful on Tegra as well, plus we will need it for
making _psci_target_pc per-CPU.CC: Marc Zyngier
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
_sunxi_cpu_entry can be converted completely into a reusable
psci_cpu_entry. Tegra124 will use it as well.As with psci_disable_smp, also the enabling is designed to be overloaded
in cased SMP is not controlled via ACTLR.CC: Marc Zyngier
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
Move parts of sunxi's psci_cpu_off into psci_cpu_off_common, namely
cache disabling and flushing, clrex and the disabling of SMP for the
dying CPU. These steps are apparently generic for ARMv7 and will be
reused for Tegra124 support.As the way of disabled SMP is not architectural, though commonly done
via ACLTR, the related function can be overloaded.CC: Marc Zyngier
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Signed-off-by: Tom Warren -
Will be required for obtaining the ID of the current CPU in shared PSCI
functions. The default implementation requires a dense ID space and only
supports a single cluster. Therefore, the functions can be overloaded in
cases where these assumptions do not hold.CC: Marc Zyngier
Signed-off-by: Jan Kiszka
Reviewed-by: Tom Rini
Reviewed-by: Thierry Reding
Tested-by: Thierry Reding
Tested-by: Ian Campbell
Acked-by: Ian Campbell
Signed-off-by: Tom Warren -
CONFIG_ARMV7_VIRT depends on CONFIG_ARMV7_NONSEC, thus doesn't need to
be taken into account additionally. CONFIG_ARMV7_PSCI is only set on
boards that support CONFIG_ARMV7_NONSEC, and it only works on those.CC: Tang Yuantian
CC: York Sun
CC: Steve Rae
CC: Andre Przywara
Signed-off-by: Jan Kiszka
Tested-by: Alison Wang
Signed-off-by: Tom Warren -
At the very least when USB keyboard support is enabled, we need to enable
CONFIG_SYS_STDIO_DEREGISTER, so the "usb reset" is able to re-scan USB
ports and find new devices. Enable it everywhere per request from Simon
Glass.Signed-off-by: Stephen Warren
Reviewed-by: Simon Glass
Signed-off-by: Tom Warren -
As best I can tell, CONFIG_SYS_LOAD_ADDR and CONFIG_LOADADDR/$loadaddr
serve essentially the same purpose. Roughly, if a command takes a load
address, then CONFIG_SYS_LOAD_ADDR or $loadaddr (or both) are the default
if the command-line does not specify the address. Different U-Boot
commands are inconsistent re: which of the two default values they use.
As such, set the two to the same value, and move the logic that does this
into tegra-common-post.h so it's not duplicated. A number of other non-
Tegra boards do this too.The values chosen for these macros are no longer consistent with anything
in MEM_LAYOUT_ENV_SETTINGS. Regain consistency by setting $kernel_addr_r
to CONFIG_LOADADDR. Older scripts tend to use $loadaddr for the default
kernel load address, whereas newer scripts and features tend to use
$kernel_addr_r, along with other variables for other purposes such as
DTBs and initrds. Hence, it's logical they should share the same value.I had originally thought to make the $kernel_addr_r and CONFIG_LOADADDR
have different values. This would guarantee no interference if a script
used the two variables for different purposes. However, that scenario is
unlikely given the semantic meaning associated with the two variables.
The lowest available value is 0x90200000; see comments for
MEM_LAYOUT_ENV_SETTINGS in tegra30-common-post.h for details. However,
that value would be problematic for a script that loaded a raw zImage to
$loadaddr, since it's more than 128MB beyond the start of SDRAM, which
would interfere with the kernel's CONFIG_AUTO_ZRELADDR. So, let's not do
that.The only potential fallout I could foresee from this patch is if someone
has a script that loads the kernel to $loadaddr, but some other file
(DTB, initrd) to a hard-coded address that the new value of $loadaddr
interferes with. This seems unlikely. A user should not do that; they
should either hard-code all load addresses, or use U-Boot-supplied
variables for all load addresses. Equally, any fallout due to this change
is trivial to fix; simply modify the load addresses in that script.Cc: Paul Walmsley
Signed-off-by: Stephen Warren
Reviewed-by: Paul Walmsley
Reviewed-by: Simon Glass
Signed-off-by: Tom Warren -
Add full link training as a fallback in case the fast link training
fails.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
Add the PMIC, LCD settings, PWM and also show the board info at the top of
the LCD when starting up.Signed-off-by: Simon Glass
Signed-off-by: Tom Warren -
Connect up the clocks and the eDP driver to make these displays work with
Tegra124-based devices.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
This interface is used on laptop devices based on Tegra. Add a driver which
provides access to the eDP interface. The driver uses the display port
uclass.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
The SOR is required for talking to eDP LCD panels. Add a driver for this
which will be used by the DisplayPort driver.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
Add the various host1x peripherals to allow an eDP display to be connected.
Signed-off-by: Simon Glass
Signed-off-by: Tom Warren -
eDP (Embedded DisplayPort) is a standard widely used in laptops to drive
LCD panels. Add a uclass for this which supports a few simple operations.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
For digital displays (such as EDP LCDs) we would like to read the EDID
information and use that to set display timings. Provide a function to do
this.Signed-off-by: Simon Glass
Signed-off-by: Tom Warren -
This file (from Linux 3.17) provides defines for display port. Use it so
that our naming is consistent with Linux.Signed-off-by: Simon Glass
Acked-by: Anatolij Gustschin
Signed-off-by: Tom Warren -
Allow this to be used by other Tegra SoCs.
Signed-off-by: Simon Glass
Signed-off-by: Tom Warren -
Add functions to provide access to the display clocks on Tegra124 including
setting the clock rate for an EDP display.Signed-off-by: Simon Glass
Signed-off-by: Tom Warren
