24 May, 2019
1 commit
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change the maximum oob size to 1872 for the MT29F128G08CBCCB raw NAND
chip on i.MX8QXPSigned-off-by: Han Xu
(cherry picked from commit 58dee6ac965000f93693c36c93fb3d453293c43f)
(cherry picked from commit d297f33f4719502aa415dc7c7002c437a6af6c28)
07 Feb, 2019
2 commits
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For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new frameworkSigned-off-by: Vignesh R
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed
06 Dec, 2018
3 commits
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MTD partition creation code is a bit tricky. It tries to figure out
when things have changed (either MTD dev list or mtdparts/mtdids vars)
and when that happens it first deletes all the partitions that had been
previously created and then creates the new ones based on the new
mtdparts/mtdids values.
But before deleting the old partitions, it ensures that none of the
currently registered parts are being used and bails out when that's
not the case. So, we end up in a situation where, if at least one MTD
dev has one of its partitions used by someone (UBI for instance), the
partitions update logic no longer works for other devs.Rework the code to relax the logic and allow updates of MTD parts on
devices that are not being used (we still refuse to updates parts on
devices who have at least one of their partitions used by someone).Fixes: 5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Signed-off-by: Boris Brezillon
Tested-by: Heiko Schocher -
If we don't do that, partitions might still be exposed while the
underlying device is gone.Fixes: 2a74930da57f ("mtd: mtdpart: implement proper partition handling")
Signed-off-by: Boris Brezillon
Tested-by: Heiko Schocher -
We need to parse mtdparts/mtids again everytime a device has been
added/removed from the MTD list, but there's currently no way to know
when such an update has been done.Add an ->updated field to the idr struct that we set to true every time
a device is added/removed and expose a function returning the value
of this field and resetting it to false.Signed-off-by: Boris Brezillon
Tested-by: Heiko Schocher
04 Oct, 2018
1 commit
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This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.Signed-off-by: Stefan Roese
Cc: Miquel Raynal
Cc: Boris Brezillon
Cc: Jagan Teki
Reviewed-by: Miquel Raynal
Acked-by: Jagan Teki
03 Oct, 2018
3 commits
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Instead of collecting partitions in a flat list, create a hierarchy
within the mtd_info structure: use a partitions list to keep track of
the partitions of an MTD device (which might be itself a partition of
another MTD device), a pointer to the parent device (NULL when the MTD
device is the root one, not a partition).By also saving directly in mtd_info the offset of the partition, we
can get rid of the mtd_part structure.Signed-off-by: Miquel Raynal
Reviewed-by: Stefan Roese
Reviewed-by: Boris Brezillon -
Using an MTD device (resp. partition) name in mtdparts is simple and
straightforward. However, for a long time already, another name was
given in mtdparts to indicate a device (resp. partition) so the
"mtdids" environment variable was created to do the match.Let's create a function that, from an MTD device (resp. partition)
name, search for the equivalent name in the "mtdparts" environment
variable thanks to the "mtdids" string.Signed-off-by: Miquel Raynal
Reviewed-by: Stefan Roese
Reviewed-by: Boris Brezillon -
The current parser is very specific to U-Boot mtdparts implementation.
It does not use MTD structures like mtd_info and mtd_partition. Copy
and adapt the current parser in drivers/mtd/mtd-uclass.c (to not break
the current use of mtdparts.c itself) and write some kind of a wrapper
around the current implementation to allow other commands to benefit
from this parsing in a user-friendly way.This new function will allocate an mtd_partition array for each
successful call. This array must be freed after use by the caller.
The given 'mtdparts' buffer pointer will be moved forward to the next
MTD device (if any, it will point towards a '\0' character otherwise).Signed-off-by: Miquel Raynal
Acked-by: Jagan Teki
Reviewed-by: Stefan Roese
Reviewed-by: Boris Brezillon
20 Sep, 2018
9 commits
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Add minimal support for the MX35LF1GE4AB SPI NAND chip.
Signed-off-by: Boris Brezillon
Acked-by: Jagan Teki -
Add support for the W25M02GV chip.
Signed-off-by: Frieder Schrempf
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
Acked-by: Jagan Teki -
Add a basic driver for Micron SPI NANDs. Only one device is supported
right now, but the driver will be extended to support more devices
afterwards.Signed-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
Acked-by: Jagan Teki -
Add a SPI NAND framework based on the generic NAND framework and the
spi-mem infrastructure.In its current state, this framework supports the following features:
- single/dual/quad IO modes
- on-die ECCSigned-off-by: Peter Pan
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
Acked-by: Jagan Teki -
The NAND sub-layers are likely to need the MTD_OPS_XXX mode information
in order to decide if they should enable/disable ECC or how they should
place the OOB bytes in the provided OOB buffer.Add a field to nand_page_io_req to pass this information.
Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal -
Add an intermediate layer to abstract NAND device interface so that
some logic can be shared between SPI NANDs, parallel/raw NANDs,
OneNANDs, ...Signed-off-by: Boris Brezillon
Signed-off-by: Miquel Raynal
Acked-by: Jagan Teki -
Some helpers might be useful in a future 'mtd' U-Boot command to parse
MTD device list.Signed-off-by: Miquel Raynal
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We are going to begin using the mtd->dev.of_node field for MTD device
nodes, so let's add helpers for it. Also, we'll be making some
conversions on spi_nor (and nand_chip eventually) too, so get that ready
with their own helpers.Signed-off-by: Brian Norris
Reviewed-by: Boris Brezillon
Signed-off-by: Miquel Raynal
Reviewed-by: Jagan Teki -
There's no reason for having mtd_write_oob inlined in mtd.h header.
Move it to mtdcore.c where it belongs.Signed-off-by: Ezequiel Garcia
Acked-by: Boris Brezillon
Signed-off-by: Jacek Anaszewski
Signed-off-by: Miquel Raynal
24 Jul, 2018
2 commits
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A comment in the kernel doc of the mtd_oob_ops structure tells that it
is not possible to write more than one page with OOB. This was
probably true at some time in the past but today it is entirely wrong.As one can see for instance in the nand_do_write_ops() helper available
in the NAND core, this implementation called by mtd->_write_oob()
simply loops over the pages until everything has been written.Signed-off-by: Miquel Raynal
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Our nand_ecc_modes_t is already a bit abused by value NAND_ECC_SOFT_BCH.
This enum should store ECC mode only and putting algorithm details there
is a bad idea. It would result in too many values impossible to support
in a sane way.To solve this problem let's add a new enum. We'll have to modify all
drivers to set it properly but once it's done it'll be possible to drop
NAND_ECC_SOFT_BCH. That will result in a cleaner design and more
possibilities like setting ECC algorithm for hardware ECC mode.Signed-off-by: Rafał Miłecki
Signed-off-by: Boris Brezillon
[Linux commit: b0fcd8ab7b3c89b5da7fff5224d06ed73e7a33cc]
[Philippe Reynes: adapt code to u-boot]
Signed-off-by: Philippe Reynes
27 Jun, 2018
1 commit
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`nand_get_flash_type()` allows identification of supported NAND flashs.
The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
flash (which does not support ONFi) instead of using nand_simple.c and
hard-coding all required NAND parameters.Signed-off-by: Jörg Krause
07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
04 Dec, 2017
2 commits
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This is needed for ARCH_DMA_MINALIGN.
Signed-off-by: Masahiro Yamada
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This header was renamed to rawnand.h in Linux.
The following is the corresponding commit in Linux.
commit d4092d76a4a4e57b65910899948a83cc8646c5a5
Author: Boris Brezillon
Date: Fri Aug 4 17:29:10 2017 +0200mtd: nand: Rename nand.h into rawnand.h
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and function prototypes.Signed-off-by: Masahiro Yamada
28 Nov, 2017
15 commits
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Several drivers check ->chipsize to see if the third row address cycle
is needed. Instead of embedding magic sizes such as 32MB, 128MB in
drivers, introduce a new flag NAND_ROW_ADDR_3 for clean-up. Since
nand_scan_ident() knows well about the device, it can handle this
properly. The flag is set if the row address bit width is greater
than 16.Delete comments such as "One more address cycle for ..." because
intention is now clear enough from the code.Signed-off-by: Masahiro Yamada
Acked-by: Wenyou Yang
Signed-off-by: Boris Brezillon[Linux commit: 14157f861437ebe2d624b0a845b91bbdf8ca9a2d]
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struct nand_ecc_caps was designed as flexible as possible to support
multiple stepsizes (like sunxi_nand.c).So, we need to write multiple arrays even for the simplest case.
I guess many controllers support a single stepsize, so here is a
shorthand macro for the case.It allows to describe like ...
NAND_ECC_CAPS_SINGLE(denali_pci_ecc_caps, denali_calc_ecc_bytes, 512, 8, 15);
... instead of
static const int denali_pci_ecc_strengths[] = {8, 15};
static const struct nand_ecc_step_info denali_pci_ecc_stepinfo = {
.stepsize = 512,
.strengths = denali_pci_ecc_strengths,
.nstrengths = ARRAY_SIZE(denali_pci_ecc_strengths),
};
static const struct nand_ecc_caps denali_pci_ecc_caps = {
.stepinfos = &denali_pci_ecc_stepinfo,
.nstepinfos = 1,
.calc_ecc_bytes = denali_calc_ecc_bytes,
};Signed-off-by: Masahiro Yamada
Signed-off-by: Boris Brezillon[Linux commit: a03c60178c181767ecfb26fb311a88742d228118]
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Driver are responsible for setting up ECC parameters correctly.
Those include:
- Check if ECC parameters specified (usually by DT) are valid
- Meet the chip's ECC requirement
- Maximize ECC strength if NAND_ECC_MAXIMIZE flag is setThe logic can be generalized by factoring out common code.
This commit adds 3 helpers to the NAND framework:
nand_check_ecc_caps - Check if preset step_size and strength are valid
nand_match_ecc_req - Match the chip's requirement
nand_maximize_ecc - Maximize the ECC strengthTo use the helpers above, a driver needs to provide:
- Data array of supported ECC step size and strength
- A hook that calculates ECC bytes from the combination of
step_size and strength.By using those helpers, code duplication among drivers will be
reduced.Signed-off-by: Masahiro Yamada
Signed-off-by: Boris Brezillon[Linux commit: 2c8f8afa7f92acb07641bf95b940d384ed1d0294]
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Some NAND controllers can assign different NAND timings to different
CS lines. Pass the CS line information to ->setup_data_interface() so
that the NAND controller driver knows which CS line is concerned by
the setup_data_interface() request.Signed-off-by: Boris Brezillon
[Linux commit: 104e442a67cfba4d0cc982384761befb917fb6a1]
Signed-off-by: Masahiro Yamada -
In some cases, nand_do_{read,write}_ops is passed with unaligned
ops->datbuf. Drivers using DMA will be unhappy about unaligned
buffer.The new struct member, buf_align, represents the minimum alignment
the driver require for the buffer. If the buffer passed from the
upper MTD layer does not have enough alignment, nand_do_*_ops will
use bufpoi.Signed-off-by: Masahiro Yamada
Signed-off-by: Boris Brezillon[Linux commit: 477544c62a84d3bacd9f90ba75ffc16c04d78071]
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The ->errstat() hook is no longer implemented NAND controller drivers.
Get rid of it before someone starts abusing it.Signed-off-by: Boris Brezillon
[Linux commit: 7d135bcced20be2b50128432c5426a7278ec4f6d]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada -
Cached programming is always skipped, so drop the associated code until
we decide to really support it.Signed-off-by: Boris Brezillon
[Linux commit: 0b4773fd1649e0d418275557723a7ef54f769dc9]
[masahiro: modify davinci_nand.c for U-Boot]
Signed-off-by: Masahiro Yamada -
In order to make the ecclayout definition completely dynamic we need to
rework the way the OOB layout are defined and iterated.Create a few mtd_ooblayout_xxx() helpers to ease OOB bytes manipulation
and hide ecclayout internals to their users.Signed-off-by: Boris Brezillon
[Linux commit: 75eb2cec251fda33c9bb716ecc372819abb9278a]
[masahiro:
cherry-pick more code from adbbc3bc827eb1f43a932d783f09ba55c8ec8379]
Signed-off-by: Masahiro Yamada -
If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.Signed-off-by: Marc Gonzalez
Signed-off-by: Boris Brezillon
[Linux commit: 3371d663bb4579f1b2003a92162edd6d90edd089]
Signed-off-by: Masahiro Yamada -
Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the
nand_sdr_timings struct.
Assign default/safe values for the statically defined timings, and
extract them from the ONFI parameter table if the NAND is ONFI
compliant.Signed-off-by: Boris Brezillon
Tested-by: Marc Gonzalez
[Linux commit: 204e7ecd47e26cc12d9e8e8a7e7a2eeb9573f0ba
Fixup commit: 6d29231000bbe0fb9e4893a9c68151ffdd3b5469]
Signed-off-by: Masahiro Yamada -
When changing from one data interface setting to another, one has to
ensure a specific sequence which is described in the ONFI spec.One of these constraints is that the CE line has go high after a reset
before a command can be sent with the new data interface setting, which
is not guaranteed by the current implementation.Rework the nand_reset() function and all the call sites to make sure the
CE line is asserted and released when required.Also make sure to actually apply the new data interface setting on the
first die.Signed-off-by: Boris Brezillon
Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection")
Reviewed-by: Sascha Hauer
Tested-by: Marc Gonzalez
[Linux commit: 73f907fd5fa56b0066d199bdd7126bbd04f6cd7b]
Signed-off-by: Masahiro Yamada -
The NAND framework provides several helpers to query timing modes supported
by a NAND chip, but this implies that all NAND controller drivers have
to implement the same timings selection dance. Also currently NAND
devices can be resetted at arbitrary places which also resets the timing
for ONFI chips to timing mode 0.Provide a common logic to select the best timings based on ONFI or
->onfi_timing_mode_default information. Hook this into nand_reset()
to make sure the new timing is applied each time during a reset.NAND controller willing to support timings adjustment should just
implement the ->setup_data_interface() method.Signed-off-by: Boris Brezillon
Signed-off-by: Sascha Hauer
[Linux commit: d8e725dd831186a3595036b2b1df9f68cbc6efa3]
Signed-off-by: Masahiro Yamada -
The nand layer will need ONFI mode 0 to use it as timing mode
before and right after reset.Signed-off-by: Sascha Hauer
Signed-off-by: Boris Brezillon
[Linux commit: 6e1f9708dbf3c50a8da93c1952a01a7a2acb5e66]
Signed-off-by: Masahiro Yamada -
struct nand_data_interface is the designated type to pass to
the NAND drivers to configure the timing. To simplify further
patches convert the onfi_sdr_timings array from type struct
nand_sdr_timings nand_data_interface.Signed-off-by: Sascha Hauer
Signed-off-by: Boris Brezillon
[Linux commit: b1dd3ca203fccd111926c3f6ac59bf903ec62b05]
Signed-off-by: Masahiro Yamada -
Currently we have no data structure to fully describe a NAND timing.
We only have struct nand_sdr_timings for NAND timings in SDR mode,
but nothing for DDR mode and also no container to store both types
of timing.
This patch adds struct nand_data_interface which stores the timing
type and a union of different timings. This can be used to pass to
drivers in order to configure the timing.
Add kerneldoc for struct nand_sdr_timings while touching it anyway.Signed-off-by: Sascha Hauer
Signed-off-by: Boris Brezillon
[Linux commit: eee64b700e26b9bcc6fce024681c31f5e12271fc]
Signed-off-by: Masahiro Yamada
