24 Oct, 2016
1 commit
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This is not really a config. Rename it to avoid confusion.
Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
Reviewed-by: Jagan Teki
02 Sep, 2015
1 commit
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there is a 2b board version of the aristainetos2
board. Differences to the v2:- spi cs for the nor flash and display controller
changed
- some pinmux changes
- LED gpio settings changedSigned-off-by: Heiko Schocher
26 May, 2015
1 commit
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add support for imx6dl based aristainetos2 board
U-Boot 2015.04-rc5-00066-g60f6ed4 (Apr 10 2015 - 08:46:27)
CPU: Freescale i.MX6DL rev1.1 at 792 MHz
Reset cause: WDOG
Board: aristaitenos2
Watchdog enabled
I2C: ready
DRAM: 1 GiB
NAND: 1024 MiB
MMC: FSL_SDHC: 0
SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lg4573 (480x800)
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
=>Signed-off-by: Heiko Schocher
23 Apr, 2015
1 commit
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Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.Signed-off-by: York Sun
CC: Heiko Schocher
30 Jan, 2015
1 commit
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- use linux display timing settings
- change backlight duty cycle 500ns
- some defaultenvironment changes
- change fit_addr_r to 0x14000000 as needed if
MAX_LOCKDEP_SUBCLASSES in linux gets increased.
- Environment now at 0xd0000 in nand flashSigned-off-by: Heiko Schocher
03 Nov, 2014
1 commit
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155fa9af95a "spi: mxc: fix sf probe when using mxc_spi" break
spi flash detection on the aristainetos board. Fix this.Signed-off-by: Heiko Schocher
23 Jul, 2014
1 commit
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CPU: Freescale i.MX6DL rev1.1 at 792 MHz
Board: aristaitenos
I2C: ready
DRAM: 1 GiB
NAND: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
SF: Detected N25Q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Display: lb07wv8 (800x480)- UART5 is console
- MMC 0 and 1
- USB 0 and 1
- boot from mmc0 and spi nor flash
- Splash screen supportSigned-off-by: Heiko Schocher
Cc: Stefano Babic