22 Feb, 2014
1 commit
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This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.Signed-off-by: York Sun
Acked-by: Albert ARIBAUD
20 Feb, 2014
3 commits
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Conflicts:
Makefile
drivers/net/npe/MakefileThese two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile. -
- When CONFIG_DISPLAY_CPUINFO is not enabled,
print_cpuinfo() should be defined as an empty function
in a header, include/common.h- Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif
from caller, common/board_f.c and arch/arm/lib/board.c- Remove redundant prototypes in arch/arm/lib/board.c,
arch/arm/include/asm/arch-am33x/sys_proto.h and
board/nokia/rx51/rx51.h, keeping the one in include/common.h- Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition
where it is missingSigned-off-by: Masahiro Yamada
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We are going to switch over to Kbuild in upcoming commits.
Each makefile must have non-empty obj- or obj-y
to generate built-in.o on Kbuild.Signed-off-by: Masahiro Yamada
19 Feb, 2014
1 commit
11 Feb, 2014
2 commits
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Use the latest DDR and clock settings as the one from Freescale BSP.
Signed-off-by: Fabio Estevam
04 Feb, 2014
3 commits
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This covers only non-L2 switch ethernet interfaces i.e.
RGMII and SGMII interface for both T1040RDB and T1042RDB_PIT1040RDB is configured as serdes protocol 0x66 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5
1 SGMII on DTSEC3T1042RDB_PI is configured as serdes protocol 0x06 which can
support following interfaces
2 RGMIIS on DTSEC4, DTSEC5Signed-off-by: Poonam Aggrwal
Signed-off-by: Priyanka Jain
[York Sun: Minor change in commit message]
Signed-off-by: York Sun -
Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
Define MDIO related configs
Added eth.c file
Update t1040.c to support RGMII and SGMII
Update t1040qds.c to support ethernet
Define the PHY addressSigned-off-by: Arpit Goel
Signed-off-by: Bhupesh Sharma
Signed-off-by: Poonam Aggrwal
Signed-off-by: Priyanka Jain
Signed-off-by: Prabhakar Kushwaha
[York Sun: remove dash from commit message]
Signed-off-by: York Sun -
Due to increased size of u-boot, FMAN ucode start address has been shifted
by 256KB causing a overlap with rootfs start address.Update rootfs start address to reflect correct memory map.
Also fix minor typo in README
Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun
23 Jan, 2014
1 commit
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On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.Signed-off-by: Haijun Zhang
Acked-by: Pantelis Antoniou
Reviewed-by: York Sun
22 Jan, 2014
5 commits
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u-boot binary size for Freescale mpc85xx platforms is 512KB.
This has been reached to upper limit for some of the platforms causig
linker error.So, Increase the u-boot binary size to 768KB.
Signed-off-by: York Sun
Signed-off-by: Prabhakar Kushwaha -
- Optimize UDIMM parameters for whole range from 1500MT/s to 2140MT/s.
- Remove unused patameters: 'cpo', 'wrdata delay', '2T', which are
unrelated to DDR3/3L.Tested with UDIMM 9JSF25672AZ-2G1K1 and verified speed 1200/1866/2133MT/s.
Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
Using the TPL/SPL method to booting from 8k page NAND flash.
- Add 256kB size SRAM tlb for second step booting;
- Add spl.c for TPL image boot;
- Add spl_minimal.c for minimal SPL image;
- Add C29XPCIE_NAND configure;
- Modify C29XPCIE.h for nand config and enviroment;Signed-off-by: Po Liu
Reviewed-by: York Sun -
- add more serdes protocols support.
- fix some serdes lanes route.
- fix SGMII doesn't work and incorrect mdio display for XFI when serdes 0x6d.
- correct boot location info for SD/SPI boot.Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
Update following DDR related settings for T1040QDS
-Correct number of chip selects to two as t1040qds supports
two Chip selects.
-Update board_specific_parameters udimm structure with settings
derived via calibration.
-Reduced I2C speed to 50KHz as DDR-SPD does not get reliably
read at 400KHz.Verified the updated settings to be working fine with dual-ranked
Micron, MT18KSF51272AZ-1G6 DIMM at data rate 833MT/s, 1333MT/s and
1600MT/s.Signed-off-by: Poonam Aggrwal
Signed-off-by: Priyanka Jain
Reviewed-by: York Sun
15 Jan, 2014
2 commits
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Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.No changes are made to mx6slevk, which uses the default 50MHz fec clock.
Signed-off-by: Fabio Estevam
Acked-by: Stefano Babic
14 Jan, 2014
1 commit
13 Jan, 2014
4 commits
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.Signed-off-by: Fabio Estevam
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.Signed-off-by: Fabio Estevam
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.In order to simplify the code, just return the value from cpu_eth_init(bis)
directly.Signed-off-by: Fabio Estevam
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There is no need to print an error message when cpu_eth_init() fails because
net/eth.c already prints it.Signed-off-by: Fabio Estevam
10 Jan, 2014
1 commit
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Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.Conflicts:
include/configs/exynos5250-dt.hSigned-off-by: Tom Rini
06 Jan, 2014
1 commit
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Conflicts:
include/micrel.hThe conflict above was trivial, caused by four lines being
added in both branches with different whitepace.
03 Jan, 2014
4 commits
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Define QIXIS_RST_FORCE_MEM to reset on-board DDR-DIMM before start
accessing it.Signed-off-by: Prabhakar Kushwaha
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The BOOT_LOC setting in rcw cfg is wrong, set it to Memory complex 1.
Signed-off-by: Shaohui Xie
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CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary
review purpose.So, use CONFIG_SPL_NAND_BOOT config.
Signed-off-by: Prabhakar Kushwaha
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T1040QDS has 256KB SRAM. Comment is showing wrong information.
So update the comment.
Signed-off-by: Prabhakar Kushwaha
18 Dec, 2013
4 commits
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mx6sabresd boards have a 18-bit LVDS data width and the correct color format
is RGB666.Suggested-by: Liu Ying
Signed-off-by: Fabio Estevam -
HSYNC, VSYNC and DISP_CLK are very useful display signals for debugging.
Configure them as active pins.
Signed-off-by: Fabio Estevam
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Align with the context to use readl() to read the CCM_CCGR3
register with memory barrier instead of __raw_readl().Signed-off-by: Liu Ying
Reviewed-by: Fabio Estevam -
This allows the use of either or both declarations from
the files mx6q_pins.h and mx6dl_pins.h.All board files should include
with one of the following defined in boards.cfg
MX6Q - for boards targeting i.MX6Q or i.MX6D
MX6DL - for boards targeting i.MX6DL
MX6S - for boards targeting i.MX6S
MX6QDL - for boards that support any of the above with
run-time detectionPad declarations will be MX6_PAD_x for single-variant boards
and MX6Q_PAD_x and MX6DL_PAD_x for boards supporting both
processor classes.Signed-off-by: Eric Nelson
Acked-by: Stefano Babic
17 Dec, 2013
1 commit
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The pmic_init() function has the I2C or SPI bus number that is connected to the
PMIC.Instead of passing I2C_PMIC, explicitly pass the I2C bus number via I2C_x
definition.The motivation for doing this is to avoid people just doing a copy and paste
of I2C_PMIC into their board file when another I2C bus is actually used to
interface to their PMIC.This also makes more obvious which is the I2C bus connected to the PMIC, without
having to search in the source code for the meaning of the 'I2C_PMIC' number.Signed-off-by: Fabio Estevam
Acked-by: Stefano Babic
13 Dec, 2013
1 commit
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Signed-off-by: Masahiro Yamada
12 Dec, 2013
1 commit
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Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers with
__iomem pointers for tsec.p1_p2_rdb_pc.c:373:24: warning: incorrect type in assignment (different
address spaces)
p1_p2_rdb_pc.c:373:24: expected struct tsec_mii_mng [noderef]
*regs
p1_p2_rdb_pc.c:373:24: got struct tsec_mii_mng *Use TSEC_GET_MDIO_REGS_BASE() for the remaining mdio 'regs'
initializations to remove the __iomem warnings and for consistency.Signed-off-by: Claudiu Manoil
Acked-by: York Sun
11 Dec, 2013
2 commits
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Conflicts:
board/samsung/trats2/trats2.c
include/configs/exynos5250-dt.hSigned-off-by: Tom Rini
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Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyardNeeded manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
07 Dec, 2013
1 commit
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Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.Signed-off-by: Albert ARIBAUD
Reviewed-by: Benoît Thébaudeau
05 Dec, 2013
1 commit
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Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.Signed-off-by: Po Liu
Acked-by: York Sun