04 Oct, 2016

10 commits

  • Add i.MX6ULL major cpu type.

    Signed-off-by: Peng Fan
    Signed-off-by: Ye Li
    Cc: Stefano Babic
    Reviewed-by: Stefano Babic

    Peng Fan
     
  • Add iomux header file for i.MX6ULL.

    Signed-off-by: Peng Fan
    Signed-off-by: Ye Li
    Cc: Stefano Babic
    Reviewed-by: Stefano Babic

    Peng Fan
     
  • Correct name is "Boundary Devices".

    Signed-off-by: Fabio Estevam

    Fabio Estevam
     
  • There is no stable mmcblk device numbering over different linux versions.
    Enable CMD_PART to be able to query the UUID of the root filesystem partition.
    So we can pass root=PARTUUID=XXX instead of root=/dev/mmcblkXpY in bootargs.
    Leave the default environment as is for now to stay compatible with original
    TBS settings.

    Signed-off-by: Soeren Moch

    Soeren Moch
     
  • Currently the driver asserts WDOG_B by clearing WCR_WDA bit when
    enabling the watchdog. Do not clear WCR_WDA.

    Signed-off-by: Ross Parker
    Cc: Stefano Babic

    Ross Parker
     
  • The CPU detection macro is_mx6dq returns 0 on an i.MX6DQP, so we need to
    check for it explicitly in order to correctly initialize the pads when
    CONFIG_MX6QDL is defined.

    Signed-off-by: Filip Brozovic

    Filip Brozovic
     
  • The linux kernel imx_v6_v7_defconfig sets the user/kernel memory split
    to 3G/1G now (was 2G/2G before). We have to adapt the BOOTMAPSZ so that
    the decompressor finds zImage and dtb in lowmem.

    Signed-off-by: Soeren Moch

    Soeren Moch
     
  • When using SPL on i.mx6 we frequently notice some DDR initialization
    mismatches between the SPL code and the non-SPL code.

    This causes stability issues like the ones reported at 7dbda25ecd6d7c
    ("mx6ul_14x14_evk: Pass refsel and refr fields to avoid hang") and also:
    http://lists.denx.de/pipermail/u-boot/2016-September/266355.html .

    As the non-SPL code have been tested for long time and proves to be reliable,
    let's configure the DDR in the exact same way as the non-SPL case.

    The idea is simple: just use the DCD table and write directly to the DDR
    registers.

    Retrieved the DCD tables from:
    board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg
    and
    board/freescale/mx6sabresd/mx6qp.cfg
    (NXP U-Boot branch imx_v2015.04_4.1.15_1.0.0_ga)

    This method makes it easier for people converting from non-SPL to SPL code.

    Other benefit is that the SPL binary size is reduced from 44 kB to 39.9 kB.

    Signed-off-by: Fabio Estevam

    Fabio Estevam
     
  • The videoargs script is kernel version dependent and since wandboard
    uses distro config, there is no need to handle videoargs locally.

    In case such video related settings are needed, then the proper
    location would be the distro extlinux.conf or boot.scr files.

    So remove 'videoargs' script.

    Signed-off-by: Fabio Estevam

    Fabio Estevam
     
  • A kernel hang is observed when running wandboard 3.14 kernel and
    going to the lowest operational point of cpufreq:

    # ifconfig eth0 down
    # echo 1 > /sys/class/graphics/fb0/blank

    The problem is caused by incorrect setting of the REFR field
    of register MDREF. Setting it to 4 refresh commands per refresh
    cycle fixes the hang.

    Signed-off-by: Fabio Estevam

    Fabio Estevam
     

03 Oct, 2016

2 commits


02 Oct, 2016

28 commits