30 Oct, 2019
1 commit
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At present some boards generate kwbimage.cfg in the source tree
during the build. This breaks buildman testing on some systems
where the source tree is read-only. Update makefile rules to
generate it in the build tree instead.Note some other boards have the kwbimage.cfg file written in
advance, hence we need check if the file exists in the build
tree first, otherwise we fall back to one in the source tree.Signed-off-by: Bin Meng
Reviewed-by: Chris Packham
Reviewed-by: Stefan Roese
Reviewed-by: Simon Glass
26 Oct, 2019
12 commits
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- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC -
- Enable DFU on dra7xx boards
- Further Keystone 3 platform improvements -
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.Signed-off-by: Suman Anna
Signed-off-by: Lokesh Vutla -
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().Signed-off-by: Lokesh Vutla
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Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.Signed-off-by: Lokesh Vutla
Signed-off-by: Kevin Scholz -
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.Signed-off-by: James Doublesin
Signed-off-by: Lokesh Vutla -
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsiSigned-off-by: James Doublesin
Signed-off-by: Lokesh Vutla -
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.Reported-by: Andrew F. Davis
Reported-by: Faiz Abbas
Signed-off-by: Lokesh Vutla -
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.Signed-off-by: Lokesh Vutla
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Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.
Signed-off-by: Faiz Abbas
Signed-off-by: Jean-Jacques Hiblot -
- DWC3 improvements
- i.MX7 EHCI bugfix -
Second set of u-boot-atmel features and fixes for 2020.01 cycle
This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.
25 Oct, 2019
20 commits
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Xilinx/FPGA changes for v2020.01 part 2
common:
- Fix manual relocation for repeatable commandsarm:
- Also clean up generated dtbosmicroblaze:
- Add support for Manual relocation in crypto framework
- Tune and align architecture bootm supportzynq:
- DT sync ups
- Some defconfig updates
- Remove empty board_early_init_f()zynqmp:
- Clean firmware handing via drivers/firmware/
- DT/defconfig name alignments
- DT cleanups with using firmware based clock driver
- Some defconfig updates
- Add IIO ina226 DT description
- Tune zynqmp_psu_init_minimalize.sh script
- Add single nand mini configuration, e-a2197, m-a2197-02/03 and zcu216versal:
- Clean firmware handing via drivers/firmware/
- Add gpio support
- Enable DT overlay/USB/CLK/FPGA
- DT updates
- Tune mini configurationspi:
- gqspi - Remove unused headers -
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.Signed-off-by: Weijie Gao
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This patch adds default eth pinctrl for all boards.
There are two pinctrl nodes used for two scenarios:
ephy_iot_mode - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one portsReviewed-by: Stefan Roese
Signed-off-by: Weijie Gao -
This adds default pinctrl (dual SPI chip select) for gardena smart gateway
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao -
This patch adds mmc related nodes for mt7628an.dtsi
Signed-off-by: Weijie Gao
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This patch adds default p0led status and phy0 link polling for all boards.
Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao -
This patch updates reset controller node for mt7628
Signed-off-by: Weijie Gao
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This patch adds default pinctrl for uart nodes
Signed-off-by: Weijie Gao
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This patch adds pinctrl node with default pin state for mt7628an.dtsi.
Signed-off-by: Weijie Gao
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This patch adds clkctrl node for mt7628 and adds clocks property for
some node.Signed-off-by: Weijie Gao
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All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate
Signed-off-by: Weijie Gao -
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.Reviewed-by: Stefan Roese
Signed-off-by: Weijie Gao -
Fixes commit 344db3f, which added missing bmips dtbs depending on their SoCs.
Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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BCM63268 uses 4.0 HW nand controller, which is currently supported by
brcmnand driver.Signed-off-by: Álvaro Fernández Rojas
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BCM6362 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.Signed-off-by: Álvaro Fernández Rojas
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BCM6328 uses old 2.2 HW nand controller, which isn't currently supported by
brcmnand driver.Signed-off-by: Álvaro Fernández Rojas
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BCM6368 uses old 2.1 HW nand controller, which isn't currently supported by
brcmnand driver.Signed-off-by: Álvaro Fernández Rojas
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If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
Signed-off-by: Ramon Fried
24 Oct, 2019
7 commits
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- Add Universal Flash Storage (UFS) support
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Use tab instead of spaces.
Signed-off-by: Michal Simek
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Record two bootstages and add "Starting kernel" message to have standard
handoff message between U-Boot and OS.
Also use debug() instead of #ifdef DEBUG to clean the code.Signed-off-by: Michal Simek
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There is no need to show FDT message in regular flow that's why switch it
to debug level.Fixes: 0905046050b0 ("microblaze: Switch to generic bootm implementation")
Signed-off-by: Michal Simek -
Add support for System Controller available on e-a2197-00 base board.
System is very similar to p-a2197-00 board.Signed-off-by: Michal Simek
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board_early_init_f added by commit e6cc3b25d721
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.Fixes: ccd063e9812a ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek -
zcu104/6 defconfig was used as source. Standard features are enabled.
Signed-off-by: Michal Simek
