25 May, 2016
32 commits
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The A80 uses the AXP809 as its primary PMIC.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
Adds poweroff support for axp818 pmic.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The SW output of the PMIC supplies the ethernet PHY with power.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The AXP818 has a switchable output, SW. This is commonly used for
controlling power to the LCD backlight.Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
Description said eldo2 instead of fldo2, a copy-paste error.
Fixes: 38491d9c6515 ("power: axp818: Add support for FLDOs")
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The ELDO enable bits and registers are contiguous for axp221. Instead
of a switch case testing against the index, just use the index to shift
the bit or register offset.Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The newer chips use a newer display pipeline, which is not supported.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
A83T, H3, and A64 have a dedicated pin for card detect on the PF
pingroup. This is used in all designs. Set it as the default.Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
In most other places, we sort SoC descriptions by family (sunXi) first,
then by the chip name (A20).Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The user should always select an SoC variant to support. Not choosing
one doesn't make sense for a bootloader.Signed-off-by: Chen-Yu Tsai
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede -
The code assumed that if the interface is not RGMII configured
then it must be SGMII configured. This device has the ability
to support most of the MII interfaces. Therefore add the
helper for SGMII and only configure the device if the interface is
configured for SGMII.Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Reviewed-by: Michal Simek
Acked-by: Joe Hershberger -
Add a helper to phy.h to identify whether the
phy is configured for SGMII all variables.Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Reviewed-by: Michal Simek
Tested-by: Mugunthan V N
Acked-by: Joe Hershberger -
Move the phy_interface_is_rgmii to the phy.h
file for all phy's to be able to use the API.This now aligns with the Linux kernel based on
commit e463d88c36d42211aa72ed76d32fb8bf37820ef1Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Reviewed-by: Michal Simek
Tested-by: Mugunthan V N
Acked-by: Joe Hershberger -
Not all devices use the same internal delay or fifo depth.
Add the ability to set the internal delay for rx or tx and the
fifo depth via the devicetree. If the value is not set in the
devicetree then set the delay to the default.If devicetree is not used then use the default defines within the
driver.Signed-off-by: Dan Murphy
Tested-by: Mugunthan V N
Acked-by: Joe Hershberger -
Add the device tree bindings and the accompanying documentation
for the TI DP83867 Giga bit ethernet phy driver.The original document was from:
[commit 2a10154abcb75ad0d7b6bfea6210ac743ec60897 from the Linux kernel]Signed-off-by: Dan Murphy
Reviewed-by: Mugunthan V N
Tested-by: Mugunthan V N
Acked-by: Joe Hershberger -
Add the ability to pass the phy-handle node offset
to the phy driver. This allows the phy driver
to access the DT subnode's data and parse accordingly.Signed-off-by: Dan Murphy
Tested-by: Michal Simek
Acked-by: Joe Hershberger -
Add the ability to read the phy-handle node of the
cpsw slave. Upon reading this handle the phy-id
can be stored based on the reg node in the DT.The phy-handle also needs to be stored and passed
to the phy to access any phy data that is available.Signed-off-by: Dan Murphy
Tested-by: Mugunthan V N
Acked-by: Joe Hershberger -
Enable eth driver model for dra74_evm as cpsw supports
driver model.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Enable eth driver model for am437x_sk_evm as cpsw supports
driver model.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Enable eth driver model for am437x_gp_evm as cpsw supports
driver model.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Fix typo error for cpsw device name with proper device address
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Add syscon node to cpsw device node to read mac address
from efuse.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Add syscon node to cpsw device node to read mac address
from efuse.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Different TI platforms has to read with different combination to
get the mac address from efuse. So add support to read mac address
based on machine/device compatibles.The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c
done by Tony Lindgren.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Since dra7x platforms address bus is define as 64 bits to support
LAPE, fdtdec_get_addr() returns a invalid address for mdio based
and gmii_sel register address. Fixing this by using
fdtdec_get_addr_size_auto_noparent() which will derive address
cell and size cell from its parent.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Add platforms specific phy mode configuration bits to be used
to configure phy mode in control module.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
On some boards number of slaves can be 1 when only one port
ethernet is pinned out. So do not break when slave_index and
num slaves check fails, instead continue to parse the next
child.Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Since omap's spl doesn't support DM currently, do not define
DM_ETH for spl build.Signed-off-by: Mugunthan V N
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger -
Provide an api to check whether the given device or machine is
compatible with the given compat string which helps in making
decisions in drivers based on device or machine compatible.Idea taken from Linux.
Signed-off-by: Mugunthan V N
Reviewed-by: Joe Hershberger -
The previous mv88e61xx driver was a driver for configuring the
switch, but did not integrate with the PHY/networking system, so
it could not be used as a PHY by U-boot. This is a complete
rework to support this device as a PHY.Signed-off-by: Kevin Smith
Acked-by: Prafulla Wadaskar
Cc: Albert ARIBAUD
Cc: Joe Hershberger
Cc: Stefan Roese
Cc: Marek Vasut
Acked-by: Joe Hershberger -
No boards are using this driver. Remove in preparation for a new
driver with integrated PHY support.Signed-off-by: Kevin Smith
Acked-by: Joe Hershberger
Cc: Prafulla Wadaskar
Cc: Albert ARIBAUD
Cc: Stefan Roese
Cc: Marek Vasut
24 May, 2016
8 commits
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Signed-off-by: Tom Rini
Conflicts:
drivers/net/zynq_gem.c -
Extending Kconfig for adding new platform is a lot of work
for nothing. Setting SYS_CONFIG_NAME directly in Kconfig and
remove all dependencies on TARGET_ZYNQ_* options including SPL.
As a side-effect it also remove custom init folder for ps7_init_gpl.*
files. Folder is chosen based on device-tree file.Signed-off-by: Michal Simek
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The patch
"net: phy: do not read configuration register on reset"
(sha1: a058052c358c3ecf5f394ff37def6a45eb26768c)
was causing regression on zynq zc702 board where Marwell 88e1118
phy was resetted after negotiation was setup.
Phy reset is done pretty early in phy_connect_dev() and doens't need to
be called again in phy code.Signed-off-by: Michal Simek
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Fix zynq_gem driver to handle error from phy_config correctly.
Signed-off-by: Michal Simek
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Add function boot_get_fpga() which find and load bitstream to
programmable logic if fpga entry is present.
Function is supported on Xilinx devices for full and partial bitstreams
in BIN and BIT format.Signed-off-by: Michal Simek
Remove additional blankline in image.h -
Propagate error code from genphy_update_link() to phy startup().
Signed-off-by: Michal Simek
Acked-by: Stephen Warren
