08 Aug, 2009
10 commits
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This patch provides bug fix, when omap3 uses nor boot.
Signed-off-by: Penda Naveen Kumar
Acked-by: Dirk Behme -
The attached patch corrects an error in the examples/Makefile which
causes the applications in the examples directory to hang on OMAP3
based boards. The current Makefile sets -Ttext during linking to
0x0c100000 which is outside of addressable SDRAM memory. The script
corrects the existing ifeq...else...endif logic to look at the VENDOR
tag rather than the CPU tag.The patch affects the following configs: omap3_beagle_config,
omap3_overo_config, omap3_evm_config, omap3_pandora_config,
omap3_zoom1_config and omap3_zoom2_config.Signed-off-by: Michael Evans
Edited commit message.
Signed-off-by: Wolfgang Denk -
replace variable types in ctrl_structs for omap3 by those with
fixed size (u8, u16, u32).
Additional ifndef-protection is needed by examples which do not
compile when including asm/types.hSigned-off-by: Matthias Ludwig
Signed-off-by: Dirk Behme -
Signed-off-by: Matthias Ludwig
Signed-off-by: Dirk Behme -
Signed-off-by: Matthias Ludwig
Signed-off-by: Dirk Behme -
Based on Intel PRO/1000 Network Driver 7.3.20-k2
Add Intel E1000 PCIE card support. The following cards are added:
INTEL_82571EB_COPPER
INTEL_82571EB_FIBER,
INTEL_82571EB_SERDES
INTEL_82571EB_QUAD_COPPER
INTEL_82571PT_QUAD_COPPER
INTEL_82571EB_QUAD_FIBER
INTEL_82571EB_QUAD_COPPER_LOWPROFILE
INTEL_82571EB_SERDES_DUAL
INTEL_82571EB_SERDES_QUAD
INTEL_82572EI_COPPER
INTEL_82572EI_FIBER
INTEL_82572EI_SERDES
INTEL_82572EI
INTEL_82573E
INTEL_82573E_IAMT
INTEL_82573L
INTEL_82546GB_QUAD_COPPER_KSP3
INTEL_80003ES2LAN_COPPER_DPT
INTEL_80003ES2LAN_SERDES_DPT
INTEL_80003ES2LAN_COPPER_SPT
INTEL_80003ES2LAN_SERDES_SPT82571EB_COPPER dual ports,
82572EI single port,
82572EI_COPPER single port PCIE cards
and
82545EM_COPPER,
82541GI_LF
pci cards are tested on both P2020 board
and MPC8544DS board.Signed-off-by: Roy Zang
Signed-off-by: Ben Warren
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In the previous enetaddr refactoring, the assumption with commit 56b555a644
was that the eth layer would handle the env -> device enetaddr syncing.
This was not the case as eth_initialize() is called only once and the sync
occurs there. So make sure the eth_init() function does the env -> device
sync with every network init.Reported-by: Andrzej Wolski
Signed-off-by: Mike Frysinger
Signed-off-by: Ben Warren -
Minor ./net cleanups - no functional changes
- change #ifdef DEBUG printf(); #endif to just debug()
- changed __FUNCTION__ to __func__
- got rid of extra whitespace between function and opening brace
- removed unnecessary braces on if statementsgcc dead code elimination should make this functionally/size equivalent
when DEBUG is not defined. (confirmed on Blackfin, with gcc 4.3.3).Signed-off-by: Robin Getz
Signed-off-by: Ben Warren
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Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.htmlSigned-off-by: Matthias Ludwig
05 Aug, 2009
1 commit
03 Aug, 2009
1 commit
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For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses. All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.No documented erratum justifies these accesses. It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).Here's a patch disabling what seems to be bogosity. Tested on a
csb337; there were no behavioral changes.Signed-off-by: David Brownell
on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD
01 Aug, 2009
2 commits
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Fix a typo in the GCDR(x) macro. It's a good thing no one was using it.
Signed-off-by: David Hunter
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Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260.
Signed-off-by: Eric Benard
30 Jul, 2009
7 commits
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Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
This patch is based on a diff created by Phong Vo from AMCC.
Signed-off-by: Phong Vo
Signed-off-by: Stefan Roese -
This patch is based on a diff created by Phong Vo from AMCC.
Signed-off-by: Phong Vo
Signed-off-by: Stefan Roese -
Some Canyonlands boards are equipped with different SODIMM's. This is no
problem with the "normal" NOR booting Canyonlands U-Boot, since it
automatically detects the SODIMM's via SPD data and correctly configures
them. But the NAND booting version is different. Here we only have 4k
of image size to completely setup the hardware, including DDR2 setup.
So we need to use a fixed DDR2 setup here. This doesn't work for different
SODIMM's right now.Currently only this Crucial SODIMM is support:
CT6464AC667.8FB (dual ranked)Now some boards are shipped with this SODIMM:
CT6464AC667.4FE (single ranked)This patch now supports both SODIMM's by configuring first for the dual
ranked DIMM. A quick shows, if this module is really installed. If this test
fails, the DDR2 controller is re-configured for the single
ranked SODIMM.Tested with those SODIMM's:
CT6464AC667.8FB (dual ranked)
CT6464AC667.4FE (single ranked)Signed-off-by: Stefan Roese
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This patch moves the load addresses for kernel, fdt and ramdisk to higher
addresses (>= 16MB). This enables booting of bigger kernel images (e.g.
lockdep enabled).Signed-off-by: Stefan Roese
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This patch changes CONFIG_SYS_BOOTMAPSZ from 8MB to 16MB which is the
initial TLB on 40x PPC's in the Linux kernel. With this change even bigger
Linux kernels (> 8MB) can be booted.This patch also sets CONFIG_SYS_BOOTM_LEN to 16MB (default 8MB) to enable
decompression of bigger images.Signed-off-by: Stefan Roese
29 Jul, 2009
11 commits
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"All Rights Reserved" conflicts with the GPL.
Signed-off-by: Kumar Gala
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Signed-off-by: Alessandro Rubini
Acked-by: Andrea Gallo
Acked-by: Jean-Christophe PLAGNIOL-VILLARD -
Signed-off-by: Alessandro Rubini
Acked-by: Andrea Gallo
Acked-by: Jean-Christophe PLAGNIOL-VILLARD -
These defines have been subplanted by the equivelent defines in
include/twl4030.hSigned-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
Because twl4030 now has its own device files, move and rename
twl4030_mmc_config.twl4030_mmc_config initializes the twl4030 power setting to
the mmc device. Because it is in the twl4030 power domain, move
it out of drivers/mmc/omap3_mmc.c and into drivers/power/twl4030.c.The function was renamed to twl4030_power_mmc_init because all
the functions in this file are to have the formattwl4030_power__
In this case the suffix is mmc_init so
device : mmc
action : initSigned-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
Because twl4030 now has its own device files, move exiting
omap3 power_init_r to a new location.power_init_r is the only function in board/omap3/common.
It initializes the twl4030 power for the board and enables
the led.The power part of the the function is moved to twl4030_power_init in
drivers/power/twl4030.c The power compilation is conditional on the
existing config variable CONFIG_TWL4030_POWER.The led part is moved to twl4030_led_init in the new file
drivers/misc/twl4030_led.c The led compilation is conditional on
the new config variable CONFIG_TWL4030_LEDThe directory board/omap3/common was removed because power_init_r
was the only function in it.Signed-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
Commit 2b3f12c2 added support for configurable SMC Rx buffer length on
8xx systems. Enable this feature on TQM8xx* based boards.This fixes the problem that pasting text in the middle of a line
(i. e. inserting in edit mode) did not work - only the first two
characters got inserted, the rest was lost.Signed-off-by: Wolfgang Denk
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Make the ext2load command return 0 on success (instead of the file
length).Also fix output format (get rid of random newlines) and some coding
style issues (long lines etc.).Signed-off-by: Wolfgang Denk
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Signed-off-by: unsik Kim
Signed-off-by: Bernhard Weirich
Signed-off-by: Wolfgang Denk
Tested-by: Wolfgang Denk
28 Jul, 2009
8 commits
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The Zoom2 power reset button is on the top right side of the
main board. Press and hold for about to 8 seconds to completely
reset the board.Some of the beta boards have a hardware problem that prevents
using this feature. If is difficult to further characterize the
boards that fail. So disable resetting for all beta boards.The Zoom1 reset button is the red circle on the top right,
front of the board. Press and hold the button for 8 seconds to
completely reset the board.After analyzing beagle, it was determined that other boards
that use the twl4030 for power managment can also make use
this function.The resetting is done by the power management part of the twl4030.
Since there is no existing drivers/power, add one.The compilation of power/twl4030.h is controlled by the config
variable CONFIG_TWL4030_POWERSigned-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
The TWL4030 supplies many peripherals for OMAP3 boards. These include
power management, usb and, keyboard.The product description is found here:
http://focus.ti.com/docs/prod/folders/print/tps65950.html
Product reference document, tps65950.pdf, is found here:
http://www.ti.com/lit/gpn/tps65950
Signed-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is usedBefore :
In: serial
Out: serial
Err: serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
02 03 04 05 06 07 08 09 0A 0B 0C 0DAfter :
In: serial
Out: serial
Err: serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot: 0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4BThe addresses are for the twl4030.
The prescalar that converts the function clock to the sampling
clock is hardcoded to 0. The reference manual recommends 7
if the function clock is 96MHz.Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.The i2c #defines are in kHz. The speed passed into the
i2c init routine is in Hz. To be consistent, change the
defines to be in Hz.The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.The major variables in the timing caculations are
specified as #defines that can be overriden as required.The variables and their defaults are
I2C_IP_CLK SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK 19200000
I2C_FASTSPEED_SCLL_TRIM 6
I2C_FASTSPEED_SCLH_TRIM 6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH I2C_FASTSPEED_SCLH_TRIMThis was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.Signed-off-by: Tom Rix
Acked-by: Jean-Christophe PLAGNIOL-VILLARD
Acked-by: Heiko Schocher -
Signed-off-by: Heiko Schocher
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This patch fixes the problem, that the current fdt board fixup code only
set's one range, the one for NOR. By this it's overwriting the already
correctly configured values done in __ft_board_setup(). Just remove this
now unneeded NOR fixup and all the ranges are correctly defined.Signed-off-by: Stefan Roese
Cc: Dirk Eibach
Cc: Felix Radensky -
This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").Additionally some incorrectly indented lines are fixed.
Signed-off-by: Stefan Roese
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DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx
targets. Otherwise the configured fixed init values for some DDR2
controller registers (e.g. RQDC) are not initialized at all resulting
in a non working SDRAM.Signed-off-by: Stefan Roese
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Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.Signed-off-by: Stefan Roese
