19 May, 2020
1 commit
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Current mxc_gpio DM driver allocates the platdata in bind function to
handle both OF_CONTROL enabled case and disabled case. This implementation
puts the devfdt_get_addr in bind, which introduces much overhead especially
in board_f phase.Change the driver to a common way for handling the cases by using
ofdata_to_platdata and using DM framework to allocate platdata.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit b1d08b73756f5090aa33edda98edd239cfca3f4e)
27 Apr, 2020
1 commit
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For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.Signed-off-by: Ye.Li
(cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1)
Signed-off-by: Peng FanConflicts:
drivers/gpio/mxc_gpio.c(cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee)
Signed-off-by: Peng Fan
(cherry picked from commit faf94726cac8316c4342e19936f1e03ef283ace3)
(cherry picked from commit 6c0474fe0e4fc543c62b22c05c2702a881f56418)
(cherry picked from commit 7cd5fec7ce6a9ecfdaa1a9c1aaaa0d0ac18a4f86)
(cherry picked from commit 74d68c1b9f098c44992d591616372f0ec5ff13dd)
(cherry picked from commit 208c009aa15453349ee9272d62e2c1cebe14ecab)
23 Apr, 2020
2 commits
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Currently the driver gets value from PSR register, but this register
is only for input mode. For output mode, it always return 0 not the
value we set for output.This patch changes to use DR register, which returns the DR value for
output mode, and PSR value for input mode.Signed-off-by: Ye Li
(cherry picked from commit 4afc3f90943c6b117f79b66d2cd04e64f437b0c2)
(cherry picked from commit 8cca3efba0d508b2c267f8a32b302970dd05244d)
(cherry picked from commit 7980dc9700bdeb610cfa91b4b53abe450c688b9b) -
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms,
so we have to adjust the index accordingly.Signed-off-by: Adrian Alonso
Signed-off-by: Ye Li
(cherry picked from commit 98aad7e51feb8b5010511d82b39e71d6e68c7ee7)
31 Mar, 2020
3 commits
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Some SoCs in the mpc83xx family, e.g. mpc8309, have a dedicated spi
chip select, SPISEL_BOOT, that is used by the boot code to boot from
flash.This chip select will typically be used to select a SPI boot
flash. The SPISEL_BOOT signal is controlled by a single bit in the
SPI_CS register.Implement a gpio driver for the spi chip select register. This allows a
spi driver capable of using gpios as chip select, to bind a chip select
to SPISEL_BOOT.It may be a little odd to do this as a GPIO driver, since the signal
is neither GP or I, but it is quite convenient to present it to the
spi driver that way. The alternative it to teach mpc8xxx_spi to handle
the SPISEL_BOOT signal itself (that is how it's done in the linux
kernel, see commit 69b921acae8a)Signed-off-by: Klaus H. Sorensen
Signed-off-by: Rasmus Villemoes -
The driver correctly handles reading back the value of an output gpio
by reading from the shadow register for output, and from gpdat for
inputs.Unfortunately, when setting the value of some gpio, we do a RMW cycle
on the gpdat register without taking the shadow register into account,
thus accidentally setting other output gpios (at least those whose
value cannot be read back) to 0 at the same time.When changing a gpio from input to output, we still need to make sure
it initially has the requested value. So, the procedure is- update the shadow register
- compute the new gpdir register
- write the bitwise and of the shadow and new gpdir register to gpdat
- write the new gpdir registerSigned-off-by: Rasmus Villemoes
-
Since some chips don't support reading back the value of output gpios
from the gpdat register, we should not do a RMW cycle (i.e., the
clrbits_be32) on the gpdat register when setting a gpio as input, as
that might accidentally change the value of some other (still
configured as output) gpio.The extra indirection through mpc8xxx_gpio_set_in() does not help
readability, so just fold the gpdir update into
mpc8xxx_gpio_direction_input().Signed-off-by: Rasmus Villemoes
11 Feb, 2020
1 commit
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sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
09 Feb, 2020
1 commit
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Since commit bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL")
CONFIG_DM_74X164 is no longer built for mx7dsabresd_defconfig, as
this target does not use CONFIG_SPL_GPIO.Remove such dependency and let the the 74X164 GPIO driver be built
again.This restores Ethernet functionality on the imx7-sdb board as the
Ethernet reset PHY comes from a GPIO driven by a 74LV595PW I/O
expander.Fixes: bcee8d6764f9 ("dm: gpio: Allow control of GPIO uclass in SPL")
Signed-off-by: Fabio Estevam
Reviewed-by: Tom Rini
Tested-by: Alifer Moraes
08 Feb, 2020
1 commit
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DM_GPIO based GPIO controller driver for CAxxxx SoCs.
This driver support multiple CPU architectures and
Cortina Access SoC platforms.Reviewed-by: Daniel Schwierzeck
Signed-off-by: Jason Li
Signed-off-by: Alex Nemirovsky
06 Feb, 2020
3 commits
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At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass
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At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.Signed-off-by: Simon Glass
Reviewed-by: Anatolij Gustschin -
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().Signed-off-by: Simon Glass
05 Feb, 2020
1 commit
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- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
04 Feb, 2020
6 commits
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Fix the following in intel_gpio_get_value():
* The value of the register is contained in the variable 'reg', not in
'mode'. The variable 'mode' contains only the configuration whether
the gpio is currently an input or an output.* The correct bitmasks for the input and output value are
PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE.
Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and
PAD_CFG0_TX_STATE_BIT.Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
Add missing 'PAD_CFG0_TX_STATE' to the clear mask for pcr_clrsetbits32().
Otherwise this bit cannot be cleared again after it has been set once.Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
The function pcr_clrsetbits32() expects a device with a P2SB parent
device. In intel_gpio_direction_output() and intel_gpio_set_value()
the device 'dev' is passed to pcr_clrsetbits32(), which is a
gpio-controller with a device 'pinctrl' as parent. This does not match
the expectations of pcr_clrsetbits32(). But the 'pinctrl' device has a
P2SB as parent.Pass the 'pinctrl' device instead of the 'dev' device to
pcr_clrsetbits32().Signed-off-by: Wolfgang Wallner
Reviewed-by: Bin Meng -
Add "ti,keystone-gpio" compatible so as be able to use Linux DT files as
is.Signed-off-by: Vignesh Raghavendra
Signed-off-by: Faiz Abbas
Signed-off-by: Lokesh Vutla -
Fix below compiler warning for 64bit builds
drivers/gpio/da8xx_gpio.c: In function ‘davinci_get_gpio_bank’:
drivers/gpio/da8xx_gpio.c:446:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
return (struct davinci_gpio *)addr;Signed-off-by: Vignesh Raghavendra
Signed-off-by: Faiz Abbas
Signed-off-by: Lokesh Vutla -
J721e EVM has a TCA6424 IO expander that has 24 GPIOs. Add support for
the sameSigned-off-by: Vignesh Raghavendra
Signed-off-by: Lokesh Vutla
23 Jan, 2020
1 commit
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This IP is also used on some arm SoC, so we allow to
use it on arm bcm68360 too.Signed-off-by: Philippe Reynes
15 Jan, 2020
1 commit
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Add i.MXRT1050 support, there are 5 GPIO banks.
Signed-off-by: Giulio Benetti
15 Dec, 2019
2 commits
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Add a GPIO driver which uses the pinctrl driver to access the pad
information. This driver relies on the GPIO nodes being subnodes to the
pinctrl device.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
03 Dec, 2019
1 commit
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Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.Signed-off-by: James Byrne
Reviewed-by: Eugen Hristev
31 Oct, 2019
1 commit
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_gpio_direction_output function currently calls gpio_set_value
with the wrong gpio number. gpio_set_value in the uclass driver
expects a different gpio number and the _gpio_direction_output
is currently providing the number specific to the bank.Hence fix it by calling the _gpio_set_value function instead.
Reported-by: Faiz Abbas
Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci")
Signed-off-by: Keerthy
24 Oct, 2019
2 commits
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This patch adds support for gpio driver for pmc gpio.
Signed-off-by: Shubhrajyoti Datta
Signed-off-by: Michal Simek -
This patch adds support for gpio driver for versal platform
Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
18 Oct, 2019
1 commit
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This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra and/or Atish Patra
(many thanks !!). The linux driver can be referred
here [1][1]: https://lkml.org/lkml/2018/10/9/1103
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Bin Meng
10 Oct, 2019
1 commit
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Xilinx/FPGA changes for v2020.01
FPGA:
- Enable fpga loading on Versal
- Minor fixMicroblaze:
- Fix LMB configurations to support initrds
- Some other cleanupsZynq:
- Minor config/dt changes
- Add distro boot support for usb1 and mmc1
- Remove Xilinx private boot commands and use only distro bootZynqMP:
- Kconfig cleanups, defconfig updates
- Update some dt files
- Add firmware driver for talking to PMUFW
- Extend distro boot support for jtag
- Add new IDs
- Add system controller configurations
- Convert code to talk firmware via mailbox or SMCsVersal:
- Add board_late_init()
- Add run time DT memory setup
- Add DFU support
- Extend distro boot support for jtag and dfu
- Add clock driver
- Tune mini configurationsXilinx:
- Improve documentation (boot scripts, dt binding)
- Enable run time initrd_high calculation
- Define default SYS_PROMPT
- Add zynq/zynqmp virtual defconfigDrivers:
- Add Xilinx mailbox driver for talking to firmware
- Clean zynq_gem for Versal
- Move ZYNQ_HISPD_BROKEN to Kconfig
- Wire genphy_init() in phy.c
- Add Xilinx gii2rgmii bridge
- Cleanup zynq_sdhci
- dwc3 fix
- zynq_gpio fix
- axi_emac fixOthers:
- apalis-tk1 - clean config file
09 Oct, 2019
1 commit
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u-boot-imx-20191009
-------------------Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/595148532
- MX6UL / ULZ
- Toradex board
- Allow to set OCRAM for MX6Q/D
- MX7ULP
- MX8: (container image, imx8mq_mek), SCU API
- fix several board booting from SD/EMMC (cubox-i for example)
- pico boards[trini: display5 merged manually]
Signed-off-by: Tom Rini
08 Oct, 2019
4 commits
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After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.Signed-off-by: Lukasz Majewski
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This patch fixes zynq_gpio_direction() to call driver specific
zynq_gpio_set_value function rather than top level gpio_set_value.Signed-off-by: Ashok Reddy Soma
Signed-off-by: Michal Simek -
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:/tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \
-c "ut dm spmi_access_peripheral" -L7 -v
...
pm8916_gpio_probe() bad address: returning err=-22Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
24 Aug, 2019
1 commit
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This converts the following to Kconfig:
CONFIG_MXS_GPIOTravis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/571260789
Signed-off-by: Lukasz Majewski
Acked-by: Peng Fan
Acked-by: Jagan Teki
29 Jul, 2019
1 commit
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recently added gpio hog patch was "in discussion"
state with Simon Glass. This patch now adds most
of comments from Simon Glass.Signed-off-by: Heiko Schocher
20 Jul, 2019
1 commit
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Add missing parenthesis to the GPIO_TO_PORT macro.
Signed-off-by: Lukasz Majewski
Reviewed-by: Peng Fan
19 Jul, 2019
1 commit
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This patch adds support for DM/DTS in the mxs_gpio.c driver.
Information regarding per gpio controller pin number is passed via DTS.Signed-off-by: Lukasz Majewski
Reviewed-by: Marek Vasut
16 Jul, 2019
1 commit
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- Beelink-x2 STB support (Marcus)
- H6 DDR3, LPDDR3 changes (Andre, Jernej)
- H6 pin controller, USB PHY (Andre)