06 Dec, 2014
20 commits
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Add support for Cortina CS4315/CS4340 10G PHY.
- This driver loads CS43xx firmware from NOR/NAND/SPI/SD device
to initialize Cortina PHY.
- Cortina PHY has non-standard offset of PHY ID registers, thus
we define own get_phy_id() to override default get_phy_id().
- To define macro CONFIG_PHY_CORTINA will enable this driver.Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
Increase write-to-write and read-to-read turnaround time for two-slot DDR
configurations. Previously only quad-rank and two dual-rank configurations
have this additional turnaround time. A recent test on two single-rank
DIMMs shows the shorter additional turnaround time is also needed.Signed-off-by: York Sun
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Add configs:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
in C29XPCIE config header file to use U-boot generic
board code.Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
Add configs:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
in P1023RDB config header file to use U-boot generic
board code.Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
Signed-off-by: Tang Yuantian
Reviewed-by: York Sun -
cppcheck reports:
[board/muas3001/muas3001.c:270]: (error) Uninitialized variable: psize
remove the CONFIG_SYS_RAMBOOT define to prevent this error report.
Signed-off-by: Heiko Schocher
Reported-by: Wolfgang Denk
Reviewed-by: York Sun -
This define is never set in our setup, so we can remove it safely. The
former code causes cppcheck to complain about:
[board/keymile/km82xx/km82xx.c:311]: (error) Uninitialized variable:
psizeSigned-off-by: Holger Brunck
cc: Valentin Longchamp
cc: Wolfgang Denk
Reviewed-by: York Sun -
Use generic board architecture for p1010rdb, tested with NOR
boot on p1010rdb-pb.Signed-off-by: Ying Zhang
Reviewed-by: York Sun -
The define CONFIG_FSL_SATA_V2 is missing, so SATA is not available
in U-boot.Signed-off-by: Shaohui Xie
Reviewed-by: York Sun -
Use generic board architecture for p1025-twr, tested with NOR
boot and NAND boot on p1025-twr.Signed-off-by: Ying Zhang
Reviewed-by: York Sun -
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates the values
into the appropriate commands to set the voltage output
value of an external voltage regulator.Signed-off-by: Ying Zhang
Reviewed-by: York Sun -
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.Signed-off-by: Zhao Qiang
Reviewed-by: York Sun -
Workaround of Errata A-008044 was implemented without errata number and it is
enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0.So put errata number and make it conditional.
Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.Workaround is already in-place.
Put the errata number to adhere errata handling framework.Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
Enable interactive debugging by default. Remove DDR controller interleaving
because this SoC only has one controller. Use auto chip-select interleaving
to detect number of ranks.Signed-off-by: York Sun
CC: Poonam Aggrwal -
T2080 rev 1.1 changes MEM_RAT in RCW, which requires new parsing for ratio,
the same way as T4240 rev 2.0.Signed-off-by: York Sun
CC: Shengzhou Liu -
Adjust timing for dual-rank UDIMM, verified on M3CQ-8GHS3C0E for speed of
1066, 1333, 1600, 1866MT/s. The 1866 timing is copied to 2133 timing in
case such DIMM comes available.Also update single-rank 1866 timing. Enable interactive debugging as well.
Signed-off-by: York Sun
CC: Shengzhou Liu -
Add serdes2 protocol 0x2e.
Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
fman_port_enet_if() tests if FM1_DTSEC2 or FM1_DTSEC4 uses
RGMII or MII and if not returns PHY_INTERFACE_MODE_NONE.
This excludes testing for SGMII further down.Remove the unconditional "else return PHY_INTERFACE_MODE_NONE"
so SGMII can be tested too.Signed-off-by: Joakim Tjernlund
Reviewed-by: York Sun -
To support interactive DDR debugger, cli_simple.o, cli.o, cli_readline.o,
command.o, s_record.o, xyzModem.o and cmd_disk.o are all needed for
drivers/ddr/fsl/interactive.c.In current common/Makefile, the above .o files are only produced when
CONFIG_SPL_BUILD is disabled.For LS102xA, interactive DDR debugger is needed in SD/NAND boot too, and
I enabled CONFIG_FSL_DDR_INTERACTIVE. But according to the current
common/Makfile, all the above .o files are not produced in SPL part
because CONFIG_SPL_BUILD is enabled in SPL part, the following error
will be shown,drivers/ddr/fsl/built-in.o: In function `fsl_ddr_interactive':
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1871:
undefined reference to `cli_readline_into_buffer'
/home/wangh/layerscape/u-boot/drivers/ddr/fsl/interactive.c:1873:
undefined reference to `cli_simple_parse_line'
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2So this patch fixed this issue and the above .o files will be produced
no matter CONFIG_SPL_BUILD is enabled or disabled.Signed-off-by: Alison Wang
Reviewed-by: York Sun
27 Nov, 2014
20 commits
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Signed-off-by: Daniel Schwierzeck
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The initramfs is currently only relocated if the user calls
the bootm ramdisk subcommand. If bootm should be used without
subcommands, the arch-specific bootm code needs to implement
the relocation.Signed-off-by: Daniel Schwierzeck
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After all MIPS boards are switched to generic-board, the
MIPS specific board.c can be removed.Signed-off-by: Daniel Schwierzeck
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Signed-off-by: Daniel Schwierzeck
Acked-by: Stefan Roese -
Signed-off-by: Daniel Schwierzeck
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Signed-off-by: Daniel Schwierzeck
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Signed-off-by: Daniel Schwierzeck
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To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.Signed-off-by: Daniel Schwierzeck
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Merge struct s3c2410_nand and struct s3c2440_nand into one unified
struct s3c24x0_nand. While at it, fix up and rename the functions
to retrieve the NAND base address and fix up the s3c NAND driver to
reflect this change.Signed-off-by: Marek Vasut
Cc: Kyungmin Park
Cc: Lukasz Majewski
Cc: Minkyu Kang
Cc: Scott Wood
Cc: Vladimir Zapolskiy -
This patch disables subpage writes for vf610_nfc nand
driver. This is required, as without this fix, writing
unaligned u-boot images with DFU results in a hang.
Trying to write unalgined binary images also results
in a hang, without disabling subpage writes.Patch has been tested on a Colibri VF61 module.
Signed-off-by: Sanchayan Maity
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Some but not all of implementations of the Denali NAND controller
have hardware circuits to detect the device parameters such as
page_size, erase_size, etc. Even on those SoCs with such hardware
supported, the hardware is known to detect wrong parameters for some
nasty (almost buggy) NAND devices. The device parameters detected
during nand_scan_ident() are more trustworthy.This commit sets some hardware registers to mtd->pagesize,
mtd->oobsize, etc. in the code between nand_scan_ident() and
nand_scan_tail().Signed-off-by: Masahiro Yamada
Cc: Scott Wood
Cc: Chin Liang See -
Some variants of the Denali NAND controller need some registers
set up based on the device information that has been detected during
nand_scan_ident().CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between
nand_scan_ident() and nand_scan_tail(). It is also helpful to reduce
the difference between this driver and its Linux counterpart because
this driver was ported from Linux. Moreover, doc/README.nand recommends
to use CONFIG_SYS_NAND_SELF_INIT.Signed-off-by: Masahiro Yamada
Cc: Scott Wood
Cc: Chin Liang See -
Commit ff94bc40af3481d47546595ba73c136de6af6929
("mtd, ubi, ubifs: resync with Linux-3.14")
accidentally reverted part of the commit
13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde
("NAND: Scan bad blocks lazily.").Reinstate the change as by commit
fb49454b1b6c7c6e238ac3c0b1e302e73eb1a1ea
("nand: reinstate lazy bad block scanning")Signed-off-by: Rostislav Lisovy
Acked-by: Heiko Schocher -
Conflicts:
drivers/mmc/fsl_esdhc.cSigned-off-by: Tom Rini
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Commit 9f12cd0e062614e19734b2ab37842d387457c5e5 has broken SPL EXT support.
This patch update error code check to get SPL EXT support working again.Tested on a Pandaboard (rev. A3).
Reviewed-by: Suriyan Ramasami
Reviewed-by: Simon Glass
Signed-off-by: Guillaume GARDET
Cc: Tom Rini
