22 Apr, 2015

1 commit

  • The Debug Server driver is responsible for loading the Debug
    server FW on the Service Processor (Cortex-A5 core) on LS2085A like
    SoCs and then polling for the successful initialization of the same.
    TOP MEM HIDE is adjusted to ensure the space required by Debug Server
    FW is accounted for. MC uses the DDR area which is calculated as:

    MC DDR region start = Top of DDR - area reserved by Debug Server FW

    Signed-off-by: Bhupesh Sharma
    Reviewed-by: York Sun

    Bhupesh Sharma