06 May, 2014
2 commits
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Add missing header.
Warnings:
drivers/net/zynq_gem.c:491:5: warning: symbol 'zynq_gem_initialize' was not declared. Should it be static?
drivers/net/zynq_gem.c:542:5: warning: symbol 'zynq_gem_of_init' was not declared. Should it be static?Signed-off-by: Michal Simek
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MII is used by this driver.
Signed-off-by: Michal Simek
04 Mar, 2014
1 commit
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Gem can be directly initialized from DTB.
Signed-off-by: Michal Simek
19 Feb, 2014
2 commits
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Remove hard coded clock divider setting and use the Zynq clock framework
to dynamically calculate appropriate dividers at run time.Signed-off-by: Soren Brinkmann
Signed-off-by: Michal Simek -
The GEM driver should not need to know about Zynq specific details of
RCLK related registers and bitfields in the SLCR. Move those details to
the slcr driver.Signed-off-by: Soren Brinkmann
Signed-off-by: Michal Simek
21 Jan, 2014
1 commit
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As tsec and fm drivers checking phydev->link
ensure that u-boot don't try access device if link is not ready.Signed-off-by: Michal Simek
23 Nov, 2013
1 commit
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Added d-cache support for zynq_gem.c,
Observed a difference of +0.8 MiB/s when downloading
a file of size of 3007944Bytes.With d-cache OFF:
----------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
#################################################################
#################################################################
##########
1.3 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)With d-cache ON:
---------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
#################################################################
#################################################################
##########
2.1 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)Changes on zynq_gem for d-cache support:
- Tx and Rx buffers are cache-aligned
- Updated logic for invalidating Rx buffers and flushing Tx buffers.
- Tx and Rx BD's are allocated from non-cacheable region.
(When BDs are cached, we don't see a consistent link)
- Use TX BD status intead of txsr status checks.Signed-off-by: Srikanth Thokala
Signed-off-by: Jagannadha Sutradharudu Teki
Signed-off-by: Michal Simek
15 Oct, 2013
1 commit
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Signed-off-by: Wolfgang Denk
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
30 Apr, 2013
7 commits
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Autodetect phy if phyaddress is setup to -1.
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Avoid overwriting GEMx_RCLK_CTRL and GEMx_CLK_CTRL
if the Ethernet interface is connect on EMIODo not enable emio for this standard board configuration for now.
Signed-off-by: David Andrey
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Pass the PHY address to the driver init to
allow parallel use of both interfacesSigned-off-by: David Andrey
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
The whole driver used 100Mbps because of zc702 rev B.
Fix problem with not setup proper clock for gem1.
This is generic approach for clk setup.Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
BDs can be correctly setup just once and init function
performs only phy autodetection and enabling RX/TX.
RX/TX are disabled in halt function.This patch solves the problem with repeatable tftp transfers.
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Remove one return from the code.
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Removing this bit causes that frame is sent only once.
(With wrap big one packet has been sent several times
which dramatically decrease throughput)TRM: (Table 16-3: Tx Buffer Descriptor Entry)
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
27 Sep, 2012
1 commit
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Device driver for Zynq Gem IP.
Signed-off-by: Michal Simek
CC: Joe Hershberger
CC: Marek Vasut
Acked-by: Marek Vasut