16 Jul, 2020

2 commits

  • In current code, we add 1ms dealy after each tuning command for standard
    tuning method. Adding this 1ms dealy is because USDHC default check the
    CMD CRC and DATA line. If detect the CMD CRC, USDHC standard tuning
    IC logic do not wait for the tuning data sending out by the card, trigger
    the buffer read ready interrupt immediately, and step to next cycle. So
    when next time the new tuning command send out by USDHC, card may still
    not send out the tuning data of the upper command,then some eMMC cards
    may stuck, can't response to any command, block the whole tuning procedure.

    If do not check the CMD CRC for tuning, then do not has this issue. USDHC
    will wait for the tuning data of each tuning command and check them. If the
    tuning data pass the check, it also means the CMD line also okay for tuning.

    So this patch disable the CMD CRC check for tuning, save some time for the
    whole tuning procedure.

    Signed-off-by: Haibo Chen
    (cherry picked from commit ba61676ff9f8225ebc0ea33ad9f48862e718fd01)
    (cherry picked from commit b76091fde0aa88ba763cfa1db80b72702653c3b2)

    Haibo Chen
     
  • According the RM, the bit[6~0] of register ESDHC_TUNING_CTRL is
    TUNING_START_TAP, bit[7] of this register is to disable the command
    CRC check for standard tuning. So fix it here.

    Fixes: fa33d207494c ("mmc: split fsl_esdhc driver for i.MX")
    Signed-off-by: Haibo Chen
    (cherry picked from commit 135c10a7834aa7e0f26f52e5173925e695cba48f)
    (cherry picked from commit 9d37d7d83e6b701e1a1f3ea1125aa7073de65064)

    Haibo Chen
     

23 Jun, 2019

2 commits

  • Dropped useless code for i.MX eSDHC driver.

    Signed-off-by: Yangbo Lu
    Tested-by: Steffen Dirkwinkel
    Reviewed-by: Peng Fan
    Reviewed-by: Martyn Welch
    Reviewed-by: Lukasz Majewski

    Yangbo Lu
     
  • The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
    initially. The later QoriQ series PowerPC processors (which were
    evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
    i.MX series processors were using this driver for their eSDHCs too.

    For the two series processors, the eSDHCs are becoming more and
    more different. We should have split it into two drivers, like them
    (sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.

    This patch is just to create a fsl_esdhc_imx driver which is a copy
    of fsl_esdhc driver for i.MX processors. We will convert i.MX processors
    to use fsl_esdhc_imx, and clean up the two drivers separately in the
    future patches.

    Signed-off-by: Yangbo Lu
    Tested-by: Steffen Dirkwinkel
    Reviewed-by: Peng Fan
    Reviewed-by: Martyn Welch

    Yangbo Lu