26 Jun, 2015
1 commit
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This sets the default commands Kconfig to match
include/config_cmd_default.h commands in the common/Kconfig and removes
them from include/configs.Signed-off-by: Joe Hershberger
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates]
Signed-off-by: Tom Rini
01 Jun, 2015
1 commit
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This also selects CONFIG_NET for any CONFIG_CMD_NET board.
Remove the imx default for CONFIG_NET.
This moves the config that was defined by 60296a8 (commands: add more
command entries in Kconfig).Signed-off-by: Joe Hershberger
13 May, 2015
1 commit
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In order to reduce merge conflicts and to maintain the simplest possible
defconfig files, we should be using the savedefconfig feature of Kconfig
every time a new feature is added. This keeps the defconfig settings to
a minimum (only those things not default) and keeps them in the same
order as the Kconfig options.Signed-off-by: Joe Hershberger
Cc: Masahiro Yamada
Acked-by: Stephen Warren
Cc: Tom Rini
16 Mar, 2015
1 commit
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Since commit e02ee2548afe (kconfig: switch to single .config
configuration), the prefixes in defconfig files such as "+S:",
"+ST:", etc., are meaningless.This commit was generated by the following command:
find configs -name '*_defconfig' | xargs sed -i 's/^+*S*T*://'
Signed-off-by: Masahiro Yamada
19 Jan, 2015
1 commit
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This patch adds the new Barco platinum platform. It currently
includes those two boards:platinum-titanium
-----------------
This is the same board as the titanium that is already supported in
mainline U-Boot. But its now moved to this new platform to support
multiple "flavors" of imx6 boards in one directory. Its also moved
to support SPL booting. And with this we use the run-time DDR
configuration of this SPL support. The board is equipped with the
Micron MT41J128M16JT-125 DDR chips. We now can remove the DDR
related registers tuples from the imximage.cfg file. As all this
is done in the SPL at run-time.platinum-picon
--------------
This board is new and based on the MX6DL with 1GiB DDR using the
Micron MT41K256M16HA DDR3 chips. Its also equipped with 2 NAND
chips (each 512MiB).Signed-off-by: Stefan Roese
Cc: Stefano Babic
Cc: Pieter Ronsijn
