13 Nov, 2018
1 commit
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Fix coverity issue CID 3606685: Structurally dead code (UNREACHABLE)
unreachable: This code cannot be reached: return esdhc_getcd_commonShould not return true directly, otherwise the esdhc_getcd_common is
bypassed.Signed-off-by: Ye Li
20 Aug, 2018
1 commit
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Change-Id: Ia8bb6634aa00d7a5dc59a7a33845613155543eaa
Signed-off-by: Chen Guoyin
13 Aug, 2018
1 commit
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This is debug patch, pushed by mistake. Since we already support
DDR3 ARM2 in previous commit, must revert it.This reverts commit d0602d2ee64c9ad2bf38a38bfb84f8ff9ac9b68d.
Signed-off-by: Ye Li
11 Aug, 2018
1 commit
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When rewoked eMMC to MMC socket, change MMC driver can recognize the card
Enable the fastboot to test usb gadgetSigned-off-by: Ye Li
13 Jun, 2018
1 commit
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Secure Storage service in Trusty OS will compute
the encrypted mmc frame and the rpmb proxy inject the frame
to driver directly. So that need to export RPMB related
interface for Secure Storage proxy use.Change-Id: I7f69831a20a440f597d323b610fa615fd4344d05
Signed-off-by: Haoran.Wang
(cherry picked from commit 4d2c1873ce8221e35874265e41dc42a6df169659)
27 Apr, 2018
12 commits
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Flash system partition with fastboot will earse the partition firstly
The 1.2s timeout will fail on some SD Card.
Enlarge it to 5s to make it works for most of sdcardChange-Id: I285df411c7a07025251fd19f4c8e8b549bee2421
Signed-off-by: guoyin.chen
(cherry picked from commit 642d77fb6d6412095faa6584eeef7bb0132cae57) -
Update for HS400 ES and enable iMX8QM/QXP for HS400 and HS400 ES.
Signed-off-by: Ye Li
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The eMMC 5.1 supports the HS400 Enhanced Strobe mode, add this
support to mmc.Signed-off-by: Ye Li
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600ms is not enough to erase erase_grp_size for some sdcard.
enlarge to to 1200ms.Change-Id: Ic980794fa3064f92b479b87380e694f853f83c6a
Signed-off-by: zhang sanshan
(cherry picked from commit 4a1db2cd700ea434e25c0692c545e571f5841a00) -
When sd/mmc work at DDR mode, like HS400/HS400ES/DDR52/DDR50 mode,
the actual clock rate is just half of the expected clock.This patch set the DDR_EN bit first for DDR mode, hardware divide
the usdhc clock automatically, then follow the original sdr clock
setting method.Signed-off-by: Haibo Chen
Signed-off-by: Ye Li -
Add CONFIG_MX8 to use the 64bits support in usdhc driver.
Signed-off-by: Ye Li
(cherry picked from commit ec3bed8d0a73cea364981839c7a8ea716640c92f) -
The formal production name starts with imx, so change relevant names
in codes to use this prefix.Signed-off-by: Ye Li
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Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.Signed-off-by: Ye Li
(cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit 2d3b5df8530cd5ef883750378838dea7c40259af) -
The wp-gpios property is used for gpio, if this is set, the WP pin is muxed
to gpio function, can't be used as internal WP checking.This patch changes to examine the "fsl,wp-controller" for using internal WP checking. And
wp-gpios for using gpio pin.Signed-off-by: Ye Li
(cherry picked from commit 733a7fde6fea35d6f2ea18c7759a06904b655e54) -
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "Signed-off-by: Peng Fan
Cc: Jaehoon Chung
Cc: Stefano Babic -
Add HS400 support.
Selecting HS400 needs first select HS199 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.Signed-off-by: Peng Fan
Cc: Jaehoon Chung
Cc: Jean-Jacques Hiblot
Cc: Stefano Babic
Cc: Simon Glass
Cc: Kishon Vijay Abraham I
Cc: Bin Meng -
sd_read_ssr returns 0, means no error.
Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")Signed-off-by: Peng Fan
Cc: Jaehoon Chung
Cc: Jean-Jacques Hiblot
06 Mar, 2018
1 commit
05 Mar, 2018
2 commits
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Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.This commit moves the header code:
include/libfdt.h -> include/linux/libfdt.h
include/libfdt_env.h -> include/linux/libfdt_env.hand replaces include directives:
#include -> #include
#include -> #includeReported-by: Thomas Petazzoni
Signed-off-by: Masahiro Yamada -
Add entries for the R8A77965 M3N SoC.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
Cc: Jaehoon Chung
Cc: Masahiro Yamada
01 Mar, 2018
2 commits
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This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek -
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
26 Feb, 2018
5 commits
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mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.Signed-off-by: Alex Kiernan
Signed-off-by: Jean-Jacques Hiblot
Tested-by: Adam Ford
Reviewed-by: Tom Rini -
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.Signed-off-by: Jean-Jacques Hiblot
Tested-by: Adam Ford
Reviewed-by: Tom Rini -
This reduces the size of the binary by about 196 bytes.
Signed-off-by: Jean-Jacques Hiblot
Tested-by: Adam Ford
Reviewed-by: Tom Rini -
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.This saves around 740 bytes for the am335x_evm SPL.
Signed-off-by: Jean-Jacques Hiblot
Tested-by: Adam Ford
Reviewed-by: Tom Rini
23 Feb, 2018
3 commits
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MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.Signed-off-by: Alexander Kochetkov
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Drop the unnecessary empty function case for mmc_probe().
Signed-off-by: Faiz Abbas
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Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.Signed-off-by: Marek Vasut
Cc: Jaehoon Chung
Cc: Masahiro Yamada
21 Feb, 2018
1 commit
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If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.Signed-off-by: Jaehoon Chung
19 Feb, 2018
9 commits
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When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.Signed-off-by: Alex Kiernan
Tested-by: Robert Nelson
Reviewed-by: Sam Protsenko -
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.Fix this by adding the missing version in the correspondence table.
Reported-by: eil Eilmsteiner Heribert
Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Simon Glass
Reviewed-by: Sam Protsenko -
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.This fixes a problem seen with QEmu emulating a vexpress-a15.
Reported-by: Jonathan Gray
Signed-off-by: Jean-Jacques Hiblot
Tested-by: Jonathan Gray -
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Jean-Jacques Hiblot -
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Jean-Jacques Hiblot -
This callback is used to send the 74 clock cycles after power up.
Signed-off-by: Jean-Jacques Hiblot
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When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)Signed-off-by: Jean-Jacques Hiblot
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The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.Signed-off-by: Jean-Jacques Hiblot
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AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Jean-Jacques Hiblot
