30 Jan, 2015
5 commits
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Unify and move code in arch/mips/cpu/mips[32|64]/ to arch/mips/cpu/.
The CPU specific config.mk files need to remain until
CONFIG_STANDALONE_LOAD_ADDR is converted to a global Kconfig symbol.Signed-off-by: Paul Burton
Signed-off-by: Daniel Schwierzeck -
Move all au1x00 code out of arch/mips/cpu/mips32 to allow
unification of CPU code in a later patch. The reorganization
of the SoC specific header files will be done in a later patch
series.Signed-off-by: Daniel Schwierzeck
Cc: Paul Burton -
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle setting the KX bit of the cop0 Status register when the
mips32 start.S is built for mips64.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck -
In preparation for sharing a single copy of start.S between mips32 &
mips64, handle mips64 relocations in the mips32 start.S when built for
mips64.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck -
Where the mips32 & mips64 implementations of start.S differ in terms of
access sizes & offsets, use the appropriate macros from asm.h to
abstract those differences away. This is in preparation for sharing a
single copy of start.S between mips32 & mips64.The exception to this is loads of immediates to be written to the cop0
Config register, which is a 32bit register on mips64 and therefore
constants written to it can be loaded as such.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck
29 Jan, 2015
3 commits
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The mips32 & mips64 cache initialization code differs only in that the
mips32 code supports reading the cache size from coprocessor 0 registers
at runtime. Move the more developed mips32 version to a common
arch/mips/lib/cache_init.S & remove the now-redundant mips64 version in
order to reduce duplication. The temporary registers used are shuffled
slightly in order to work for both mips32 & mips64 builds. The RA
register is defined differently to suit mips32 & mips64, but will be
removed by a later commit in the series after further cleanup.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck -
Move the more developed mips32 version of the cache maintenance
functions to a common arch/mips/lib/cache.c, in order to reduce
duplication between mips32 & mips64.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck -
As a step towards unifying the cache maintenance code for mips32 &
mips64 CPUs, stop using ".set " directives in the more developed
mips32 version of the code. Instead, when present make use of the GCC
builtin for emitting a cache instruction. When not present, simply don't
bother with the .set directives since U-boot always builds with
-march=mips32 or higher anyway.Signed-off-by: Paul Burton
Cc: Daniel Schwierzeck
21 Jan, 2015
3 commits
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Implement MIPS specific setup of the gd_t structure to support
pre-relocation malloc. If CONFIG_SYS_MALLOC_F_LEN is specified,
a memory area will be reserved after the initial stack area and
the gd->malloc_base pointer will be initialized.After this patch the new driver model can be used on MIPS.
Signed-off-by: Daniel Schwierzeck
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Support the existing config option CONFIG_SYS_INIT_SP_ADDR on
MIPS. This allows to move the initial stack to other places
than the beginning of RAM.Signed-off-by: Daniel Schwierzeck
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The common code just needs the C0_COUNT as free running counter,
without the need of writing and checking C0_COMPARE.The function get_tbclk() is still implemented here instead of changing
all places of CONFIG_SYS_MIPS_TIMER_FREQ to CONFIG_SYS_TIMER_RATE.The change was tested on a MIPS32 system, but as the MIPS64 code
was/is the same, this should be no problem.Signed-off-by: Thomas Langer
27 Nov, 2014
1 commit
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To get correct stack walking and backtrace functionality in gdb,
registers fp and ra should be initialized before calling board_init_f
or board_init_r. Thus allocating stack space and zeroing it as it is
currently done in board.c becomes obsolete.Signed-off-by: Daniel Schwierzeck
23 Nov, 2014
2 commits
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Use "obj-$(CONFIG_FOO) += foo/" where it is possible.
Signed-off-by: Masahiro Yamada
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Some CPUs of some architectures have SOC directories.
At present, the build system directly descends into SOC directories
from the top Makefile, but it should generally descend into each
directory from its parent directory.Signed-off-by: Masahiro Yamada
21 Nov, 2014
1 commit
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U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.Moreover, we are suffering from too cluttered include/common.h.
This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.Signed-off-by: Masahiro Yamada
02 Nov, 2014
1 commit
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Refactor and unify all compiler settings in arch/mips/config.mk.
Also add tune flags for each supported CPU type.Signed-off-by: Daniel Schwierzeck
20 Apr, 2014
2 commits
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This is dead hardware and no one is interested in making the
necessary changes for upcoming features like generic board or
driver model.Signed-off-by: Daniel Schwierzeck
Cc: Wolfgang Denk -
interrupt_init is called unconditionally by the generic board code.
Define a stub for it on MIPS like the enable & disable functions.Signed-off-by: Paul Burton
11 Mar, 2014
1 commit
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Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.Note that there were some very minor differences between the descriptors
in the various files, such as:- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String contentI assume these aren't relevant.
Cc: Thomas Lange
Cc: Shinya Kuribayashi
Cc: Gary Jennejohn
Cc: Wolfgang Denk
Cc: Eric Millbrandt
Cc: Pierre Aubert
Cc: Stefan Roese
Cc: Daniel Hellstrom
Cc: Denis Peter
Cc: Rodolfo Giometti
Cc: Zhang Wei
Cc: Mateusz Zalega
Cc: Remy Bohmer
Cc: Markus Klotzbuecher
Cc: Minkyu Kang
Cc: Gary Jennejohn
Cc: C Nauman
Cc: David Müller
Cc: Yoshihiro Shimoda
Cc: Nobuhiro Iwamatsu
Cc: Thomas Abraham
Cc: Tom Rini
Cc: Andrew Murray
Cc: Matej Frančeškin
Cc: Cliff Cai
Cc: Bryan Wu
Signed-off-by: Stephen Warren
07 Mar, 2014
2 commits
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All mips32 boards define CONFIG_MIPS32 in config headers
except malta boards which define it in boards.cfg.
We can consolidate them by defining it in
arch/mips/cpu/mips32/config.mk.CONFIG_MIPS64 definition can be moved to
arch/mips/cpu/mips64/config.mk as well.Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
Acked-by: Daniel Schwierzeck -
We want to change the build system to include config.mk
only from ./Makefile and spl/Makefile.
We must prepare for that in this commit.$(src) is a moving target and not handy for our purpose.
We must replace it with a fixed path.Signed-off-by: Masahiro Yamada
20 Feb, 2014
1 commit
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This commit changes the working directory
where the build process occurs.Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
$(obj)u-boot.bin: $(obj)u-bootHere, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.And our old build system changes the current working directory
with "make -C " syntax when descending into the
sub-directories.On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj="
syntax for descending into sub-directories.
(We can write it like "make $(obj)=" with a shorthand.)
This means the current working directory is always the top
of the output directory.Signed-off-by: Masahiro Yamada
Tested-by: Gerhard Sittig
10 Nov, 2013
2 commits
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This is in preparation for adapting this board to function correctly on
a physical MIPS Malta board. The board is moved into an "imgtec" vendor
directory at the same time in order to ready us for any other boards
supported by Imagination in the future.Signed-off-by: Paul Burton
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For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &
D-cache line sizes must be the same, as this is not necessarily true.If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.Signed-off-by: Paul Burton
01 Nov, 2013
1 commit
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Signed-off-by: Masahiro Yamada
Cc: Daniel Schwierzeck
21 Oct, 2013
1 commit
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This parameter will later be used to verify OTG ports.
Signed-off-by: Troy Kisky
15 Oct, 2013
1 commit
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Signed-off-by: Wolfgang Denk
24 Jul, 2013
9 commits
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Synchronize the code with mips64/cache.S, in order to
allow further unifications.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
Synchronize the code with mips64/cache.S, in order to
allow further unifications.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
Synchronize the code with mips64/cache.S, in order to
allow further unifications.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
Make it similar to the code in mips64/start.S, in order to
allow further unifications.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
Synchronize the code with mips64/start.S, in order to
allow further unifications.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
The t4 register already holds the cache
line size, and the value of the register
is not changed in mips_init_icache.Get the cache line size value from t4 for
mips_init_dcache as well and remove the
superfluous assignment of t5 register.Signed-off-by: Gabor Juhos
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Checking mips32/time.c with checkpatch.pl shows this:
arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters
arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required
total: 1 errors, 1 warnings, 0 checks, 85 lines checkedFix the code to make checkpatch.pl happy.
Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
On the origial Malta boards the REVISION register is
accessible at the 0x1fc00010 address. The contents of
this register gives information about the revision
of the Malta and Core Boards.This register is used by the Linux kernel to identify
the actual board it is running on. However the register
is not emulated properly by Qemu, so put a hardcoded
value into the flash to make Linux work.Signed-off-by: Gabor Juhos
Cc: Daniel Schwierzeck -
Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
13 Feb, 2013
4 commits
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The code handles relocation entries with the
following relocation types only:
mips32: R_MIPS_REL32
mips64: R_MIPS_REL+R_MIPS_64
xburst: R_MIPS_REL32Other relocation entries are skipped without
processing. The code must be extended if other
relocation types must be supported.Add -pie to LDFLAGS_FINAL to generate the .rel.dyn
fixup table, which will be applied to the relocated
image before transferring control to it.The CONFIG_NEEDS_MANUAL_RELOC is not needed
after the patch, so remove that as well.Signed-off-by: Gabor Juhos
Signed-off-by: Daniel Schwierzeck -
Use the newly introduced symbol __image_copy_end as end address for
relocation of U-Boot image. This is needed for dynamic relocation added
in later patches. This patch obsoletes the symbols uboot_end and
uboot_end_data which are removed.Signed-off-by: Daniel Schwierzeck
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Get the start and end address for clearing BSS from the newly
introduced symbols __bss_start and __bss_end. After GOT is
relocated, those symbols are already pointing to the correct
addresses.Also optimize the loop by moving the address incrementation
to the delay slot to avoid the initial sub instruction.Signed-off-by: Daniel Schwierzeck
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Adopt reset vector handling from Yamon.
Signed-off-by: Daniel Schwierzeck