Eric Lee / smarc-uboot

10 Feb, 2015

1 commit

  • aee0013e5   mx53loco: Fix boot hang during reboot stress test ... Browse Code »

    Currently by running the following test:

    => setenv bootcmd reset
    => save
    => reset

    , we observe a hang after approximately 20-30 minutes of stress reboot test.

    Investigation of this issue revealed that when a single DDR chip select is used,
    the hang does not happen. It only happens when the two chip selects are active.

    MX53 reference manual states at "28.6.2 Memory ZQ calibration sequence":

    "The controller must keep the memory lines quiet (except for CK) for the ZQ
    calibration time as defined in the Jedec (512 cycles for ZQCL after reset, 256
    for other ZQCL and 64 for ZQCS)."

    According to the SDE_0 and SDE_1 bit descriptions from register ESDCTL_ESDCTL:

    "Writing 1 to SDE0 or SDE1 will initiate power up delays as JEDEC defines.
    Power up delays are a function of the configured memory type (DDR2/DDR3/LPDDR2)"

    So make sure to activate one chip select at time (CS0 first and then CS1 later),
    so that the required JEDEC delay is respected for each chip select.

    With this change applied the board has gone through three days of reboot stress
    test without any hang.

    Signed-off-by: Fabio Estevam
    Acked-by: Stefano Babic

    Fabio Estevam
     

24 Jul, 2013

1 commit

10 May, 2013

1 commit

  • b1e6c4c3d   Fix references to the documentation files ... Browse Code »

    Many boot image configuration files refer to the
    appropriate documentation file, but these references
    contain typos in the directory and file name. Fix
    them. Also fix reference to doc/README.SPL file.

    Signed-off-by: Anatolij Gustschin
    Cc: Prafulla Wadaskar
    Cc: Stefano Babic
    Acked-by: Stefano Babic

    Anatolij Gustschin
     

22 Jan, 2013

1 commit

  • 71a988aa6   imximage.cfg: run files through C preprocessor ... Browse Code »

    The '#' used as comments in the files cause the preprocessor
    trouble, so change to /* */.

    The mkimage command which uses this preprocessor output
    was moved to arch/arm/imx-common/Makefile

    .gitignore was updated to ignore .cfgtmp files.

    Signed-off-by: Troy Kisky

    Troy Kisky
     

16 Apr, 2012

1 commit

04 Sep, 2011

1 commit

  • 9691c5b96   mx53: ddr3: Update DD3 initialization ... Browse Code »

    Updated mx53 ddr3 script in order to align with the latest Freescale version from July 8, 2011:
    -change ESDREF[REF_SEL]=01 (for 32KHz), from incorrect setting of 00 (64KHz)
    -change DDR3 MR0 write to "setmem /32 0x63fd901c = 0x052080b0" from
    "0x092080b0". This changes write recovery from 8 clocks to 6 clocks
    (in line with ESDCFG1[tWR])

    Signed-off-by: Lily Zhang
    Signed-off-by: Fabio Estevam

    Fabio Estevam
     

23 May, 2011

1 commit