19 Dec, 2018
40 commits
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Add initial support for the Ingenic JZ47xx MIPS SoC.
Cc: Daniel Schwierzeck
Signed-off-by: Paul Burton
Signed-off-by: Marek Vasut
Signed-off-by: Ezequiel Garcia
Reviewed-by: Marek Vasut -
Add header with SPL boot mode and type definitions.
Cc: Daniel Schwierzeck
Signed-off-by: Paul Burton
Signed-off-by: Marek Vasut -
Add driver for the JZ47xx MSC controller.
Cc: Daniel Schwierzeck
Signed-off-by: Paul Burton
Signed-off-by: Marek Vasut
Signed-off-by: Ezequiel Garcia
Reviewed-by: Marek Vasut -
Add driver for the efuse block in the JZ47xx SOC.
Cc: Daniel Schwierzeck
Signed-off-by: Paul Burton
Signed-off-by: Marek Vasut
Signed-off-by: Ezequiel Garcia
Reviewed-by: Marek Vasut -
Adding the support for the Luton boards PCB91 which share common code with
the Ocelots boards, including board code, device tree and configuration.Signed-off-by: Gregory CLEMENT
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Adding the support for 2 boards sharing common code for Ocelot chip:
PCB120 and PCB123Signed-off-by: Gregory CLEMENT
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As the Ocelots SoCs, this family of SoCs are found in the Microsemi
Switches solution.Signed-off-by: Gregory CLEMENT
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This family of SoCs are found in the Microsemi Switches solution and have
already a support in the linux kernel.Signed-off-by: Gregory CLEMENT
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This path add a new helper allowing to prefetch and lock instructions
into cache. This is useful very early in the boot when no RAM is
available yet.Signed-off-by: Gregory CLEMENT
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Export create_tlb() as an inline function in mipsregs.h. It allows to
remove the declaration of the function from the board files.Then it will allow also to use this function very early in the boot when
the stack is not usable.Signed-off-by: Gregory CLEMENT
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With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h
there are now compiler warnings when some generic code includes
asm/io.h. This happens for example when enabling OF live tree.Signed-off-by: Daniel Schwierzeck
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The VCore III SoCs such as the Luton but also the Ocelot can remap an SPI
flash directly in memory. However, for writing in the flash the
communication has to be done by software.Each of the signal used for the SPI are exposed in a single register. In
order to be able to use the soft-spi driver, the management of this pin
is done through this simple gpio driver.Even if the main purpose of this driver is to be used by soft-spi, it can
still be used as a normal gpio driver but with limitation: for example
the first pin can't be used as output.Signed-off-by: Gregory CLEMENT
Reviewed-by: Daniel Schwierzeck -
This driver supports the pin and gpio controller found in the Ocelot and
Luton SoCs.The driver was inspired from the pinctrl driver in Linux, but was
simplified and was modified to allow supporting an other SoCs (Luton).For Ocelot and Luton the controller is the same, only the pins to program
differ.Signed-off-by: Gregory CLEMENT
Reviewed-by: Daniel Schwierzeck
[changed to only descend into mscc/ dependent on CONFIG_PINCTRL_MSCC]
Signed-off-by: Daniel Schwierzeck -
On some platforms, as the Ocelot ones, when wanting to control the CS
through software, it is not possible to do it through the GPIO
controller. Indeed, this signal is managed through a dedicated range of
registers inside the SoC..By declaring the external_cs_manage function as weak, it is possible to
manage the CS at platform level and then using the appropriate registers.Signed-off-by: Gregory CLEMENT
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Building with CONFIG_OF_EMBED generates build warnings, as it should
only be used for debugging purposes. So let's move all MT7688 targets to
CONFIG_OF_SEPARATE instead with this patch.Signed-off-by: Stefan Roese
Cc: Daniel Schwierzeck -
It has been noticed, that sometimes the d-cache is not in a
"clean-state" when U-Boot is running on MT7688. This was detected when
using the ethernet driver (which uses d-cache) and a TFTP command does
not complete. Flushing the complete d-cache (again?) here seems to fix
this issue.Signed-off-by: Stefan Roese
Cc: Daniel Schwierzeck -
This fixes following DTC warning:
arch/mips/dts/nexys4ddr.dtb: Warning (compatible_is_string_list): /ethernet@10e00000/mdio/phy@1:compatible: property is not a string list
As upstream DTS in Linux doesn't have the offending property,
simply remove it to fix the warning.Signed-off-by: Daniel Schwierzeck
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Remove all interrupt nodes that cause warnings regarding a missing
interrupt parent. There are no interrupt controller nodes defined
and the device trees don't match the ones in Linux anymore.Signed-off-by: Daniel Schwierzeck
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Daniel Schwierzeck -
Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Daniel Schwierzeck -
Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
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Signed-off-by: Álvaro Fernández Rojas
