25 Nov, 2013

5 commits


18 Nov, 2013

24 commits


16 Nov, 2013

6 commits


15 Nov, 2013

2 commits

  • The physical base address of the NOR flash is 0x1e000000
    on the Malta boards. The hardware also maps the first 4MiB
    of the flash into the 0x1fc00000-0x1fffffff range.

    Currently, U-Boot uses the mapped address to access the
    flash, which does not work in recent qemu versions.

    Since commit a427338b222b43197c2776cbc996936df0302f51
    (mips_malta: correct reading MIPS revision at 0x1fc00010)
    writing to the mapped address space causes a CPU exception.
    Due to the exception, U-Boot hangs during boot when it tries
    to detect the CFI flash chip.

    Use the correct physical address for the MALTA_FLASH_BASE
    constant to fix the problem. In order to avoid relocation
    problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
    constants.

    The change makes it possible to start U-Boot on a Malta
    board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
    works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
    1.5.3).

    Signed-off-by: Gabor Juhos
    Signed-off-by: Daniel Schwierzeck
    Cc: Paul Burton

    Gabor Juhos
     
  • Tom Rini
     

14 Nov, 2013

3 commits

  • When indexing freqProcessor[] we use the first
    value in the cpu's "reg" property, which on
    new e6500 cores IDs the threads.
    But freqProcessor[] should be indexed with a
    core index so, when fixing "the clock-frequency"
    cpu node property, access the freqProcessor[]
    with the core index derived from the "reg' property.
    If we don't do this, last half of the "cpu" nodes
    will have broken "clock-frequency" values.

    Signed-off-by: Laurentiu Tudor
    Cc: York Sun

    Laurentiu TUDOR
     
  • Update the code that builds the pci endpoint liodn
    offset list so that it doesn't overlap with other
    liodns and doesn't generate negative offsets like:

    fsl,liodn-offset-list = ;

    The update consists in adding a parameter to the
    function that builds the list to specify the base
    liodn.
    On PCI v2.4 use the old base = 256 and, on PCI 3.0
    where some of the PCIE liodns are larger than 256,
    use a base = 1024. The version check is based on
    the PCI controller's version register.

    Signed-off-by: Laurentiu Tudor
    Cc: Scott Wood
    Cc: York Sun

    Laurentiu TUDOR
     
  • The liodn for the T4240's PCIE controller is no longer set
    through a register in the guts register block but with one
    in the PCIE register block itself.
    Use the already existing SET_PCI_LIODN_BASE macro that puts
    the liodn in the correct register.

    Signed-off-by: Laurentiu Tudor
    Cc: Scott Wood
    Cc: York Sun

    Laurentiu TUDOR