15 Jan, 2016

1 commit

• 192bc6948   Fix GCC format-security errors and convert sprintfs. ... Browse Code »

  60

  With format-security errors turned on, GCC picks up the use of sprintf with
  a format parameter not being a string literal.

  Simple uses of sprintf are also converted to use strcpy.

  Signed-off-by: Ben Whitten
  Acked-by: Wolfgang Denk
  Reviewed-by: Tom Rini

  Ben Whitten

  2016-01-15 11:11:34 +0800  

30 Oct, 2015

1 commit

• 8225b2fd8   net: Move some header files to include/ ... Browse Code »

  The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM
  and PPC, move it out of ppc to include/, and change the path in
  drivers accordingly.

  Signed-off-by: Shaohui Xie
  Signed-off-by: Gong Qianyu
  Reviewed-by: York Sun

  Shaohui Xie

  2015-10-30 01:34:00 +0800  

21 Jan, 2015

3 commits

• a83fccc2c   board/T1040qds: Add VSC9953 support for T1040qds board ... Browse Code »

  This patch configures and initializes the L2 switch on T1040QDS board.
  The L2 switch ports must be initialized according to the SerDes
  protocols.

  Signed-off-by: Codrin Ciubotariu

  Codrin Ciubotariu

  2015-01-21 23:23:36 +0800  
• d9fb29c7e   board/T1040qds: T1040 FMAN ports FM1@DTSEC1 and FM1@DTSEC2 have no PHYs ... Browse Code »

  Freescale's T1040qds board may be configured to have up to
  5 FMAN ports (FM1@DTSEC1 to FM1@DTSEC5). From these 5 ports,
  2 of them may be fixed-links (FM1@DTSEC1 annd FM1@DTSEC2),
  connected to other two ports from an intergrated
  VSC9953 L2 Switch (switch ports 8 and 9). These fixed-link
  ports have no PHYs attatched, so they don't have a
  corresponding MDIO.

  Signed-off-by: Codrin Ciubotariu
  Reviewed-by: York Sun

  Codrin Ciubotariu

  2015-01-21 23:23:35 +0800  
• ea191e6df   board/T1040qds: Fix lane-to-slot mapping for SerDes protocol 0x89 ... Browse Code »

  Signed-off-by: Codrin Ciubotariu
  Reviewed-by: York Sun

  Codrin Ciubotariu

  2015-01-21 23:23:35 +0800  

25 Sep, 2014

1 commit

• 5273aa383   board/t1040qds: Add sgmii ports support in 0xA7 protocol ... Browse Code »

  T1042QDS (T1042 is T1040 Personality without L2 switch) supports following
  sgmii interfaces with serdes protocol 0xA7
  -SGMII-MAC3 on Lane B - slot 7
  -SGMII-MAC5 on Lane H - slot 7
  -SGMII2.5G-MAC1 on Lane C - slot 6
  -SGMII2.5G-MAC2 on Lane D - slot 5

  Add support of above sgmii interfaces

  Signed-off-by: Priyanka Jain

  Priyanka Jain

  2014-09-25 04:12:16 +0800  

23 Jul, 2014

1 commit

• 6666017f4   powerpc/t1040qds: Initialize EPHY2 clock to RGMII only ... Browse Code »

  Setting FPGA register brdcfg9 EPHY2 bits to '0' to initialize EPHY2 clock to RGMII mode.

  Signed-off-by: Vijay Rai
  Signed-off-by: Priyanka Jain
  Signed-off-by: Prabhakar Kushwaha
  Reviewed-by: York Sun

  vijay rai

  2014-07-23 07:25:54 +0800  

04 Feb, 2014

1 commit

• 5b7672fc4   boards/t1040qds: Adds ethernet support for T1040 ... Browse Code »

  Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
  Define MDIO related configs
  Added eth.c file
  Update t1040.c to support RGMII and SGMII
  Update t1040qds.c to support ethernet
  Define the PHY address

  Signed-off-by: Arpit Goel
  Signed-off-by: Bhupesh Sharma
  Signed-off-by: Poonam Aggrwal
  Signed-off-by: Priyanka Jain
  Signed-off-by: Prabhakar Kushwaha
  [York Sun: remove dash from commit message]
  Signed-off-by: York Sun

  Prabhakar Kushwaha

  2014-02-04 00:38:48 +0800