25 Apr, 2019
1 commit
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This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up
on the SCL line seems to be missing. To work around this, enable the
weak-pull-up feature on this pin.After applying this patch, the rtc timeout is gone and the 'date' command
can access the rtc chip.Signed-off-by: Simon Goldschmidt
Reviewed-by: Stefan Roese
07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
27 Oct, 2016
1 commit
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Adding new handoff for SDRAM ctrcfg.extratime1 which is
required for stable LPDDR2 operation. Since the board is
using DDR3, the handoff is set to default value 0.Signed-off-by: Chin Liang See
Cc: Marek Vasut
Cc: Dinh Nguyen
20 Dec, 2015
3 commits
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Drop all the common board code, since it is not completely useless.
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen -
This patch adds the necessary OF alias for the UDC node, which let's
the code locate the DWC2 UDC base address in OF instead of hard-coding
it into the U-Boot binary. The code is adjusted to use the address from
OF instead of the hard-coded one. Finally, the hard-coded address is
removed and USB DM support is enabled.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Lukasz Majewski
Cc: Lukasz Majewski -
The Micrel PHY configuration is now done from OF, so hard-coding
the configuration into the board file is no longer necessary.Signed-off-by: Marek Vasut
Cc: Joe Hershberger
Cc: Chin Liang See
Cc: Dinh Nguyen
18 Dec, 2015
3 commits
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The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.The rename is done automatically:
$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
`git grep "s3c_udc\.h" | cut -d : -f 1`Signed-off-by: Marek Vasut
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The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.The rename is done automatically:
$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
`git grep s3c_udc_probe | cut -d : -f 1`Signed-off-by: Marek Vasut
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The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.The rename is done automatically:
$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
`git grep s3c_plat_otg_data | cut -d : -f 1`Signed-off-by: Marek Vasut
30 Nov, 2015
1 commit
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This board was constantly parasiting on the CV SoCDK, so split it
into it's own separate directory. Moreover, the board config was
missing important bits, like simple-bus support in SPL, the DRAM
configuration was incorrect and the DTS was also missing the pre
reloc bits.Signed-off-by: Marek Vasut
Cc: Stefan Roese
Cc: Dinh Nguyen
Cc: Dinh Nguyen
Cc: Jan Viktorin