27 Oct, 2016

1 commit

• 202936395   arm: socfpga: sr1500: Adding handoff for SDRAM ctrlcfg.extratime1 ... Browse Code »

  Adding new handoff for SDRAM ctrcfg.extratime1 which is
  required for stable LPDDR2 operation. Since the board is
  using DDR3, the handoff is set to default value 0.

  Signed-off-by: Chin Liang See
  Cc: Marek Vasut
  Cc: Dinh Nguyen

  Chin Liang See

  2016-10-27 14:03:10 +0800  

20 Dec, 2015

1 commit

• dbd6fcfbe   arm: socfpga: Drop the board boilerplate ... Browse Code »

  Drop all the common board code, since it is not completely useless.

  Signed-off-by: Marek Vasut
  Cc: Chin Liang See
  Cc: Dinh Nguyen

  Marek Vasut

  2015-12-20 10:36:51 +0800  

07 Dec, 2015

1 commit

• ae9996c80   arm: socfpga: Add SoCFPGA SR1500 board ... Browse Code »

  The SR1500 board is a CycloneV based board, similar to the EBV
  SoCrates, equipped with the following devices:

  - SPI NOR
  - eMMC
  - Ethernet

  Signed-off-by: Stefan Roese
  Reviewed-by: Marek Vasut
  Cc: Pavel Machek
  Cc: Dinh Nguyen
  Acked-by: Pavel Machek

  Stefan Roese

  2015-12-07 07:15:59 +0800