18 Feb, 2019

2 commits

  • As the H5 is pin compatible with the H3, vendors tend to upgrade their
    existing H3 products with an H5 SoC swap. This is the case with the
    Bananapi M2+ H5.

    Add the following to support it:

    - device tree file: synced from Linux v5.0-rc1,
    - defconfig: copy of bananapi_m2_plus_h3_defconfig with only SoC
    family and default device tree file name changed
    - MAINTAINERS entry

    Signed-off-by: Chen-Yu Tsai
    Reviewed-by: Jagan Teki

    Chen-Yu Tsai
     
  • The brand Sinovoip is used for Sinovoip's original VOIP products, while
    the Bananapi brand is for the single board computers they produce. This
    has been verified by Bananapi. Rename the board from "Sinovoip BPI M2
    Plus" to "Bananapi M2 Plus". For the defconfig file, all lowercase is
    used.

    To support the H5 variant of this board, the "H3" suffix is added to
    the defconfig name.

    Also add myself as one of the board maintainers.

    As the device tree files were already correctly named, they do not
    require any changes.

    Signed-off-by: Chen-Yu Tsai
    [jagan: removed unneeded message from commit body]
    Signed-off-by: Jagan Teki
    Reviewed-by: Jagan Teki

    Chen-Yu Tsai
     

30 Jan, 2019

1 commit

  • Enabling DM_MMC skips the call to mmc_pinmux_setup() in board.c, as this
    is supposed to be handled by the MMC driver, using DT information.

    However we don't have a pinctrl driver yet, but would still like to keep
    the working pinmux setup for our MMC devices. So bring this particular
    call back to the DM_MMC code flow.

    When booting from either SD card or eMMC, the SPL does the setup for us,
    but when booting from SPI or USB we must not skip this part.

    Fixes, boot via FEL or SPI flash, where the SPL won't setup the pinmux

    Signed-off-by: Andre Przywara
    Acked-by: Jagan Teki
    [jagan: add Fix details on commit message]
    Signed-off-by: Jagan Teki

    Andre Przywara
     

19 Jan, 2019

2 commits

  • Emlid Neutis N5 is a SoM based on Allwinner H5, has a WiFi & BT
    module, DDR3 RAM and eMMC.

    - add neutis-devboard target to dtb makefile
    - add dtsi file for Neutis N5 needs
    - add config file for Neutis N5 Dev board

    Signed-off-by: Aleksandr Aleksandrov
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki
    [jagan: update proper commit head]
    Signed-off-by: Jagan Teki

    Aleksandr Aleksandrov
     
  • To use TWI0/1/2 the user can select CONFIG_I2C#_ENABLE.
    However even the controller is enabled, the mux for the pins
    are not set.

    This patch follows the existing mux method. Since the pads are
    different, separate check is added for each i2c.

    Tested with A64-SOM204 board.

    Signed-off-by: Stefan Mavrodiev
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Stefan Mavrodiev
     

30 Dec, 2018

1 commit

  • Commit a8011eb84dfa("sunxi: board: Print error after power initialization
    fails") moved the DRAM init after the increase of the CPU clock
    frequency. This lead to various DRAM initialisation failures on some
    boards (hangs or wrong size reported, on a NanoPi Duo2 and OrangePi
    Zero, for instance). Lowering the CPU frequency significantly (for instance
    to 408 MHz) seems to work around the problem, so this points to some timing
    issues in the DRAM code.

    Debugging this sounds like a larger job, so let's just revert this patch
    to bring back those boards.
    Beside this probably unintended change the patch just moved the error
    message around, so reverting this is not a real loss.

    This reverts commit a8011eb84dfac5187cebf00ed8bc981bdb5c1fa1.

    Tested-By: Priit Laes
    Signed-off-by: Karl Palsson
    Signed-off-by: Andre Przywara
    Reviewed-by: Jagan Teki

    From: Karl Palsson
     

10 Dec, 2018

1 commit


09 Dec, 2018

1 commit

  • This merges the CRC16-CCITT headers into u-boot/crc.h to prepare for
    rolling CRC16 into the hash infrastructure. Given that CRC8, CRC32
    and CRC32-C already have their prototypes in a single header file, it
    seems a good idea to also include CRC16-CCITT in the same.

    Signed-off-by: Philipp Tomsich

    Philipp Tomsich
     

08 Dec, 2018

2 commits

  • Now that the Allwinner port in the official mainline ARM Trusted
    Firmware repository has reached feature parity with the "legacy" ATF
    port, let's use the opportunity to update the Allwinner 64-bit build
    instructions. This changes:
    - Update ATF build instructions to use the mainline repo.
    - Add quick command lines for TL;DR people.
    - Mention Allwinner H6 build target.
    - Mention pre-built FEL binaries.

    Signed-off-by: Andre Przywara
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Andre Przywara
     
  • Currently during init, we enable all power, then enable the dram and
    after that check whether there was an error during power-up.

    This makes little sense, we should enable power and then check if power
    was brought up properly before we continue to initialize other things.

    This patch moves the DRAM init after the power failure check.

    Signed-off-by: Olliver Schinagl
    Signed-off-by: Priit Laes
    Acked-by: Maxime Ripard

    Olliver Schinagl
     

07 Dec, 2018

1 commit


17 Nov, 2018

1 commit


14 Nov, 2018

2 commits

  • OrangePi Lite2 is Allwinner H6 based open-source SBC,
    which support:
    - Allwinner H6 Quad-core 64-bit ARM Cortex-A53
    - GPU Mali-T720
    - 1GB LPDDR3 RAM
    - AXP805 PMIC
    - AP6356S Wifi/BT
    - USB 2.0, USB 3.0 Host, OTG
    - HDMI port
    - 5V/2A DC power supply

    Signed-off-by: Jagan Teki
    Acked-by: Maxime Ripard

    Jagan Teki
     
  • Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
    two groups of pinmuxes on PL bank, so it's called R_I2C.

    Add support for this I2C controller and the pinmux which doesn't conflict
    with RSB.

    Signed-off-by: Vasily Khoruzhick
    Acked-by: Maxime Ripard
    Tested-by: Maxime Ripard
    Cc: Vagrant Cascadian
    Acked-by: Jagan Teki

    Vasily Khoruzhick
     

31 Oct, 2018

1 commit

  • Banana Pi M2 Zero is a board by Sinovoip with Allwinner H2+ SoC, 16-bit
    512MiB DDR3 memory, a MicroSD slot, two MicroUSB ports (one OTG and one
    powering-only) and a miniHDMI port.

    Signed-off-by: Icenowy Zheng
    Signed-off-by: Jun Nie
    Acked-by: Maxime Ripard
    [jagan: Fixed board MAINTAINERS file]
    Signed-off-by: Jagan Teki

    Jun Nie
     

29 Oct, 2018

4 commits

  • At the moment we rely on the infamous get_ram_size() function to learn
    the actual DRAM size in U-Boot proper. This function has two issues:
    1) It only works if the DRAM size is a power of two. We start to see
    boards which have 3GB of (usable) DRAM, so this does not fit anymore.
    2) As U-Boot has no notion of reserved memory so far, it will happily
    ride through the DRAM, possibly stepping on secure-only memory. This
    could be a region of DRAM reserved for OP-TEE or some other secure
    payload, for instance. It will most likely crash in that case.

    As the SPL DRAM init routine has very accurate knowledge of the actual
    DRAM size, lets propagate this wisdom to U-Boot proper.
    We re-purpose a currently reserved word in our SPL header for that.
    The SPL itself stores the detected DRAM size there, and bumps the SPL
    header version number in that case. U-Boot proper checks for a valid
    SPL header and a high enough version number, then uses the DRAM size
    from there. If the SPL header field is not sufficient, we fall back to
    the old DRAM scanning routine.

    Part of the DRAM might be present and probed by SPL, but not accessible
    by the CPU. They're restricted in the main U-Boot binary, when accessing
    the DRAM size from SPL header.

    Signed-off-by: Andre Przywara
    Signed-off-by: Icenowy Zheng
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Andre Przywara
     
  • So far we have two users which want to look at the SPL header. We will
    get more in the future.
    Refactor the existing SPL header checks into a common function, to
    simplify reusing the code.
    Now that this is easy, add proper version checks to the DT name parsing.

    Signed-off-by: Andre Przywara
    Signed-off-by: Icenowy Zheng
    Acked-by: Maxime Ripard
    Acked-by: Jagan Teki

    Andre Przywara
     
  • On Allwinner SoCs we use some free bytes at the beginning of the SPL image
    to store various information. We have a version byte to allow updates,
    but changing this always requires all tools to be updated as well.

    Introduce the concept of semantic versioning [1] to the SPL header:
    The major part of the version number only changes on incompatible
    updates, a minor number bump indicates backward compatibility.
    This patch just documents the major/minor split, adds some comments
    to the header file and uses the versioning information for the existing
    users.

    [1] https://semver.org

    Signed-off-by: Andre Przywara
    Signed-off-by: Icenowy Zheng
    Acked-by: Maxime Ripard
    Acked-by: Jagan Teki

    Andre Przywara
     
  • The Pine A64 Plus/non-Plus model detection code is now built on all
    64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
    use.

    Disable them when the board is Pine A64 by adding a Kconfig option that
    is only selected on Pine A64.

    On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
    saves a 104 byte strstr() function, then makes SPL on H6 succeed to
    build.

    Signed-off-by: Icenowy Zheng
    Reviewed-by: Andre Przywara
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Icenowy Zheng
     

25 Oct, 2018

2 commits


20 Aug, 2018

1 commit


31 Jul, 2018

4 commits

  • OrangePi One Plus is Allwinner H6 based open-source SBC,
    which support:
    - Allwinner H6 Quad-core 64-bit ARM Cortex-A53
    - GPU Mali-T720
    - 1GB LPDDR3 RAM
    - AXP805 PMIC
    - 1Gbps GMAC via RTL8211
    - USB 2.0 Host, OTG
    - HDMI port
    - 5V/2A DC power supply

    Signed-off-by: Jagan Teki
    Acked-by: Maxime Ripard

    Jagan Teki
     
  • Pine H64 is a SBC with Allwinner H6 SoC produced by Pine64. It features
    1GiB/2GiB/4GiB(3GiB usable) DRAM, two USB 2.0 ports, one USB 3.0 port
    and a mPCIE slot.

    Add support for it.

    The device tree is from Linux next-20180720.

    Signed-off-by: Icenowy Zheng
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki
    Tested-by: Jagan Teki

    Icenowy Zheng
     
  • The Allwinner H6 SoC has 3 MMC controllers like the ones in A64, with
    the MMC2 come with the capability to do crypto by EMCE.

    Add MMC support for H6. EMCE support is not added yet.

    Signed-off-by: Icenowy Zheng
    Reviewed-by: Jagan Teki
    Tested-by: Jagan Teki

    Icenowy Zheng
     
  • H6 has different SRAM A2 address, so the ATF load address is also
    different.

    Add judgment code to sunxi 64-bit FIT generation script. It will judge
    the SoC by the device tree's name.

    Signed-off-by: Icenowy Zheng
    Reviewed-by: Andre Przywara
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki
    Tested-by: Jagan Teki

    Icenowy Zheng
     

16 Jun, 2018

2 commits

  • Orange Pi Zero Plus is an open-source single-board computer
    using the Allwinner H5 SOC.

    H5 Orangepi Zero Plus has
    - Quad-core Cortex-A53
    - 512MB DDR3
    - micrSD slot
    - 16MBit SPI Nor flash
    - Debug TTL UART
    - 1GBit/s Ethernet (RTL8211E)
    - Wifi (RTL8189FTV)
    - USB 2.0 Host
    - USB 2.0 OTG + power supply

    The device tree file is copied from the Linux kernel 4.17.

    Signed-off-by: Hauke Mehrtens
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Hauke Mehrtens
     
  • Orange Pi R1 is an open-source single-board computer using the
    Allwinner H2+ SOC.

    H2+ Orange Pi R1 has
    - Quad-core Cortex-A7
    - 256MB DDR3
    - micrSD slot
    - 128MBit SPI Nor flash
    - Debug TTL UART
    - 100MBit/s Ethernet (H2+)
    - 100MBit/s Ethernet (RTL8152B)
    - Wifi (RTL8189ETV)
    - USB 2.0 OTG + power supply
    This board is very similar to the Orange Pi Zero.

    The device tree file is copied from the Linux kernel 4.17.

    Signed-off-by: Hauke Mehrtens
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Hauke Mehrtens
     

04 Jun, 2018

1 commit


28 May, 2018

2 commits


10 May, 2018

1 commit


07 May, 2018

2 commits

  • When U-Boot started using SPDX tags we were among the early adopters and
    there weren't a lot of other examples to borrow from. So we picked the
    area of the file that usually had a full license text and replaced it
    with an appropriate SPDX-License-Identifier: entry. Since then, the
    Linux Kernel has adopted SPDX tags and they place it as the very first
    line in a file (except where shebangs are used, then it's second line)
    and with slightly different comment styles than us.

    In part due to community overlap, in part due to better tag visibility
    and in part for other minor reasons, switch over to that style.

    This commit changes all instances where we have a single declared
    license in the tag as both the before and after are identical in tag
    contents. There's also a few places where I found we did not have a tag
    and have introduced one.

    Signed-off-by: Tom Rini

    Tom Rini
     
  • Banana Pi BPI-M2 Berry is a quad-core mini single board computer
    built with Allwinner V40 SoC. It features
    - Quad Core ARM Cortex A7 CPU V40
    - 1GB of RAM .
    - microSD/SATA port..
    - onboard WiFi and BT
    - 4 USB A 2.0 ports
    - 1 USB OTG port
    - 1 HDMI port
    - 1 audio jack
    - DC power port

    Signed-off-by: Jagan Teki
    Acked-by: Maxime Ripard

    Jagan Teki
     

01 May, 2018

2 commits

  • This patch adds a device tree file for the H5 version of the Libre
    Computer Board ALL-H3-CC. It is the same board first introduced in
    commit afe27544125e ("sunxi: Add support for Libre Computer Board
    ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H5 SoC, and
    has 4Gb DDR3 chips instead of 2Gb ones.

    The device tree utilizes the common board design file for ALL-H3-CC,
    providing just the model strings and SoC specifics.

    Signed-off-by: Chen-Yu Tsai
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Chen-Yu Tsai
     
  • This patch adds a device tree file for the H2+ version of the Libre
    Computer Board ALL-H3-CC. It is the same board first introduced in
    commit afe27544125e ("sunxi: Add support for Libre Computer Board
    ALL-H3-CC H3 ver."), with the H3 SoC replaced with the H2+ SoC, and
    has only two 2Gb DDR3 chips instead of four.

    The device tree utilizes the common board design file for ALL-H3-CC,
    providing just the model strings and SoC specifics.

    Signed-off-by: Chen-Yu Tsai
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Chen-Yu Tsai
     

04 Apr, 2018

1 commit

  • As we are running into issues where the final U-Boot FIT image file is
    exceeding our size limit, add a hint to the README.sunxi64 file
    to point out the possibility of building non-debug versions of the ATF
    binary. These are about 12KB smaller than the standard debug build, and
    so allow successful U-Boot builds for many boards with the Allwinner H5
    SoC.
    Please note that under normal circumstances the debug build is still
    recommended, as it gives valuable clues in case something goes wrong in
    the ATF.

    Signed-off-by: Andre Przywara
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Andre Przywara
     

03 Apr, 2018

2 commits


14 Mar, 2018

1 commit

  • A20-SOM204 board has option with onboard 16GB eMMC. The chip is wired
    to MMC2 slot.

    This patch adds defconfig and dts files for this board. The dts is same
    with mainline kernel.

    Signed-off-by: Stefan Mavrodiev
    Acked-by: Maxime Ripard
    Reviewed-by: Jagan Teki

    Stefan Mavrodiev