20 Feb, 2014
2 commits
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As soon as all boards have their CONFIG_SYS_I2C_BASE defined in
configuration files instead of "asm/arch/hardware.h" it's safe to remove
the inclusion in question and make driver platform-independent.Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando ViscontiSigned-off-by: Alexey Brodkin
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Enhance the DesignWare I2C driver to support address length more
than 1 byte. This enhancement is required as some I2C slave
device such as EEPROM chip might have 16 bit address byte.Signed-off-by: Chin Liang See
Acked-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher
13 Jan, 2014
1 commit
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Since we agreed on legacy implementation of "eeprom_{read|write}"
(http://patchwork.ozlabs.org/patch/295825/) I had to fix/make it work
again DesignWare I2C driver for cases when 1 EEPROM IC fake I2C with
anumber of "built-in" ICs with different chip addresses.Signed-off-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher
Cc: Vipin KUMAR
Cc: Tom Rix
Cc: Mischa Jonker
Cc: Kuo-Jung Su
13 Nov, 2013
2 commits
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This delay applies to any data transfer on I2C bus.
For example 1kB data read with per-byte access (which happens if
environment is stored in I2C EEPROM) takes more than 10 seconds.Moreover data bus driver has to care about bus state and data transfer,
but not about internal states of attached devices.Signed-off-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher
Cc: Vipin KUMAR
Cc: Tom Rix
Cc: Mischa Jonker -
As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4)
register succeed only when IC_ENABLE[0] is set to 0.Signed-off-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher
Cc: Vipin KUMAR
Cc: Tom Rix
Cc: Mischa Jonker
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
12 Dec, 2012
3 commits
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There are three couple (hcnt/lcnt) of registers for each
speed (SS/FS/HS). The driver needs to set the proper couple
of regs according to what speed we are setting.Signed-off-by: Armando Visconti
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In the newer versions of designware i2c IP there is the possibility
of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically
requires the s/w to generate the stop bit condition directly, as
the h/w will not automatically generate it when TX_FIFO is empty.To avoid generation of an extra 0x0 byte sent as data, the
IC_STOP command must be sent along with the last IC_CMD.This patch always writes bit[9] of ic_data_cmd even in the
older versions, assuming that it is a noop there.Signed-off-by: Armando Visconti
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This patch adds the capability to switch between 10
different I2C busses (from 0 to 9).Signed-off-by: Armando Visconti
07 Jul, 2012
1 commit
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i2c_probe() is changed to reinit the i2c bus upon read failure.
This is naturally the case upon i2c bus probing.Also, some printf messages upon read failure are removed. As they
would interfere with the "i2c probe" command.Additionally, i2c_set_bus_speed() now returns 0, so that the
"i2c speed" command can be used.Signed-off-by: Stefan Roese
Cc: Amit Virdi
Cc: Vipin Kumar
24 Apr, 2012
2 commits
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The designware i2c controller must be turned off before
setting the speed in IC_CON register, as stated in the
section 6.3.1 of the dw_apb_i2c_db.pdf.Signed-off-by: Michel Sanches
Signed-off-by: Armando Visconti
Signed-off-by: Amit Virdi -
Earlier, a driver exists in the u-boot source for designware i2c interface. That
driver was specific to spear platforms. This patch implements the i2c controller
as a generic driver which can be used by multiple platformsThe driver files are now renamed to designware_i2c.c and designware_i2c.h and
these are moved into drivers/i2c folder for reusability by other
platformsSigned-off-by: Vipin Kumar
Signed-off-by: Amit Virdi
