06 May, 2020
40 commits
-
U-Boot can instantiate CAAM RNG if needed by crypto operations.
Call sec_init() prior running a blob operation to ensure
RNG is correctly instantiated.Make sure CAAM clock is enabled and check if a job ring is
available for that operation.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit b2b745515d06f05ea288524e26cf2389d6924ff2)
(cherry picked from commit fe33f7296336b7364fb24ad21b0be32eb5810262)
(cherry picked from commit 1339300cba26dc32289633c3a8c2cc86a1180949) -
In order to build CMD_BLOB on i.MX CAAM supported devices it's
necessary to select IMX_HAB. Add IMX_HAB and CAAM supported
SoCs as dependency.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 4afb519038d190687cac6d410e9ad65d0655f1c0)
(cherry picked from commit acda6159eefbefaee15b19568fd1c4665c047432)
(cherry picked from commit c9de383878c5e248ae549182a9f2477f5bb2a5f5) -
This code was originally developed by Raul Cardenas
and modified to be applied in U-Boot imx_v2017.03.More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.htmli.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.Command usage:
Print the public key for the device.
- mfgprot pubkGenerates Signature over given data.
- mfgprot signSigned-off-by: Raul Ulises Cardenas
Signed-off-by: Breno Lima
Reviewed-by: Fabio Estevam
Reviewed-by: Ye Li
(cherry picked from commit db2dbf622d3c711b2fbd85e6814992e023479dad)
(cherry picked from commit 554b7cdcf47a49097cc5417cc6130e469d7ccc20) -
If TEE is enabled according to rom_pointer[0,1] passed to BL33
from ATF, uboot need to add the optee node in dts to let
Kernel could probe the TEE driver.Signed-off-by: Peng Fan
(cherry picked from commit 4341d35cc99a6226f2671e15154d3148ebf49c47)
(cherry picked from commit 609e6607572225bfff9dcd84928fd061c1682669) -
Since rng_init is used arch_cpu_init, we have to clean up BSS section
before it.
Also remove the unnecessary memset to global data, because
board_init_f_init_reserve already memset it. If we memset it in board_init_f,
the gd->malloc_base is reset to 0 and will cause early malloc problem
when CONFIG_MALLOC_F_ADDR is not set.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit c36ae6a623b075192b20d93f9e3fe966961d86f4)
(cherry picked from commit f7e11efcb4689cd7e1068677454b2bd4480708f3) -
Update the mini driver to add support for getting ecc info from ONFI and
support read image data from page unaligned NAND address.Signed-off-by: Ye Li
(cherry picked from commit 45e34020f7b1e3996e99f24c5e18a08448fe1ca5) -
Since iMX8 has enabled clock uclass, we can parse the clocks from DTB
and enable them in GPMI driver.Signed-off-by: Ye Li
(cherry picked from commit 72cf8b976221913b7e36f8c53dc57a52206da26b) -
enable the GPMI NAND driver for i.MX8, the major changes
- register defination for i.mx8
- Makefile change for misc.c
- DMA structure must be 32bit addressSigned-off-by: Han Xu
(cherry picked from commit 474c4270108551647c7064a23abdc2e11d7f37ab)
(cherry picked from commit 029cce25cce94c30dd0305bb9b17ba7f939ee1af)
(cherry picked from commit a9f0815c22f5fecf4c4d2ac84cc39e62fe7998a2) -
change the maximum oob size to 1872 for the MT29F128G08CBCCB raw NAND
chip on i.MX8QXPSigned-off-by: Han Xu
(cherry picked from commit 58dee6ac965000f93693c36c93fb3d453293c43f)
(cherry picked from commit d297f33f4719502aa415dc7c7002c437a6af6c28)
(cherry picked from commit c0911b66b697505a2d91bf0e468e47bd2b2c21e3) -
Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.
Signed-off-by: Ye Li
(cherry picked from commit 6cb839cabb42b81e37214e00448fc5dac89fd1f1)
(cherry picked from commit 468509f86a2d040398aa6b019bb6644bfb0ef11c)
(cherry picked from commit cac7f6b2408a8010ac411f562a635944e710626a) -
This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"In this patch, i.MX6UL is added and threshold changed to use ecc_strength.
Signed-off-by: Peng Fan
(cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0)
Signed-off-by: Ye Li
(cherry picked from commit 37d7f9614aa357f270312d7ceaab0f7006dc5aea)
(cherry picked from commit 5f50a850dd42d28b6105ee7e1b4b1822e7ba569b)
(cherry picked from commit 722f0ff0bcaec84c94c8fc211abdfbe457ea3dc6) -
This patch is porting from linux:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768"
We may meet the bitflips in reading an erased page(contains all 0xFF),
this may causes the UBIFS corrupt, please see the log from Elie:-----------------------------------------------------------------
[ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes
...
[ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815
[ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383
[ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383
-----------------------------------------------------------------This patch does a check for the uncorrectable failure in the following steps:
[0] set the threshold.
The threshold is set based on the truth:
"A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH
do the ECC."For the sake of safe, we will set the threshold with half the gf_len, and
do not make it bigger the ECC strength.[1] count the bitflips of the current ECC chunk, assume it is N.
[2] if the (N
(cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
(cherry picked from commit 026751697e41c7376414a8716cf0ea4bf998b85f)
(cherry picked from commit 93b481f07b8cb59c733f420bebea77ac484f9036)
(cherry picked from commit eefb30b8e68d522bd315ed884c36cb9b7e917f71) -
Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Signed-off-by: Han Xu
Signed-off-by: Ye Li
(cherry picked from commit 71253252c6652a845df15d6288e49d37cdab3383) -
The list_first_entry always assumes the list is not empty, it won't return NULL pointer when
the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling
the list_empty before the list_first_entry.(Coverity CID 29934)
Signed-off-by: Ye.Li
(cherry picked from commit ff3923f294cc2e15f436d7520b4042736b1b48a6)
(cherry picked from commit 64c6a7b5d621080b8bd948c061a4f223a8c2d886)
(cherry picked from commit b9846931a2196fa2bf29a9cb0304d11e96c2c40a)
(cherry picked from commit d33e6de01f509d586f5b0673154b185601f5d869) -
The code change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes) and proposed a new
way to set ECC layout.Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.Previous code has two methods for ECC layout setting, the
legacy_calc_ecc_layout and calc_ecc_layout_by_info, the difference
between these two methods is, legacy_calc_ecc_layout set the chunk size
larger chan oob size and then set the maximum ECC strength that oob can
afford. While the calc_ecc_layout_by_info set chunk size and ECC
strength according to NAND spec. It has been proved that the first
method cannot provide safe ECC strength for some modern NAND chips, so
in current code,1. Driver read NAND parameters first and then chose the proper ECC
layout setting method.2. If the oob is large or NAND required data chunk larger than oob size,
chose calc_ecc_for_large_oob, otherwise use calc_ecc_layout_by_info3. legacy_calc_ecc_layout only used for some NAND chips does not contains
necessary information. So this is only a backup plan, it is NOT
recommended to use these NAND chips.Signed-off-by: Han Xu
Signed-off-by: Ye Li
(cherry picked from commit 71fe512f8fe173001a295399758d20a16a866a56) -
The imx8mm has changed the address of rvt_hab, use new address for imx8mm.
The authentication procedure is same as imx8mq. In u-boot, the authentication
uses SIP call to trap ATF to run HAB authenticate.
Need to work with ATF commit:
(commit 7a4d6f90e999ed413d520310cc199901b52b7a04)Users need to add CONFIG_SECURE_BOOT=y to defconfig to enable the feature.
Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit a4826f61e39456abb6d2e4f84178ae9ef582f7c3) -
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
printf("HAB check target 0x%08x-0x%08lx fail\n",
~~~~^
%08x
ddr_start, ddr_start + bytes);arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \
of type 'unsigned int', but argument 3 has type 'ulong \
{aka long unsigned int}' [-Wformat=]
printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
~^
%lxFix warnings by providing the correct data type.
Reviewed-by: Ye Li
Signed-off-by: Breno Lima
(cherry picked from commit 050beb8ee3fc4c690c9ce7c4f47adfc6f48dccdf)
(cherry picked from commit e66c03a45b563b53485b8d662d29f2e9a143e433)
(cherry picked from commit b7fd85d897a599121b417fb7d5ba15df1735c439) -
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
No HAB Events Found!Add command documentation in mx6_mx7_secure_boot.txt guide.
As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".Reviewed-by: Utkarsh Gupta
Reviewed-by: Ye Li
Signed-off-by: Breno Lima
(cherry picked from commit 0efff16579fabcf57acb9c8857afac8fb58de355)
(cherry picked from commit 4815444f293d8021f8bd62079bd576e88cdef639)
(cherry picked from commit 2d95bff6e4c86af4a2cfc66ab40ccd693f746796) -
The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 33f51b401dffa393274a28f9d49a87af3eb02fe0)
(cherry picked from commit 7ee050afb5bf380ac58dcf8d9d29e315400992e3) -
Add ability for hab_status command to show All HAB events and not just
HAB failure eventsSigned-off-by: Utkarsh Gupta
Reviewed-by: Ye Li
(cherry picked from commit a9fdc0e4efa5c50ae194f7862d87cf53608afd8c)
(cherry picked from commit 1419cf3144dd6d202b6507a10804809e02c61c69) -
Since commit 8891410c729b ("MLK-19848 mx6dq: Fix chip version issue for
rev1.3") it's not possible to call the HAB API functions on i.MX6DQ
SoC Rev 1.3:Authenticate image from DDR location 0x12000000...
undefined instruction
pc : [] lr : []
reloc pc : [] lr : []
sp : 8ef444a8 ip : 126e8068 fp : 8ff59aa8
r10: 8ffd51e4 r9 : 8ef50eb0 r8 : 006e8000
r7 : 00000000 r6 : 126ea01f r5 : 0000002b r4 : 126e8000
r3 : 412c00dd r2 : 00000001 r1 : 00000001 r0 : 00000063
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...resetting ...
The hab.h code is defining the HAB API base address according to the
old SoC revision number, thus failing when calling the HAB API
authenticate_image() function.Fix this issue by using mx6dq rev 1.3 instead of mx6dq rev 1.5.
Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit adc4d93e6e1726f111e86ca74fb76215215dbc86)
(cherry picked from commit a4300029173afb872b7e7e38d191ca5528da7fed) -
Currently it's not possible to authenticate additional boot images in HAB
open configuration.The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has been correctly signed prior to closing
their device.Enable hab.c to authenticate additional boot images in open mode so HAB
events can be retrieved through get_hab_status() function.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 15d3e93bd16b5375f4dbf525ce61f0912ece4c0b)
(cherry picked from commit 557360b5eeeca9c48f020692005e79d84ce89800) -
Modify to use hab_rvt_failsafe function for failsafe ROM API, not
directly call its ROM address. This function will wrap the sip call for iMX8M
platforms.Signed-off-by: Ye Li
(cherry picked from commit d6b9992db082920b55c08d33df1cb03942939e7f)
(cherry picked from commit 1f020c859a792296e866cf568bbea98b28435437) -
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).Authenticate image from DDR location 0x80800000...
Check CSF for Write Data command before authenticating image
data abort
pc : [] lr : []
reloc pc : [] lr : []
sp : fdf45dc8 ip : 00000214 fp : 00000000
r10: fffb6170 r9 : fdf4fec0 r8 : 00722020
r7 : 80f20000 r6 : 80800000 r5 : 80800000 r4 : 00720000
r3 : 17a5aca3 r2 : 00000000 r1 : 80f2201f r0 : 00000019
Flags: NzcV IRQs off FIQs off Mode SVC_32
Resetting CPU ...resetting ...
To avoid such errors during authentication process, validate IVT structure
by calling validate_ivt function which checks the following values in an IVT:IVT_HEADER = 0x4X2000D1
ENTRY != 0x0
RES1 = 0x0
DCD = 0x0 /* Recommended */
SELF != 0x0 /* Absoulute address of IVT */
CSF != 0x0
RES2 = 0x0This commit also checks if Image's start address is 4 byte aligned.
commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image"
removed as this patch addresses the issue.Signed-off-by: Utkarsh Gupta
(cherry picked from commit dabffd1b04df3b0393ef6a9a35b5fd816edd8c63)
Signed-off-by: Ye Li
(cherry picked from commit b4bda0ae3c5c5be0524148c1bcdfea908da859d6)
(cherry picked from commit 2077719b22232eac459ea78914644dac20fed1c4) -
Since cmd_dek is using CAAM JR, so enable the CMD_DEK only when
HAS_CAAM is setSigned-off-by: Ye Li
(cherry picked from commit 8a552c8d98df953c13a0144972b8c16ed7684e92)
(cherry picked from commit dd3c14ba3f814610af05b07ec7cd47dcf0925a49) -
When secure boot is enabled, add authenticate_image in booti to authenticate
kernel image.Signed-off-by: Ye Li
(cherry picked from commit f29a143cdb8c74566113737e9be7e1bcd8c625f4)
(cherry picked from commit 1e33f493a55dad7e016f948b932000ec295c6df4)
(cherry picked from commit 677c332120eff7161532288685c58f246d1f00ff) -
When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.Signed-off-by: Ye Li
(cherry picked from commit bca4e251b6083476e987d92c428136a1c81bcb0b)
(cherry picked from commit e31a75cc78ad2d5e6ab5d58851058ab57de1566d)
(cherry picked from commit 6643eac10e3654c62a4acd9c5a4c8c0ac5ee4d0b) -
Add some SOC level codes and build configurations to use HAB lib for
CONFIG_IMX_HAB (secure boot), like adding the SEC_CONFIG fuse, enable
fuse driver, CAAM clock function, and add CAAM secure RAM to MMU table.The FSL_CAAM is temporally not enabled for iMX8M when CONFIG_IMX_HAB is set,
because we don't need the CAAM driver for SPL.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit a0cba5678b10827bc4b5e4fb2e40945a5c332baa)
(cherry picked from commit 330a3108e3806fc2b9fa500f84ebfb4feb821c6d)
(cherry picked from commit bec1d873ca68d7aa3b4355c490ac085b4ef4f7a5) -
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/72. Need to bypass an workaround for i.MX6 to fix problem in MMU.
3. The x18 register needed save & restore before calling any HAB API. According
to ARM procedure call spec, the x18 is caller saved when it is used as
temporary register. So calling HAB API may scratch this register, and
cause crash once accessing the gd pointer.On ARMv7, the r9 is callee saved when it is used as variable register. So
no need to save & restore it.4. Add SEC_CONFIG fuse for iMX8M
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 5f6ef97a9d13361895180df7014f4e4fb48a5875)
(cherry picked from commit 465407632f436cb55db1d261ee0adb7458220045)
(cherry picked from commit 23cb97d2bcbfbbc80561fda069b7ff805ef00c05) -
To support the trust boot chain, we integrate the authentication
into the kernel image loading process. The kernel image will be verified
at its load address. So when signing the kernel image, we need to
use this load address which may change on different platforms.Signed-off-by: Ye Li
(cherry picked from commit 3c118b8d6bbe1a25ca8c8bafeb528309f16fc73d)
(cherry picked from commit fd9a9759ed9b3a9fc26b18aff00880382213b1ca)
(cherry picked from commit 98d4faefdb83579d4a5a170e06af5efb64ad2b3c)
(cherry picked from commit 3c0f0eed6cb703cd7d67ec97520b1990b5e35fb2) -
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.Signed-off-by: Ye Li
(cherry picked from commit 86bf433c3d6940ce71749e97a37efbff5ac7a79f)
(cherry picked from commit b73db85448323521be94f748eaa687d4d3557f38) -
1. Fix wrong USDHC clock
2. Increase malloc f size to 0x2000
3. Change to use DM GPIO interfaces to avoid wrong GPIO device selected
4. Enlarge SPL max size to 148KB
5. Add do_reset commandSigned-off-by: Ye Li
-
Should check SPL_SYSRESET if need to enable ARM firmware for PSCI
in SPL.Signed-off-by: Ye Li
-
Port the files from imx_v2019.04. Split to two files: one for imx8mq
and the other for imx8mm/8mn/8mpSigned-off-by: Ye Li
-
Add QSPI NOR relavant configurations and QSPI clock init to board
codesSigned-off-by: Ye Li
(cherry picked from commit c55c3db3d2d61c902cd68e9fee9de9b9750b946f) -
Update defconfig to enable TMU for i.MX8M EVK board.
Signed-off-by: Ye Li
(cherry picked from commit 339bc1a3a377d52c027ccdb146fe7f1cd0c28882)
(cherry picked from commit e6e05cb1d56e8a5c7ad9d738d121085e7162a5fa) -
Current cpu info common function in imx-common only supports imx-thermal, update
the codes to also support TMU.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 878a4ff40987742a30cf8990b2da98205fd6cff5)
(cherry picked from commit be6ab22634214f36716c239413b9203ab1123376)
(cherry picked from commit e4131272acf3b3ef4f9f5949e50fab9ae7c3b116) -
Porting the TMU driver from kernel and supporting DM in the driver.
Users need to provide the TMU node and sensors nodes in DTB.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit f883de99b93de8c2fadd382d8cf961667bacd038)
(cherry picked from commit 8e09d0f0ab33d9a52098546b147d41c4c2598c0d)
(cherry picked from commit 327d5a951adde39428eeab877a85fe43b51977aa) -
i.MX8MQ EVK has two USB ports, the port 0 is typec, the port 1 is host.
This patch enables both device and host mode (xhci) for typec port by setting tcpc
to relevant UFP/DFP mode. For port 1, it is only supports the host mode (xhci).PD charge is enabled at default on typec port for the dead battery. In this case,
the typec port only works in device mode.Signed-off-by: Ye Li
(cherry picked from commit 27345e2b5e85c11b361dffda37172ad1f141d7ba)
(cherry picked from commit a1fca2fec215aca9cac700bbd40eff6f0bed94fc) -
Since the CONFIG_BLK is defined by DM MMC, to support USB storage,
we have to use DM USB. Add the basic DM support for xhci-imx8m driver.
Also update DTSi to add USB alias seq.Signed-off-by: Ye Li
(cherry picked from commit bff4001d090fabf76d0a9a2060c0dc1386b3cab8)
(cherry picked from commit eb7927f1ffbe57b86adaf18bc34ac848428427f3)
