22 Mar, 2016
1 commit
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Put pci_get_hose_head() prototype in header so it is available to
external users, allowing them to find and iterate over all pci
controllers.Signed-off-by: Stuart Yoder
Reviewed-by: York Sun
17 Mar, 2016
2 commits
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Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
05 Feb, 2016
1 commit
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When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration
for pci_write_config32(). Add other missing ones.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
24 Jan, 2016
1 commit
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Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
13 Jan, 2016
8 commits
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We should use the new address mapping functions unless we are in
compatibility mode. Disable the old functions by default.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
At present the PCI address map functions use the old API. Add new functions
for this so that drivers can be converted.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a driver-model function for reading the PCI BAR from a device.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a function which scans the driver model device information rather
than scanning the PCI bus again.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
Add a function which scans the driver model device information rather
than scanning the PCI bus again.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
At present we are using legacy functions even in the auto-configuration code
used by driver model. Add a new pci_auto.c version which uses the correct
API.Create a new pci_internal.h header to hold functions that are used within
the PCI subsystem, but are not exported to other drivers.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_bus_find_bdf() accordingly.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
01 Dec, 2015
5 commits
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We eventually need to drop the compatibility functions for driver model. As
a first step, create a configuration option to enable them and hide them
when the option is disabled.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
With driver mode, struct pci_controller is stored as uclass-private data.
Add a comment to that effect.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This function looks up the controller and returns a pointer to each region
type.Signed-off-by: Simon Glass
Acked-by: Stephen Warren
Tested-by: Stephen Warren -
A PCI bus may be a bridge device where the controller is the bridge's
parent. Add a function to return the controller device, given a PCI device.Signed-off-by: Simon Glass
Acked-by: Stephen Warren
Tested-by: Stephen Warren -
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.Signed-off-by: Simon Glass
Reviewed-by: Stephen Warren
Tested-by: Stephen Warren
23 Oct, 2015
1 commit
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The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.Signed-off-by: Simon Glass
Reviewed-by: Joe Hershberger
26 Aug, 2015
1 commit
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These functions are defined by macros so do not show up with grep. Add
a comment to help.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
14 Aug, 2015
2 commits
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These functions allow iteration through all PCI devices including bridges.
The children of each PCI bus are returned in turn. This can be useful for
configuring, checking or enumerating all the devices.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
At present there are no PCI functions which allow access to PCI
configuration using a struct udevice. This is a sad situation for driver
model as it makes use of PCI harder. Add these functions.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
05 Aug, 2015
1 commit
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Rather than using 0xff in the code, add a constant.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
04 Aug, 2015
1 commit
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PCIe extends device's configuration space to 4k and provides
extended capability. The patch adds function to find them.
The code is ported from Linux PCIe driver.Signed-off-by: Minghuan Lian
Reviewed-by: Bin Meng
Reviewed-by: York Sun
22 Jul, 2015
2 commits
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It is useful to be able to find the full PCI address (bus, device and
function) for a PCI device. Add a function to provide this.Adjust the existing code to use this.
Signed-off-by: Simon Glass
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At present all PCI devices must be present in the device tree in order to
be used. Many or most PCI devices don't require any configuration other than
that which is done automatically by U-Boot. It is inefficent to add a node
with nothing but a compatible string in order to get a device working.Add a mechanism whereby PCI drivers can be declared along with the device
parameters they support (vendor/device/class). When no suitable driver is
found in the device tree the list of such devices is consulted to determine
the correct driver. If this also fails, then a generic driver is used as
before.The mechanism used is very similar to that provided by Linux and the header
file defintions are copied from Linux 4.1.Signed-off-by: Simon Glass
Reviewed-by: Joe Hershberger
15 Jul, 2015
2 commits
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Currently PCI expansion ROM address is assigned by a call to
pciauto_setup_rom() outside of the pci auto config process.
This does not work when expansion ROM is on a device behind
PCI bridge where bridge's memory limit register was already
programmed to a value that does not cover the newly assigned
expansion ROM address. To fix this, we should configure the
ROM address during the auto config process.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass
Acked-by: Simon Glass -
Only the PCI controller has access to the PCI region information. Make sure
to use the controller (rather than any attached bridges) when configuring
devices.This corrects a failure to scan and configure devices when driver model is
enabled for PCI.Also add a comment to explain the problem.
Signed-off-by: Simon Glass
17 Apr, 2015
3 commits
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Since sandbox does not have real devices (unless it borrows those from the
host) it must use emulations. Provide a uclass which permits PCI operations
to be passed through to an emulation device.Signed-off-by: Simon Glass
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Add a uclass for PCI controllers and a generic one for PCI devices. Adjust
the 'pci' command and the existing PCI support to work with this new uclass.
Keep most of the compatibility code in a separate file so that it can be
removed one day.TODO: Add more header file comments to the new parts of pci.h
Signed-off-by: Simon Glass
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Driver model will share many functions with the existing PCI implementation.
Move these into their own file to avoid duplication and confusion.Signed-off-by: Simon Glass
06 Feb, 2015
1 commit
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There is an existing function prototype in the header file but it is not
implemented. Implement something similar.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
24 Jan, 2015
1 commit
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Add code to the generic pci_rom file to access the VGA ROM in PCI space
when needed.Signed-off-by: Simon Glass
06 Jan, 2015
1 commit
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All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245Signed-off-by: Masahiro Yamada
Cc: Wolfgang Denk
Cc: Josef Wagner
Cc: Torsten Demke
Cc: Jim Thompson
Cc: Greg Allen
25 Nov, 2014
1 commit
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Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
23 Nov, 2014
1 commit
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When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is attempted to a device
number larger than 0 outside of bus 0. pci_skip_dev() is therefore
implemented to prevent any such accesses.Signed-off-by: Thierry Reding
Signed-off-by: Simon Glass
09 Sep, 2014
1 commit
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Some board-level drivers may wish to have per-device fixup functions
for PCI devices.Signed-off-by: Tim Harvey
10 Nov, 2013
1 commit
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This patch simply #ifdef's out the C-specific parts of pci.h when it is
included by an assembly file. This will allow the macros it contains to
be used from assembly source as will be done in a followup commit adding
support for more modern MIPS Malta boards.Signed-off-by: Paul Burton
17 Oct, 2013
1 commit
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Previously, the address of a requested capability is define like that
"#define PCI_DCR 0x78"
But, the addresses of capabilities is different with regard to PCIe revs.
So this method is not flexible.Now a function to get the address of a requested capability is added and used.
It can get the address dynamically by capability ID.
The step of this function:
1. Read Status register in PCIe configuration space to confirm that
Capabilities List is valid.
2. Find the address of Capabilities Pointer Register.
3. Find the address of requested capability from the first capability.Signed-off-by: Zhao Qiang
10 Aug, 2013
1 commit
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T4240 PCIe IP is version 3.0 and has some update comparing previous
QorIQ products.1. Move Freescale specific register define
to
arch/powerpc/include/asm/fsl_pci.h
and update the register offset define for T4240.2. add the status/control register define
use status/control register to judge the link status3. The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is RC or EP mode.This patch fixes the PCIe card link up issue on T4240QDS.
Signed-off-by: Roy Zang
Signed-off-by: Minghuan Lian
Signed-off-by: York Sun
