19 Feb, 2018
1 commit
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Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.Signed-off-by: Alexey Brodkin
Cc: Daniel Schwierzeck
Cc: Simon Glass
Cc: York Sun
Cc: Stefan Roese
Reviewed-by: Tom Rini
Reviewed-by: Daniel Schwierzeck
15 Feb, 2018
1 commit
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ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
LD u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".Signed-off-by: Alexey Brodkin
19 Jan, 2018
5 commits
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This is useful to make sure no stale data exists in caches after bootloaders.
The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
Add cgu-clk (clock generation unit) node to HSDK device tree.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.That said let's make our life easier a little bit.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
Previous SLC management implementation is broken. Seems like it was
never sufficiently tested probably because most of the time IOC was used
instead (i.e. no manual cache operations were done).Now if we disable IOC in U-boot we'll get a lot of errors while using
DMA-enabled peripherals.This time we fix it by substitution of broken per-line SLC operations
region operations as it is done in the Linux kernel (we took it from
v4.14 which is the latest stable as of today).Among other things this implementation might be a bit faster because
instead of iteration over each and every cache line we're taking care
about entire region in one go.Main changes:
* Replaced __slc_line_op (per line operations) by __slc_rgn_op
(region operations).* Reworked __slc_entire_op to get rid of __after_slc_op and
__before_slc_op functions.
Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is
used, see [1] for more details) is already incorporated here.* Added SLC invalidation to invalidate_icache_all().
* Added (start >= end) check to invalidate_dcache_range() and
flush_dcache_range() as some buggy drivers pass region start == end.* Added read-out of MMU BCR so we may know if PAE40 exists in HW and then
act on a particular AUX regs accordingly.[1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin
11 Dec, 2017
4 commits
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dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");if (/* condition */)
ioc_exists = 1;
-------------------------->>---------------------That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.Also while at it we change their type to "bool" as more appropriate.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.I.e. with help of this macro each core may get its index in SMP system.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
#include
^
-------------------------->8---------------------Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin
25 Nov, 2017
2 commits
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As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.Signed-off-by: Alexey Brodkin
Cc: Eugeniy Paltsev -
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.Signed-off-by: Alexey Brodkin
Cc: Eugeniy Paltsev
03 Oct, 2017
1 commit
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Convert the arc architecture to make use of the new asm-generic/io.h to
provide address mapping functions. As the generic implementations are
suitable for arc this is primarily a matter of removing code.Feedback from architecture maintainers is welcome.
Signed-off-by: Paul Burton
Cc: Alexey Brodkin
Acked-by: Alexey Brodkin
16 Aug, 2017
1 commit
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We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.Suggested-by: Wolfgang Denk
Signed-off-by: Simon Glass
30 Jun, 2017
3 commits
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ARC HS Development Kit board is a new low-cost
development platform sporting ARC HS38 in real silicon
with nice set of features such as:
* Quad-core ARC HS38 with 512 kB L2 cache and running @1GHz
* 4Gb of DDR (we use only lowest 1Gb out of it now)
* Lots of DesigWare peripherals
* Different connectivity modules:
- Synopsys HAPS HT3
- Arduino-compatible connector
- MikroBUSThis initial commit supports the following peripherals:
* UART (DW 8250)
* Ethernet (DW GMAC)
* SD/MMC (DW Mobile Storage)
* USB 1.1 & 2.0Signed-off-by: Alexey Brodkin
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We used to use the same memory layout and size for a couple of
boards and thus we just hardcoding IOC aperture start and size.Now when we're getting more boards with more memory on board we
need to have an ability to set IOC so it matches real DDR layout
and size.Even though it is not really a must but for simplicity we assume
IOC covers all the DDR we have, that gives us a chance to not
bother where DMA buffers are allocated - any part of DDR is OK.Signed-off-by: Alexey Brodkin
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ARCompact cores are not supposed to be used in SMP designs
(this doesn't stop people from creation of heterogeneous chips,
for an example keep reading) so there's no point in
checking ARCNUM and halting somebody if we build for ARC700.Moreover on AXS101 board we have ARC770 in the ASIC together with
other ARC cores and ARC770 happens to be the last node in JTAG chain
with ARCNUM = 4. And existing check halts the one and only core we
want keep running.Signed-off-by: Alexey Brodkin
05 Jun, 2017
1 commit
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Rather than including this arch-specific header file in common.h, include
it from within arc's u-boot.h header.Signed-off-by: Simon Glass
13 Apr, 2017
1 commit
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This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.Signed-off-by: Simon Glass
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini
11 Apr, 2017
1 commit
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As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854Signed-off-by: Alexey Brodkin
06 Apr, 2017
2 commits
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This header file is used by three archs. It could be used by all of them
since relocation is a common function. Move it into a generic file.Signed-off-by: Simon Glass
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This header file is used by two archs. It could be used by all of them
since it allows the cache to be on during relocation. Move it into a
generic file.Signed-off-by: Simon Glass
01 Apr, 2017
1 commit
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Even though we expect only master core to execute U-Boot code
let's make sure even if for some reason slave cores attempt to
execute U-Boot in parallel with master they get halted very early.If platform wants it may kick-start slave cores before passing control
to say Linux kernel or any other application that want to see all cores
of SMP SoC up and running.Signed-off-by: Alexey Brodkin
24 Mar, 2017
3 commits
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This commit replaces legacy timer code with usage of arc timer
driver.It removes arch/arc/lib/time.c file and selects CONFIG_CLK,
CONFIG_TIMER and CONFIG_ARC_TIMER options for all ARC boards by default.
Therefore we remove CONFIG_CLK option from less common axs101 and
axs103 defconfigs.Also it removes legacy CONFIG_SYS_TIMER_RATE config symbol from
axs10x.h, tb100.h and nsim.h configs files as it is no longer required.Signed-off-by: Vlad Zakharov
Reviewed-by: Simon Glass -
We want to use the same device tree blobs in both Linux and U-Boot for
ARC boards.Earlier device tree sources in U-Boot were very simplified and hadn't been
updated for quite a long period of time.So this commit is the first step on the road to unified device tree blobs.
First of all we re-organize device tree sources for AXS10X boards.
As AXS101 and AXS103 boards consist of AXS10X motherboard and AXC001 and
AXC003 cpu tiles respectively we add corresponding device tree source
files: axs10x_mb.dtsi for motherboard, axc001.dtsi and axc003.dtsi for
cpu tiles and axs101.dts and axs103.dts to represent actual boards.Also we delete axs10x.dts as it is no longer used.
One more important change - we add timer device to ARC skeleton device
tree sources as both ARC700 and ARCHS cores contain such timer.
We add core_clk nodes to abilis_tb100, nsim, axc001 and axc003 device tree
sources as it is referenced via phandle from timer node in common
skeleton.dtsi file.Signed-off-by: Vlad Zakharov
Reviewed-by: Simon Glass -
This commit introduces timer driver for ARC.
ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.Signed-off-by: Vlad Zakharov
Reviewed-by: Simon Glass
26 Jan, 2017
1 commit
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This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_RSigned-off-by: Simon Glass
03 Dec, 2016
1 commit
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Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.Signed-off-by: Masahiro Yamada
Acked-by: Alexey Brodkin
Acked-by: Simon Glass
Fixed build error for x86:
Signed-off-by: Simon Glass
24 Sep, 2016
1 commit
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Unlike Linux, nothing about errno.h is arch-specific in U-Boot.
As you see, all of arch/${ARCH}/include/asm/errno.h is just a
wrapper of . Actually, U-Boot does not
export headers to user-space, so we just have to care about the
consistency in the U-Boot tree.Now all of include directives for are gone.
Deprecate .Signed-off-by: Masahiro Yamada
Acked-by: Alexey Brodkin
16 Sep, 2016
1 commit
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With newer ARC tools old way of CPU specification gets obsolete,
so we're switching to newer and more common way of setting "-mcpu".Signed-off-by: Alexey Brodkin
05 Aug, 2016
5 commits
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As of now we have 2 flavors of ARC SDP boards:
1) AXS101 - with ARC770 in ASIC
2) AXS103 - with ARC HS38 in FPGABoth options share exactly the same base-board and only differ with
CPU-tiles in use. That means all peripherals are the same (they are
implemented in FPGA on the base-board) and so generic board could be
used for both.While at it:
* Recreated defconfigs with savedefconfig
* In include/configs/axs10x.h numerical sizes replaced with
defines from linux/sizes.h for better readability.Signed-off-by: Alexey Brodkin
Reviewed-by: Tom Rini -
ARCangel was one of the main development boards back in the day but
now it's gone and replaced by other boards like ARC SDP.But we also used to have simulation platform very similar to ARCangel4
in terms of CPU settings as well as basic IO like UART. Even though
ARCangel4 is long gone now we have a replacement for simulation which is
a plain or stand-alone nSIM and Free nSIM.Note Free nSIM is available for download here:
https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgiAnd while at it:
* Finally switch hex numerical values in nsim.h to defines from
include/linux/sizes.h
* Add defconfigs with ARC HS38 cores
* Recreated all defconfigs with savedefconfigSigned-off-by: Alexey Brodkin
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Starting from arc-2016.03 GNU tools linker properly works with
symbols defined in linker script and so external declarations
are no longer required, dump them.Signed-off-by: Alexey Brodkin
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Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.Now we update it with more ARCv2 specific vectors like
* Software Interrupt
* Division by zero
* Data cache consistency error
* Misaligned accessAlso normal interrupts are now implemented properly and extened to
all possible 240 items.Signed-off-by: Alexey Brodkin
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This might be useful to make sure relocation fixups really
happen. And since this info gets printed only in DEBUG
build it doesn't really hurt normal execution.Signed-off-by: Alexey Brodkin
04 Jul, 2016
2 commits
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Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------In this change we disable struct arch_global_data in ASM which fixes
the issue above.Signed-off-by: Alexey Brodkin
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Newer ARC toolchains don't support "-marchs" option any longer.
Instead "-mcpu=archs" should be used. What's also important older
toiolchains that support ARC HS cores will also happily accept
"-mcpu=archs" so that's a very safe move.Signed-off-by: Alexey Brodkin
13 Jun, 2016
2 commits
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Memory barriers are proven to be a requirement for both compiler and
real hardware to properly serialize access to critical data.For example if CPU or data bus it uses may do reordering of data
accesses absence of memory barriers might easily lead to very subtle and
hard to debug data corruptions.This implementation was heavily borrowed from up to date Linux kernel.
Signed-off-by: Alexey Brodkin
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According to ARC HS databook it is required to flush and disable
caches prior programming IOC registers. Otherwise ongoing coherent
memory operations may not observe the coherency protocols as
expected.But since in ARC HS v2.1 there's no way to disable SLC (AKA L2 cache)
we're doing our best flushing and invalidating it.Signed-off-by: Alexey Brodkin