27 Oct, 2016

1 commit

• 6f94fa21c   arm: socfpga: is1: Adding handoff for SDRAM ctrlcfg.extratime1 ... Browse Code »

  Adding new handoff for SDRAM ctrcfg.extratime1 which is
  required for stable LPDDR2 operation. Since the board is
  using DDR3, the handoff is set to default value 0.

  Signed-off-by: Chin Liang See
  Cc: Marek Vasut
  Cc: Dinh Nguyen

  Chin Liang See

  2016-10-27 14:03:10 +0800  

08 Jun, 2016

1 commit

• 35546f6f2   ARM: socfpga: add support for IS1 board ... Browse Code »

  This adds support for IS1 board. Pretty usual socfpga board,
  256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
  additional ethernet ports connected to the FPGA.

  Signed-off-by: Pavel Machek

  Pavel Machek

  2016-06-08 08:56:30 +0800