27 Apr, 2018
1 commit
-
It is for imx8qm and imx8qxp, and the cadence IP is in it.
Both DM and Non-DM are supported in this driver. The DM support
only probes the USB3 node, but won't parse any properties from node in DTS.
The registers address are still hard coded, that share with non-DM codes.The DM driver will enable the power of USB3 controller and USB3 PHY. But
for Non-DM driver, users need to power up them in board level codes.Signed-off-by: Peter Chen
Signed-off-by: Ye Li
28 Nov, 2017
1 commit
-
Same macros are defined in various places. Collect them into
include/linux/bitops.h like Linux.Signed-off-by: Masahiro Yamada
12 Oct, 2017
1 commit
-
When compiling with W=1 the following warning is observed:
board/freescale/mx6sabresd/mx6sabresd.c:601:5: warning: no previous prototype for ‘board_ehci_power’ [-Wmissing-prototypes] int board_ehci_power(int port, int on)
Remove this warning by adding the function prototype into usb/ehci-ci.h file.
Signed-off-by: Diego Dorta
23 Sep, 2017
1 commit
-
Commit a8ecb39e accidentally reverted config macro CONFIG_ARCH_LS1021A
to CONFIG_LS102XA.Signed-off-by: York Sun
10 Aug, 2017
1 commit
-
Signed-off-by: Rajat Srivastava
Signed-off-by: Rajesh Bhagat
Signed-off-by: yinbo.zhu
[YS: Revise subject, remove commit message]
Reviewed-by: York Sun
16 Jun, 2017
1 commit
-
There was for long time no activity in the mpx5xxx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in mpc5xxx,
so remove it.Signed-off-by: Heiko Schocher
12 Jun, 2017
1 commit
-
There was for long time no activity in the 8xx area.
We need to go further and convert to Kconfig, but it
turned out, nobody is interested anymore in 8xx,
so remove it (with a heavy heart, knowing that I remove
here the root of U-Boot).Signed-off-by: Heiko Schocher
08 Jun, 2017
1 commit
-
The regs_otg field in uintptr_t of the platform data structure for
dwc2-otg has thus far been an unsigned int, but will eventually be
casted into a void*.This raises the following error with GCC 6.3 and buildman:
../drivers/usb/gadget/dwc2_udc_otg.c: In function 'dwc2_udc_probe':
../drivers/usb/gadget/dwc2_udc_otg.c:821:8: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
^This changes regs_otg to a uintptr_t to ensure that it is large enough
to hold any valid pointer (and fix the associated warning).Signed-off-by: Philipp Tomsich
18 Apr, 2017
1 commit
-
Use CONFIG_ARCH_LS1021A instead.
Signed-off-by: York Sun
24 Sep, 2016
1 commit
-
Collect a couple of duplicated defines into a single place.
Signed-off-by: Masahiro Yamada
27 Jul, 2016
2 commits
-
Remove Soc specific defines and use generic chasis specific defines
for USB controller base address mapping.Signed-off-by: Rajesh Bhagat
Reviewed-by: York Sun
26 Jul, 2016
2 commits
-
The total FIFO size of some SoCs may be different from the existen, this
patch supports fifo size setting from platform data.Signed-off-by: Ziyuan Xu
Acked-by: Simon Glass -
So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and
Innosilicon. This patch applys dwc2 usb driver framework to implement
phy_init() and phy_off() methods for Synopsys phy on Rockchip platform.Signed-off-by: Ziyuan Xu
Acked-by: Simon Glass
02 Apr, 2016
5 commits
-
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass -
Some registers of usb_ehci were marked as reserved.
This may be true for some variants of Chipidea USB core, but they have
meaning on other devices.The following registers were added:
sbusstatus/sbusmode: AHB-related registers
genconfig*: Auxiluary IP core configuration registers.Signed-off-by: Mateusz Kulikowski
Reviewed-by: Marek Vasut
Tested-by: Simon Glass -
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
Tested-by: Simon Glass -
ulpi_read and ulpi_write are used to read/write registers via ULPI bus.
Code generates compilation warnings on 64-bit machines where pointer
is cast to u32.This patch drops all but last 8 bits of register address.
It is possible, because addresses on ULPI bus are 6- or 8-bit.It is not possible (according to ULPI 1.1 spec) to have more
than 8-bit addressing.This patch should not cause regressions as all calls to
ulpi_read/write use either structure pointer (@ address 0) or integer
offsets cast to pointer - addresses requested are way below 8-bit range.Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut -
viewport_addr is address of memory mapped ULPI viewport.
It is used only as argument to readl/writel later
causing compile warnings on 64-bit devices.This fix changes its type to match pointer size.
Signed-off-by: Mateusz Kulikowski
Acked-by: Marek Vasut
19 Jan, 2016
1 commit
-
In a number of places we had wordings of the GPL (or LGPL in a few
cases) license text that were split in such a way that it wasn't caught
previously. Convert all of these to the correct SPDX-License-Identifier
tag.Signed-off-by: Tom Rini
18 Dec, 2015
7 commits
-
The driver is actually for the Designware DWC2 controller.
This patch renames the global s3c_udc.h header to dwc2_udc.h.The rename is done automatically:
$ sed -i "s/s3c_udc\.h/dwc2_udc.h/g" \
`git grep "s3c_udc\.h" | cut -d : -f 1`Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
This patch is the second and final to rename global symbol,
the s3c_udc_probe() function.The rename is done automatically:
$ sed -i "s/s3c_udc_probe/dwc2_udc_probe/g" \
`git grep s3c_udc_probe | cut -d : -f 1`Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
This patch is the first to rename global symbol, the struct
s3c_plat_otg_data.The rename is done automatically:
$ sed -i "s/s3c_plat_otg_data/dwc2_plat_otg_data/g" \
`git grep s3c_plat_otg_data | cut -d : -f 1`Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
Tweak the comments in the driver to reflect this fact.Signed-off-by: Marek Vasut
-
The extern statements are useless, remove them. Also remove the
extern ... controller, which is completely useless.Signed-off-by: Marek Vasut
-
Most of the functions are local to the s3c_udc driver, remove them
from the s3c_udc.h header to stop those bits from propagating all
over the place. Instead, move all the private stuff into new private
s3c_udc_otg_priv.h header.Signed-off-by: Marek Vasut
-
The driver is actually for the Designware DWC2 controller.
This patch renames struct s3c_udc to struct dwc2_udc to make
things more obvious and clear.Signed-off-by: Marek Vasut
12 Dec, 2014
1 commit
-
Conflicts:
board/freescale/mx6sxsabresd/mx6sxsabresd.cSigned-off-by: Tom Rini
25 Nov, 2014
1 commit
-
Define USB configs for LS1021XA such as CONFIG_SYS_FSL_USB1_ADDR,
CONFIG_USB_MAX_CONTROLLER_COUNTSigned-off-by: Nikhil Badola
Reviewed-by: York Sun
15 Nov, 2014
1 commit
-
usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."Signed-off-by: Peng Fan
Signed-off-by: Ye Li
07 Nov, 2014
1 commit
-
Allow passing in a custom configuration of the gusbcfg register
via platform data.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Vince Bridgers
Acked-by: Pavel Machek
Cc: Stefan Roese
Reviewed-by: Lukasz Majewski
Tested-by: Lukasz Majewski
31 Oct, 2014
1 commit
-
[1] arch/arm/include/asm/arch-at91/at91_shdwn.h
The top9000 was the last board to use this header file.
It was removed by commit d58a9451e733 (ppc/arm: zap EMK boards).[2] board/matrix_vision/common/*
Some Matrix Vision boards were dropped by commit e7a565638a7a
(powerpc: mpc83xx: remove board support for MERGERBOX and MVBLM7)
and commit af55e35d3389
(powerpc: mpc5xxx: remove board support for MVBC_P and MVSMR).
Since then these files have been unused.[3] include/usb/omap1510_udc.h
The omap5912osk was the last board to use this header file.
It was removed by commit 62d636aa2ac2
(omap: remove omap5912osk board support).Signed-off-by: Masahiro Yamada
Acked-By: Wolfgang Denk
26 Aug, 2014
1 commit
-
resync ubi subsystem with linux:
commit 455c6fdbd219161bd09b1165f11699d6d73de11c
Author: Linus Torvalds
Date: Sun Mar 30 20:40:15 2014 -0700Linux 3.14
A nice side effect of this, is we introduce UBI Fastmap support
to U-Boot.Signed-off-by: Heiko Schocher
Signed-off-by: Tom Rini
Cc: Marek Vasut
Cc: Sergey Lapin
Cc: Scott Wood
Cc: Joerg Krause
09 Aug, 2014
1 commit
-
The following configs are not defined at all.
- CONFIG_OMAP1510
- CONFIG_OMAP_1510P1
- CONFIG_OMAP_SX1
- CONFIG_OMAP3_DMA
- CONFIG_OMAP3_ZOOM2
- CONFIG_OMAP_INNOVATORSigned-off-by: Masahiro Yamada
Cc: Tom Rini
17 May, 2014
1 commit
-
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bitSigned-off-by: Nikhil Badola
Signed-off-by: Ramneek Mehresh
Reviewed-by: York Sun
23 Apr, 2014
1 commit
-
Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writesSigned-off-by: Ramneek Mehresh
Signed-off-by: Nikhil Badola
Reviewed-by: York Sun
05 Mar, 2014
1 commit
-
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13cSigned-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Tom Rini
Cc: Stefan Roese
Cc: Albert Aribaud
Acked-by: Tom Rini
Acked-by: Stefan Roese
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini
07 Feb, 2014
1 commit
-
With e0059ea switching to using SZ_1K, we need to #include
here for everyone to build still.Signed-off-by: Tom Rini
06 Feb, 2014
2 commits
-
The mv_udc is not marvell-specific anymore. The mv_udc is used to drive
generic ChipIdea CI13xxx series OTG cores, so rename the driver to ci_udc
instead.Signed-off-by: Marek Vasut
Cc: Eric Nelson
Cc: Stefano Babic -
The Samsung's UDC driver is not anymore copying data from USB requests to
aligned internal buffers. Now it works directly in data allocated in the
upper layers like UMS, DFU, THOR.This change is possible since those gadgets now must take care to allocate
buffers aligned to cache line (CONFIG_SYS_CACHELINE_SIZE).This can be achieved by using DEFINE_CACHE_ALIGN_BUFFER() or
ALLOC_CACHE_ALIGN_BUFFER() macros. Those take care to allocate buffer
aligned to cache line in both starting address and its size.
Sometimes it is enough to just use memalign() with size being a
multiplication of cache line size.Test condition
- test HW + measurement: Trats - Exynos4210 rev.1
- test HW Trats2 - Exynos4412 rev.1
400 MiB compressed rootfs image download with `thor 0 mmc 0`Measurement:
Transmission speed: 27.04 MiB/sSigned-off-by: Lukasz Majewski
Cc: Marek Vasut
