Commit 0a4ae727d6aa459247b027387edb6ff99f657792
Exists in
ti-lsk-linux-4.1.y
and in
12 other branches
Merge branch 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux into drm-fixes
The first one is a one liner fixing a stupid typo in the VM handling code and is only relevant if play with one of the VM defines. The other two switches CIK to use the CPDMA instead of the SDMA for buffer moves, as it turned out the SDMA is still sometimes not 100% reliable. * 'drm-fixes-3.15' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: use the CP DMA on CIK drm/radeon: sync page table updates drm/radeon: fix vm buffer size estimation
Showing 2 changed files Side-by-side Diff
drivers/gpu/drm/radeon/radeon_asic.c
... | ... | @@ -2049,8 +2049,8 @@ |
2049 | 2049 | .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX, |
2050 | 2050 | .dma = &cik_copy_dma, |
2051 | 2051 | .dma_ring_index = R600_RING_TYPE_DMA_INDEX, |
2052 | - .copy = &cik_copy_dma, | |
2053 | - .copy_ring_index = R600_RING_TYPE_DMA_INDEX, | |
2052 | + .copy = &cik_copy_cpdma, | |
2053 | + .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX, | |
2054 | 2054 | }, |
2055 | 2055 | .surface = { |
2056 | 2056 | .set_reg = r600_set_surface_reg, |
drivers/gpu/drm/radeon/radeon_vm.c
... | ... | @@ -132,7 +132,7 @@ |
132 | 132 | struct radeon_cs_reloc *list; |
133 | 133 | unsigned i, idx; |
134 | 134 | |
135 | - list = kmalloc_array(vm->max_pde_used + 1, | |
135 | + list = kmalloc_array(vm->max_pde_used + 2, | |
136 | 136 | sizeof(struct radeon_cs_reloc), GFP_KERNEL); |
137 | 137 | if (!list) |
138 | 138 | return NULL; |
... | ... | @@ -585,7 +585,8 @@ |
585 | 585 | { |
586 | 586 | static const uint32_t incr = RADEON_VM_PTE_COUNT * 8; |
587 | 587 | |
588 | - uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory); | |
588 | + struct radeon_bo *pd = vm->page_directory; | |
589 | + uint64_t pd_addr = radeon_bo_gpu_offset(pd); | |
589 | 590 | uint64_t last_pde = ~0, last_pt = ~0; |
590 | 591 | unsigned count = 0, pt_idx, ndw; |
591 | 592 | struct radeon_ib ib; |
... | ... | @@ -642,6 +643,7 @@ |
642 | 643 | incr, R600_PTE_VALID); |
643 | 644 | |
644 | 645 | if (ib.length_dw != 0) { |
646 | + radeon_semaphore_sync_to(ib.semaphore, pd->tbo.sync_obj); | |
645 | 647 | radeon_semaphore_sync_to(ib.semaphore, vm->last_id_use); |
646 | 648 | r = radeon_ib_schedule(rdev, &ib, NULL); |
647 | 649 | if (r) { |
648 | 650 | |
649 | 651 | |
... | ... | @@ -689,15 +691,18 @@ |
689 | 691 | /* walk over the address space and update the page tables */ |
690 | 692 | for (addr = start; addr < end; ) { |
691 | 693 | uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE; |
694 | + struct radeon_bo *pt = vm->page_tables[pt_idx].bo; | |
692 | 695 | unsigned nptes; |
693 | 696 | uint64_t pte; |
694 | 697 | |
698 | + radeon_semaphore_sync_to(ib->semaphore, pt->tbo.sync_obj); | |
699 | + | |
695 | 700 | if ((addr & ~mask) == (end & ~mask)) |
696 | 701 | nptes = end - addr; |
697 | 702 | else |
698 | 703 | nptes = RADEON_VM_PTE_COUNT - (addr & mask); |
699 | 704 | |
700 | - pte = radeon_bo_gpu_offset(vm->page_tables[pt_idx].bo); | |
705 | + pte = radeon_bo_gpu_offset(pt); | |
701 | 706 | pte += (addr & mask) * 8; |
702 | 707 | |
703 | 708 | if ((last_pte + 8 * count) != pte) { |