Commit 179e8471673ce0249cd4ecda796008f7757e5bad
Committed by
Rafael J. Wysocki
Rafael J. Wysocki
1 parent
41629a8233
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
intel_pstate: Set CPU number before accessing MSRs
Ensure that cpu->cpu is set before writing MSR_IA32_PERF_CTL during CPU initialization. Otherwise only cpu0 has its P-state set and all other cores are left with their values unchanged. In most cases, this is not too serious because the P-states will be set correctly when the timer function is run. But when the default governor is set to performance, the per-CPU current_pstate stays the same forever and no attempts are made to write the MSRs again. Signed-off-by: Vincent Minet <vincent@vincent-minet.net> Cc: All applicable <stable@vger.kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Showing 1 changed file with 1 additions and 2 deletions Side-by-side Diff
drivers/cpufreq/intel_pstate.c
| ... | ... | @@ -700,9 +700,8 @@ |
| 700 | 700 | |
| 701 | 701 | cpu = all_cpu_data[cpunum]; |
| 702 | 702 | |
| 703 | - intel_pstate_get_cpu_pstates(cpu); | |
| 704 | - | |
| 705 | 703 | cpu->cpu = cpunum; |
| 704 | + intel_pstate_get_cpu_pstates(cpu); | |
| 706 | 705 | |
| 707 | 706 | init_timer_deferrable(&cpu->timer); |
| 708 | 707 | cpu->timer.function = intel_pstate_timer_func; |
