Commit 195b1f17492a9cfd74391e11389710ae1d9be371

Authored by David S. Miller
Committed by Greg Kroah-Hartman
1 parent ca1d67673a

sparc64: Do not insert non-valid PTEs into the TSB hash table.

[ Upstream commit 18f38132528c3e603c66ea464727b29e9bbcb91b ]

The assumption was that update_mmu_cache() (and the equivalent for PMDs) would
only be called when the PTE being installed will be accessible by the user.

This is not true for code paths originating from remove_migration_pte().

There are dire consequences for placing a non-valid PTE into the TSB.  The TLB
miss frramework assumes thatwhen a TSB entry matches we can just load it into
the TLB and return from the TLB miss trap.

So if a non-valid PTE is in there, we will deadlock taking the TLB miss over
and over, never satisfying the miss.

Just exit early from update_mmu_cache() and friends in this situation.

Based upon a report and patch from Christopher Alexander Tobias Schulze.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Showing 1 changed file with 8 additions and 0 deletions Side-by-side Diff

arch/sparc/mm/init_64.c
... ... @@ -350,6 +350,10 @@
350 350  
351 351 mm = vma->vm_mm;
352 352  
  353 + /* Don't insert a non-valid PTE into the TSB, we'll deadlock. */
  354 + if (!pte_accessible(mm, pte))
  355 + return;
  356 +
353 357 spin_lock_irqsave(&mm->context.lock, flags);
354 358  
355 359 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE)
... ... @@ -2613,6 +2617,10 @@
2613 2617 return;
2614 2618  
2615 2619 pte = pmd_val(entry);
  2620 +
  2621 + /* Don't insert a non-valid PMD into the TSB, we'll deadlock. */
  2622 + if (!(pte & _PAGE_VALID))
  2623 + return;
2616 2624  
2617 2625 /* We are fabricating 8MB pages using 4MB real hw pages. */
2618 2626 pte |= (addr & (1UL << REAL_HPAGE_SHIFT));