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Commit 2a2c74b2efcb1a0ca3fdcb5fbb96ad8de6a29177

Authored by Alistair Popple
Committed by Benjamin Herrenschmidt
1 parent 6b11930f72
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

IBM Akebono: Add the Akebono platform 

This patch adds support for the IBM Akebono board.

Signed-off-by: Alistair Popple <alistair@popple.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

Showing 11 changed files with 901 additions and 26 deletions Side-by-side Diff

Documentation/devicetree/bindings/powerpc/4xx/akebono.txt
Diff comments   View file @ 2a2c74b
  1 +
  2 +IBM Akebono board device tree
  3 +=============================
  4 +
  5 +The IBM Akebono board is a development board for the PPC476GTR SoC.
  6 +
  7 +0) The root node
  8 +
  9 + Required properties:
  10 +
  11 + - model : "ibm,akebono".
  12 + - compatible : "ibm,akebono" , "ibm,476gtr".
  13 +
  14 +1.a) The Secure Digital Host Controller Interface (SDHCI) node
  15 +
  16 + Represent the Secure Digital Host Controller Interfaces.
  17 +
  18 + Required properties:
  19 +
  20 + - compatible : should be "ibm,476gtr-sdhci","generic-sdhci".
  21 + - reg : should contain the SDHCI registers location and length.
  22 + - interrupt-parent : a phandle for the interrupt controller.
  23 + - interrupts : should contain the SDHCI interrupt.
  24 +
  25 +1.b) The Advanced Host Controller Interface (AHCI) SATA node
  26 +
  27 + Represents the advanced host controller SATA interface.
  28 +
  29 + Required properties:
  30 +
  31 + - compatible : should be "ibm,476gtr-ahci".
  32 + - reg : should contain the AHCI registers location and length.
  33 + - interrupt-parent : a phandle for the interrupt controller.
  34 + - interrupts : should contain the AHCI interrupt.
  35 +
  36 +1.c) The FPGA node
  37 +
  38 + The Akebono board stores some board information such as the revision
  39 + number in an FPGA which is represented by this node.
  40 +
  41 + Required properties:
  42 +
  43 + - compatible : should be "ibm,akebono-fpga".
  44 + - reg : should contain the FPGA registers location and length.
  45 +
  46 +1.d) The AVR node
  47 +
  48 + The Akebono board has an Atmel AVR microprocessor attached to the I2C
  49 + bus as a power controller for the board.
  50 +
  51 + Required properties:
  52 +
  53 + - compatible : should be "ibm,akebono-avr".
  54 + - reg : should contain the I2C bus address for the AVR.
arch/powerpc/boot/Makefile
Diff comments   View file @ 2a2c74b
... ... @@ -53,6 +53,7 @@
53 53 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
54 54 $(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
55 55 $(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
  56 +$(obj)/treeboot-akebono.o: BOOTCFLAGS += -mcpu=405
56 57 $(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
57 58  
58 59  
... ... @@ -92,6 +93,7 @@
92 93 cuboot-taishan.c cuboot-katmai.c \
93 94 cuboot-warp.c cuboot-yosemite.c \
94 95 treeboot-iss4xx.c treeboot-currituck.c \
  96 + treeboot-akebono.c \
95 97 simpleboot.c fixed-head.S virtex.c
96 98 src-plat-$(CONFIG_8xx) += cuboot-8xx.c fixed-head.S ep88xc.c redboot-8xx.c
97 99 src-plat-$(CONFIG_PPC_MPC52xx) += cuboot-52xx.c
... ... @@ -250,6 +252,7 @@
250 252 image-$(CONFIG_ISS4xx) += treeImage.iss4xx \
251 253 treeImage.iss4xx-mpic
252 254 image-$(CONFIG_CURRITUCK) += treeImage.currituck
  255 +image-$(CONFIG_AKEBONO) += treeImage.akebono
253 256  
254 257 # Board ports in arch/powerpc/platform/8xx/Kconfig
255 258 image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads
arch/powerpc/boot/dcr.h
Diff comments   View file @ 2a2c74b
... ... @@ -15,6 +15,10 @@
15 15 asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
16 16 rval; \
17 17 })
  18 +#define mtdcrx(rn, val) \
  19 + ({ \
  20 + asm volatile("mtdcrx %0,%1" : : "r"(rn), "r" (val)); \
  21 + })
18 22  
19 23 /* 440GP/440GX SDRAM controller DCRs */
20 24 #define DCRN_SDRAM0_CFGADDR 0x010
arch/powerpc/boot/dts/akebono.dts
Diff comments   View file @ 2a2c74b
  1 +/*
  2 + * Device Tree Source for IBM Embedded PPC 476 Platform
  3 + *
  4 + * Copyright ยฉ 2013 Tony Breeds IBM Corporation
  5 + * Copyright ยฉ 2013 Alistair Popple IBM Corporation
  6 + *
  7 + * This file is licensed under the terms of the GNU General Public
  8 + * License version 2. This program is licensed "as is" without
  9 + * any warranty of any kind, whether express or implied.
  10 + */
  11 +
  12 +/dts-v1/;
  13 +
  14 +/memreserve/ 0x01f00000 0x00100000; // spin table
  15 +
  16 +/ {
  17 + #address-cells = <2>;
  18 + #size-cells = <2>;
  19 + model = "ibm,akebono";
  20 + compatible = "ibm,akebono", "ibm,476gtr";
  21 + dcr-parent = <&{/cpus/cpu@0}>;
  22 +
  23 + aliases {
  24 + serial0 = &UART0;
  25 + };
  26 +
  27 + cpus {
  28 + #address-cells = <1>;
  29 + #size-cells = <0>;
  30 +
  31 + cpu@0 {
  32 + device_type = "cpu";
  33 + model = "PowerPC,476";
  34 + reg = <0>;
  35 + clock-frequency = <1600000000>; // 1.6 GHz
  36 + timebase-frequency = <100000000>; // 100Mhz
  37 + i-cache-line-size = <32>;
  38 + d-cache-line-size = <32>;
  39 + i-cache-size = <32768>;
  40 + d-cache-size = <32768>;
  41 + dcr-controller;
  42 + dcr-access-method = "native";
  43 + status = "ok";
  44 + };
  45 + cpu@1 {
  46 + device_type = "cpu";
  47 + model = "PowerPC,476";
  48 + reg = <1>;
  49 + clock-frequency = <1600000000>; // 1.6 GHz
  50 + timebase-frequency = <100000000>; // 100Mhz
  51 + i-cache-line-size = <32>;
  52 + d-cache-line-size = <32>;
  53 + i-cache-size = <32768>;
  54 + d-cache-size = <32768>;
  55 + dcr-controller;
  56 + dcr-access-method = "native";
  57 + status = "disabled";
  58 + enable-method = "spin-table";
  59 + cpu-release-addr = <0x0 0x01f00000>;
  60 + };
  61 + };
  62 +
  63 + memory {
  64 + device_type = "memory";
  65 + reg = <0x0 0x0 0x0 0x0>; // filled in by zImage
  66 + };
  67 +
  68 + MPIC: interrupt-controller {
  69 + compatible = "chrp,open-pic";
  70 + interrupt-controller;
  71 + dcr-reg = <0xffc00000 0x00040000>;
  72 + #address-cells = <0>;
  73 + #size-cells = <0>;
  74 + #interrupt-cells = <2>;
  75 + single-cpu-affinity;
  76 + };
  77 +
  78 + plb {
  79 + compatible = "ibm,plb6";
  80 + #address-cells = <2>;
  81 + #size-cells = <2>;
  82 + ranges;
  83 + clock-frequency = <200000000>; // 200Mhz
  84 +
  85 + MAL0: mcmal {
  86 + compatible = "ibm,mcmal-476gtr", "ibm,mcmal2";
  87 + dcr-reg = <0xc0000000 0x062>;
  88 + num-tx-chans = <1>;
  89 + num-rx-chans = <1>;
  90 + #address-cells = <0>;
  91 + #size-cells = <0>;
  92 + interrupt-parent = <&MPIC>;
  93 + interrupts = < /*TXEOB*/ 77 0x4
  94 + /*RXEOB*/ 78 0x4
  95 + /*SERR*/ 76 0x4
  96 + /*TXDE*/ 79 0x4
  97 + /*RXDE*/ 80 0x4>;
  98 + };
  99 +
  100 + SATA0: sata@30000010000 {
  101 + compatible = "ibm,476gtr-ahci";
  102 + reg = <0x300 0x00010000 0x0 0x10000>;
  103 + interrupt-parent = <&MPIC>;
  104 + interrupts = <93 2>;
  105 + };
  106 +
  107 + EHCI0: ehci@30010000000 {
  108 + compatible = "ibm,476gtr-ehci", "generic-ehci";
  109 + reg = <0x300 0x10000000 0x0 0x10000>;
  110 + interrupt-parent = <&MPIC>;
  111 + interrupts = <85 2>;
  112 + };
  113 +
  114 + SD0: sd@30000000000 {
  115 + compatible = "ibm,476gtr-sdhci", "generic-sdhci";
  116 + reg = <0x300 0x00000000 0x0 0x10000>;
  117 + interrupts = <91 2>;
  118 + interrupt-parent = <&MPIC>;
  119 + };
  120 +
  121 + OHCI0: ohci@30010010000 {
  122 + compatible = "ibm,476gtr-ohci", "generic-ohci";
  123 + reg = <0x300 0x10010000 0x0 0x10000>;
  124 + interrupt-parent = <&MPIC>;
  125 + interrupts = <89 1>;
  126 + };
  127 +
  128 + OHCI1: ohci@30010020000 {
  129 + compatible = "ibm,476gtr-ohci", "generic-ohci";
  130 + reg = <0x300 0x10020000 0x0 0x10000>;
  131 + interrupt-parent = <&MPIC>;
  132 + interrupts = <88 1>;
  133 + };
  134 +
  135 + POB0: opb {
  136 + compatible = "ibm,opb-4xx", "ibm,opb";
  137 + #address-cells = <1>;
  138 + #size-cells = <1>;
  139 + /* Wish there was a nicer way of specifying a full
  140 + * 32-bit range
  141 + */
  142 + ranges = <0x00000000 0x0000033f 0x00000000 0x80000000
  143 + 0x80000000 0x0000033f 0x80000000 0x80000000>;
  144 + clock-frequency = <100000000>;
  145 +
  146 + RGMII0: emac-rgmii-wol@50004 {
  147 + compatible = "ibm,rgmii-wol-476gtr", "ibm,rgmii-wol";
  148 + reg = <0x50004 0x00000008>;
  149 + has-mdio;
  150 + };
  151 +
  152 + EMAC0: ethernet@30000 {
  153 + device_type = "network";
  154 + compatible = "ibm,emac-476gtr", "ibm,emac4sync";
  155 + interrupt-parent = <&EMAC0>;
  156 + interrupts = <0x0 0x1>;
  157 + #interrupt-cells = <1>;
  158 + #address-cells = <0>;
  159 + #size-cells = <0>;
  160 + interrupt-map = </*Status*/ 0x0 &MPIC 81 0x4
  161 + /*Wake*/ 0x1 &MPIC 82 0x4>;
  162 + reg = <0x30000 0x78>;
  163 +
  164 + /* local-mac-address will normally be added by
  165 + * the wrapper. If your device doesn't support
  166 + * passing data to the wrapper (in the form
  167 + * local-mac-addr=<hwaddr>) then you will need
  168 + * to set it manually here. */
  169 + //local-mac-address = [000000000000];
  170 +
  171 + mal-device = <&MAL0>;
  172 + mal-tx-channel = <0>;
  173 + mal-rx-channel = <0>;
  174 + cell-index = <0>;
  175 + max-frame-size = <9000>;
  176 + rx-fifo-size = <4096>;
  177 + tx-fifo-size = <2048>;
  178 + rx-fifo-size-gige = <16384>;
  179 + phy-mode = "rgmii";
  180 + phy-map = <0x00000000>;
  181 + rgmii-wol-device = <&RGMII0>;
  182 + has-inverted-stacr-oc;
  183 + has-new-stacr-staopc;
  184 + };
  185 +
  186 + UART0: serial@10000 {
  187 + device_type = "serial";
  188 + compatible = "ns16750", "ns16550";
  189 + reg = <0x10000 0x00000008>;
  190 + virtual-reg = <0xe8010000>;
  191 + clock-frequency = <1851851>;
  192 + current-speed = <38400>;
  193 + interrupt-parent = <&MPIC>;
  194 + interrupts = <39 2>;
  195 + };
  196 +
  197 + IIC0: i2c@00000000 {
  198 + compatible = "ibm,iic-476gtr", "ibm,iic";
  199 + reg = <0x0 0x00000020>;
  200 + interrupt-parent = <&MPIC>;
  201 + interrupts = <37 2>;
  202 + #address-cells = <1>;
  203 + #size-cells = <0>;
  204 + rtc@68 {
  205 + compatible = "stm,m41t80", "m41st85";
  206 + reg = <0x68>;
  207 + };
  208 + };
  209 +
  210 + IIC1: i2c@00000100 {
  211 + compatible = "ibm,iic-476gtr", "ibm,iic";
  212 + reg = <0x100 0x00000020>;
  213 + interrupt-parent = <&MPIC>;
  214 + interrupts = <38 2>;
  215 + #address-cells = <1>;
  216 + #size-cells = <0>;
  217 + avr@58 {
  218 + compatible = "ibm,akebono-avr";
  219 + reg = <0x58>;
  220 + };
  221 + };
  222 +
  223 + FPGA0: fpga@ebc00000 {
  224 + compatible = "ibm,akebono-fpga";
  225 + reg = <0xebc00000 0x8>;
  226 + };
  227 + };
  228 +
  229 + PCIE0: pciex@10100000000 {
  230 + device_type = "pci";
  231 + #interrupt-cells = <1>;
  232 + #size-cells = <2>;
  233 + #address-cells = <3>;
  234 + compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
  235 + primary;
  236 + port = <0x0>; /* port number */
  237 + reg = <0x00000101 0x00000000 0x0 0x10000000 /* Config space access */
  238 + 0x00000100 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
  239 + dcr-reg = <0xc0 0x20>;
  240 +
  241 +// pci_space < pci_addr > < cpu_addr > < size >
  242 + ranges = <0x02000000 0x00000000 0x80000000 0x00000110 0x80000000 0x0 0x80000000
  243 + 0x01000000 0x0 0x0 0x00000140 0x0 0x0 0x00010000>;
  244 +
  245 + /* Inbound starting at 0 to memsize filled in by zImage */
  246 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
  247 +
  248 + /* This drives busses 0 to 0xf */
  249 + bus-range = <0x0 0xf>;
  250 +
  251 + /* Legacy interrupts (note the weird polarity, the bridge seems
  252 + * to invert PCIe legacy interrupts).
  253 + * We are de-swizzling here because the numbers are actually for
  254 + * port of the root complex virtual P2P bridge. But I want
  255 + * to avoid putting a node for it in the tree, so the numbers
  256 + * below are basically de-swizzled numbers.
  257 + * The real slot is on idsel 0, so the swizzling is 1:1
  258 + */
  259 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  260 + interrupt-map = <
  261 + 0x0 0x0 0x0 0x1 &MPIC 45 0x2 /* int A */
  262 + 0x0 0x0 0x0 0x2 &MPIC 46 0x2 /* int B */
  263 + 0x0 0x0 0x0 0x3 &MPIC 47 0x2 /* int C */
  264 + 0x0 0x0 0x0 0x4 &MPIC 48 0x2 /* int D */>;
  265 + };
  266 +
  267 + PCIE1: pciex@20100000000 {
  268 + device_type = "pci";
  269 + #interrupt-cells = <1>;
  270 + #size-cells = <2>;
  271 + #address-cells = <3>;
  272 + compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
  273 + primary;
  274 + port = <0x1>; /* port number */
  275 + reg = <0x00000201 0x00000000 0x0 0x10000000 /* Config space access */
  276 + 0x00000200 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
  277 + dcr-reg = <0x100 0x20>;
  278 +
  279 +// pci_space < pci_addr > < cpu_addr > < size >
  280 + ranges = <0x02000000 0x00000000 0x80000000 0x00000210 0x80000000 0x0 0x80000000
  281 + 0x01000000 0x0 0x0 0x00000240 0x0 0x0 0x00010000>;
  282 +
  283 + /* Inbound starting at 0 to memsize filled in by zImage */
  284 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
  285 +
  286 + /* This drives busses 0 to 0xf */
  287 + bus-range = <0x0 0xf>;
  288 +
  289 + /* Legacy interrupts (note the weird polarity, the bridge seems
  290 + * to invert PCIe legacy interrupts).
  291 + * We are de-swizzling here because the numbers are actually for
  292 + * port of the root complex virtual P2P bridge. But I want
  293 + * to avoid putting a node for it in the tree, so the numbers
  294 + * below are basically de-swizzled numbers.
  295 + * The real slot is on idsel 0, so the swizzling is 1:1
  296 + */
  297 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  298 + interrupt-map = <
  299 + 0x0 0x0 0x0 0x1 &MPIC 53 0x2 /* int A */
  300 + 0x0 0x0 0x0 0x2 &MPIC 54 0x2 /* int B */
  301 + 0x0 0x0 0x0 0x3 &MPIC 55 0x2 /* int C */
  302 + 0x0 0x0 0x0 0x4 &MPIC 56 0x2 /* int D */>;
  303 + };
  304 +
  305 + PCIE2: pciex@18100000000 {
  306 + device_type = "pci";
  307 + #interrupt-cells = <1>;
  308 + #size-cells = <2>;
  309 + #address-cells = <3>;
  310 + compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
  311 + primary;
  312 + port = <0x2>; /* port number */
  313 + reg = <0x00000181 0x00000000 0x0 0x10000000 /* Config space access */
  314 + 0x00000180 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
  315 + dcr-reg = <0xe0 0x20>;
  316 +
  317 +// pci_space < pci_addr > < cpu_addr > < size >
  318 + ranges = <0x02000000 0x00000000 0x80000000 0x00000190 0x80000000 0x0 0x80000000
  319 + 0x01000000 0x0 0x0 0x000001c0 0x0 0x0 0x00010000>;
  320 +
  321 + /* Inbound starting at 0 to memsize filled in by zImage */
  322 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
  323 +
  324 + /* This drives busses 0 to 0xf */
  325 + bus-range = <0x0 0xf>;
  326 +
  327 + /* Legacy interrupts (note the weird polarity, the bridge seems
  328 + * to invert PCIe legacy interrupts).
  329 + * We are de-swizzling here because the numbers are actually for
  330 + * port of the root complex virtual P2P bridge. But I want
  331 + * to avoid putting a node for it in the tree, so the numbers
  332 + * below are basically de-swizzled numbers.
  333 + * The real slot is on idsel 0, so the swizzling is 1:1
  334 + */
  335 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  336 + interrupt-map = <
  337 + 0x0 0x0 0x0 0x1 &MPIC 61 0x2 /* int A */
  338 + 0x0 0x0 0x0 0x2 &MPIC 62 0x2 /* int B */
  339 + 0x0 0x0 0x0 0x3 &MPIC 63 0x2 /* int C */
  340 + 0x0 0x0 0x0 0x4 &MPIC 64 0x2 /* int D */>;
  341 + };
  342 +
  343 + PCIE3: pciex@28100000000 {
  344 + device_type = "pci";
  345 + #interrupt-cells = <1>;
  346 + #size-cells = <2>;
  347 + #address-cells = <3>;
  348 + compatible = "ibm,plb-pciex-476fpe", "ibm,plb-pciex";
  349 + primary;
  350 + port = <0x3>; /* port number */
  351 + reg = <0x00000281 0x00000000 0x0 0x10000000 /* Config space access */
  352 + 0x00000280 0x00000000 0x0 0x00001000>; /* UTL Registers space access */
  353 + dcr-reg = <0x120 0x20>;
  354 +
  355 +// pci_space < pci_addr > < cpu_addr > < size >
  356 + ranges = <0x02000000 0x00000000 0x80000000 0x00000290 0x80000000 0x0 0x80000000
  357 + 0x01000000 0x0 0x0 0x000002c0 0x0 0x0 0x00010000>;
  358 +
  359 + /* Inbound starting at 0 to memsize filled in by zImage */
  360 + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x0>;
  361 +
  362 + /* This drives busses 0 to 0xf */
  363 + bus-range = <0x0 0xf>;
  364 +
  365 + /* Legacy interrupts (note the weird polarity, the bridge seems
  366 + * to invert PCIe legacy interrupts).
  367 + * We are de-swizzling here because the numbers are actually for
  368 + * port of the root complex virtual P2P bridge. But I want
  369 + * to avoid putting a node for it in the tree, so the numbers
  370 + * below are basically de-swizzled numbers.
  371 + * The real slot is on idsel 0, so the swizzling is 1:1
  372 + */
  373 + interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  374 + interrupt-map = <
  375 + 0x0 0x0 0x0 0x1 &MPIC 69 0x2 /* int A */
  376 + 0x0 0x0 0x0 0x2 &MPIC 70 0x2 /* int B */
  377 + 0x0 0x0 0x0 0x3 &MPIC 71 0x2 /* int C */
  378 + 0x0 0x0 0x0 0x4 &MPIC 72 0x2 /* int D */>;
  379 + };
  380 + };
  381 +
  382 + chosen {
  383 + linux,stdout-path = &UART0;
  384 + };
  385 +};
arch/powerpc/boot/treeboot-akebono.c
Diff comments   View file @ 2a2c74b
  1 +/*
  2 + * Copyright ยฉ 2013 Tony Breeds IBM Corporation
  3 + * Copyright ยฉ 2013 Alistair Popple IBM Corporation
  4 + *
  5 + * Based on earlier code:
  6 + * Copyright (C) Paul Mackerras 1997.
  7 + *
  8 + * Matt Porter <mporter@kernel.crashing.org>
  9 + * Copyright 2002-2005 MontaVista Software Inc.
  10 + *
  11 + * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
  12 + * Copyright (c) 2003, 2004 Zultys Technologies
  13 + *
  14 + * Copyright 2007 David Gibson, IBM Corporation.
  15 + * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
  16 + * Copyright ยฉ 2011 David Kleikamp IBM Corporation
  17 + *
  18 + * This program is free software; you can redistribute it and/or
  19 + * modify it under the terms of the GNU General Public License
  20 + * as published by the Free Software Foundation; either version
  21 + * 2 of the License, or (at your option) any later version.
  22 + */
  23 +#include <stdarg.h>
  24 +#include <stddef.h>
  25 +#include "types.h"
  26 +#include "elf.h"
  27 +#include "string.h"
  28 +#include "stdlib.h"
  29 +#include "stdio.h"
  30 +#include "page.h"
  31 +#include "ops.h"
  32 +#include "reg.h"
  33 +#include "io.h"
  34 +#include "dcr.h"
  35 +#include "4xx.h"
  36 +#include "44x.h"
  37 +#include "libfdt.h"
  38 +
  39 +BSS_STACK(4096);
  40 +
  41 +#define SPRN_PIR 0x11E /* Processor Indentification Register */
  42 +#define USERDATA_LEN 256 /* Length of userdata passed in by PIBS */
  43 +#define MAX_RANKS 0x4
  44 +#define DDR3_MR0CF 0x80010011U
  45 +#define CCTL0_MCO2 0x8000080FU
  46 +#define CCTL0_MCO3 0x80000810U
  47 +#define CCTL0_MCO4 0x80000811U
  48 +#define CCTL0_MCO5 0x80000812U
  49 +#define CCTL0_MCO6 0x80000813U
  50 +
  51 +static unsigned long long ibm_akebono_memsize;
  52 +static long long unsigned mac_addr;
  53 +
  54 +static unsigned long long ibm_akebono_detect_memsize(void)
  55 +{
  56 + u32 reg;
  57 + unsigned i;
  58 + unsigned long long memsize = 0;
  59 +
  60 + for (i = 0; i < MAX_RANKS; i++) {
  61 + reg = mfdcrx(DDR3_MR0CF + i);
  62 +
  63 + if (!(reg & 1))
  64 + continue;
  65 +
  66 + reg &= 0x0000f000;
  67 + reg >>= 12;
  68 + memsize += (0x800000ULL << reg);
  69 + }
  70 +
  71 + return memsize;
  72 +}
  73 +
  74 +static void ibm_akebono_fixups(void)
  75 +{
  76 + void *emac;
  77 + u32 reg;
  78 + void *devp = finddevice("/");
  79 + u32 dma_ranges[7];
  80 +
  81 + dt_fixup_memory(0x0ULL, ibm_akebono_memsize);
  82 +
  83 + while ((devp = find_node_by_devtype(devp, "pci"))) {
  84 + if (getprop(devp, "dma-ranges", dma_ranges,
  85 + sizeof(dma_ranges)) < 0) {
  86 + printf("%s: Failed to get dma-ranges\r\n", __func__);
  87 + continue;
  88 + }
  89 +
  90 + dma_ranges[5] = ibm_akebono_memsize >> 32;
  91 + dma_ranges[6] = ibm_akebono_memsize & 0xffffffffUL;
  92 +
  93 + setprop(devp, "dma-ranges", dma_ranges, sizeof(dma_ranges));
  94 + }
  95 +
  96 + /* Fixup the SD timeout frequency */
  97 + mtdcrx(CCTL0_MCO4, 0x1);
  98 +
  99 + /* Disable SD high-speed mode (which seems to be broken) */
  100 + reg = mfdcrx(CCTL0_MCO2) & ~0x2;
  101 + mtdcrx(CCTL0_MCO2, reg);
  102 +
  103 + /* Set the MAC address */
  104 + emac = finddevice("/plb/opb/ethernet");
  105 + if (emac > 0) {
  106 + if (mac_addr)
  107 + setprop(emac, "local-mac-address",
  108 + ((u8 *) &mac_addr) + 2 , 6);
  109 + }
  110 +}
  111 +
  112 +void platform_init(char *userdata)
  113 +{
  114 + unsigned long end_of_ram, avail_ram;
  115 + u32 pir_reg;
  116 + int node, size;
  117 + const u32 *timebase;
  118 + int len, i, userdata_len;
  119 + char *end;
  120 +
  121 + userdata[USERDATA_LEN - 1] = '\0';
  122 + userdata_len = strlen(userdata);
  123 + for (i = 0; i < userdata_len - 15; i++) {
  124 + if (strncmp(&userdata[i], "local-mac-addr=", 15) == 0) {
  125 + if (i > 0 && userdata[i - 1] != ' ') {
  126 + /* We've only found a substring ending
  127 + * with local-mac-addr so this isn't
  128 + * our mac address. */
  129 + continue;
  130 + }
  131 +
  132 + mac_addr = strtoull(&userdata[i + 15], &end, 16);
  133 +
  134 + /* Remove the "local-mac-addr=<...>" from the kernel
  135 + * command line, including the tailing space if
  136 + * present. */
  137 + if (*end == ' ')
  138 + end++;
  139 +
  140 + len = ((int) end) - ((int) &userdata[i]);
  141 + memmove(&userdata[i], end,
  142 + userdata_len - (len + i) + 1);
  143 + break;
  144 + }
  145 + }
  146 +
  147 + loader_info.cmdline = userdata;
  148 + loader_info.cmdline_len = 256;
  149 +
  150 + ibm_akebono_memsize = ibm_akebono_detect_memsize();
  151 + if (ibm_akebono_memsize >> 32)
  152 + end_of_ram = ~0UL;
  153 + else
  154 + end_of_ram = ibm_akebono_memsize;
  155 + avail_ram = end_of_ram - (unsigned long)_end;
  156 +
  157 + simple_alloc_init(_end, avail_ram, 128, 64);
  158 + platform_ops.fixups = ibm_akebono_fixups;
  159 + platform_ops.exit = ibm44x_dbcr_reset;
  160 + pir_reg = mfspr(SPRN_PIR);
  161 +
  162 + /* Make sure FDT blob is sane */
  163 + if (fdt_check_header(_dtb_start) != 0)
  164 + fatal("Invalid device tree blob\n");
  165 +
  166 + node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
  167 + "cpu", sizeof("cpu"));
  168 + if (!node)
  169 + fatal("Cannot find cpu node\n");
  170 + timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size);
  171 + if (timebase && (size == 4))
  172 + timebase_period_ns = 1000000000 / *timebase;
  173 +
  174 + fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
  175 + fdt_init(_dtb_start);
  176 +
  177 + serial_console_init();
  178 +}
arch/powerpc/boot/wrapper
Diff comments   View file @ 2a2c74b
... ... @@ -270,6 +270,9 @@
270 270 treeboot-currituck)
271 271 link_address='0x1000000'
272 272 ;;
  273 +treeboot-akebono)
  274 + link_address='0x1000000'
  275 + ;;
273 276 treeboot-iss4xx-mpic)
274 277 platformo="$object/treeboot-iss4xx.o"
275 278 ;;
arch/powerpc/configs/44x/akebono_defconfig
Diff comments   View file @ 2a2c74b
  1 +CONFIG_44x=y
  2 +CONFIG_SMP=y
  3 +CONFIG_SYSVIPC=y
  4 +CONFIG_POSIX_MQUEUE=y
  5 +CONFIG_LOG_BUF_SHIFT=14
  6 +CONFIG_BLK_DEV_INITRD=y
  7 +CONFIG_RD_BZIP2=y
  8 +CONFIG_RD_LZMA=y
  9 +CONFIG_RD_XZ=y
  10 +CONFIG_EXPERT=y
  11 +CONFIG_KALLSYMS_ALL=y
  12 +# CONFIG_SLUB_CPU_PARTIAL is not set
  13 +CONFIG_PROFILING=y
  14 +CONFIG_OPROFILE=y
  15 +CONFIG_MODULES=y
  16 +CONFIG_MODULE_UNLOAD=y
  17 +# CONFIG_BLK_DEV_BSG is not set
  18 +# CONFIG_POWERNV_MSI is not set
  19 +CONFIG_PPC_47x=y
  20 +# CONFIG_EBONY is not set
  21 +CONFIG_AKEBONO=y
  22 +CONFIG_HIGHMEM=y
  23 +CONFIG_HZ_100=y
  24 +CONFIG_IRQ_ALL_CPUS=y
  25 +# CONFIG_COMPACTION is not set
  26 +CONFIG_CMDLINE_BOOL=y
  27 +CONFIG_CMDLINE=""
  28 +# CONFIG_SUSPEND is not set
  29 +CONFIG_PCI_MSI=y
  30 +CONFIG_NET=y
  31 +CONFIG_PACKET=y
  32 +CONFIG_UNIX=y
  33 +CONFIG_INET=y
  34 +CONFIG_IP_PNP=y
  35 +CONFIG_IP_PNP_DHCP=y
  36 +CONFIG_IP_PNP_BOOTP=y
  37 +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
  38 +# CONFIG_INET_XFRM_MODE_TUNNEL is not set
  39 +# CONFIG_INET_XFRM_MODE_BEET is not set
  40 +# CONFIG_INET_LRO is not set
  41 +# CONFIG_IPV6 is not set
  42 +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  43 +CONFIG_DEVTMPFS=y
  44 +CONFIG_DEVTMPFS_MOUNT=y
  45 +CONFIG_CONNECTOR=y
  46 +CONFIG_MTD=y
  47 +CONFIG_MTD_BLOCK=y
  48 +CONFIG_MTD_JEDECPROBE=y
  49 +CONFIG_MTD_CFI_AMDSTD=y
  50 +CONFIG_MTD_PHYSMAP_OF=y
  51 +CONFIG_PROC_DEVICETREE=y
  52 +CONFIG_BLK_DEV_RAM=y
  53 +CONFIG_BLK_DEV_RAM_SIZE=35000
  54 +# CONFIG_SCSI_PROC_FS is not set
  55 +CONFIG_BLK_DEV_SD=y
  56 +# CONFIG_SCSI_LOWLEVEL is not set
  57 +# CONFIG_SATA_PMP is not set
  58 +# CONFIG_ATA_SFF is not set
  59 +# CONFIG_NET_VENDOR_3COM is not set
  60 +# CONFIG_NET_VENDOR_ADAPTEC is not set
  61 +# CONFIG_NET_VENDOR_ALTEON is not set
  62 +# CONFIG_NET_VENDOR_AMD is not set
  63 +# CONFIG_NET_VENDOR_ARC is not set
  64 +# CONFIG_NET_VENDOR_ATHEROS is not set
  65 +# CONFIG_NET_CADENCE is not set
  66 +# CONFIG_NET_VENDOR_BROADCOM is not set
  67 +# CONFIG_NET_VENDOR_BROCADE is not set
  68 +# CONFIG_NET_VENDOR_CHELSIO is not set
  69 +# CONFIG_NET_VENDOR_CISCO is not set
  70 +# CONFIG_NET_VENDOR_DEC is not set
  71 +# CONFIG_NET_VENDOR_DLINK is not set
  72 +# CONFIG_NET_VENDOR_EMULEX is not set
  73 +# CONFIG_NET_VENDOR_EXAR is not set
  74 +# CONFIG_NET_VENDOR_HP is not set
  75 +CONFIG_IBM_EMAC=y
  76 +# CONFIG_NET_VENDOR_MARVELL is not set
  77 +# CONFIG_NET_VENDOR_MELLANOX is not set
  78 +# CONFIG_NET_VENDOR_MICREL is not set
  79 +# CONFIG_NET_VENDOR_MYRI is not set
  80 +# CONFIG_NET_VENDOR_NATSEMI is not set
  81 +# CONFIG_NET_VENDOR_NVIDIA is not set
  82 +# CONFIG_NET_VENDOR_OKI is not set
  83 +# CONFIG_NET_VENDOR_QLOGIC is not set
  84 +# CONFIG_NET_VENDOR_REALTEK is not set
  85 +# CONFIG_NET_VENDOR_RDC is not set
  86 +# CONFIG_NET_VENDOR_SEEQ is not set
  87 +# CONFIG_NET_VENDOR_SILAN is not set
  88 +# CONFIG_NET_VENDOR_SIS is not set
  89 +# CONFIG_NET_VENDOR_SMSC is not set
  90 +# CONFIG_NET_VENDOR_STMICRO is not set
  91 +# CONFIG_NET_VENDOR_SUN is not set
  92 +# CONFIG_NET_VENDOR_TEHUTI is not set
  93 +# CONFIG_NET_VENDOR_TI is not set
  94 +# CONFIG_NET_VENDOR_VIA is not set
  95 +# CONFIG_NET_VENDOR_WIZNET is not set
  96 +# CONFIG_NET_VENDOR_XILINX is not set
  97 +# CONFIG_KEYBOARD_ATKBD is not set
  98 +# CONFIG_MOUSE_PS2 is not set
  99 +# CONFIG_SERIO is not set
  100 +# CONFIG_VT is not set
  101 +CONFIG_SERIAL_8250=y
  102 +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
  103 +CONFIG_SERIAL_8250_CONSOLE=y
  104 +CONFIG_SERIAL_8250_EXTENDED=y
  105 +CONFIG_SERIAL_8250_SHARE_IRQ=y
  106 +CONFIG_SERIAL_OF_PLATFORM=y
  107 +# CONFIG_HW_RANDOM is not set
  108 +CONFIG_I2C_CHARDEV=y
  109 +# CONFIG_HWMON is not set
  110 +CONFIG_THERMAL=y
  111 +# CONFIG_USB_DEFAULT_PERSIST is not set
  112 +CONFIG_USB_EHCI_HCD=y
  113 +CONFIG_USB_OHCI_HCD=y
  114 +# CONFIG_USB_OHCI_HCD_PCI is not set
  115 +CONFIG_USB_STORAGE=y
  116 +CONFIG_MMC=y
  117 +CONFIG_RTC_CLASS=y
  118 +CONFIG_RTC_DRV_M41T80=y
  119 +CONFIG_EXT2_FS=y
  120 +CONFIG_EXT3_FS=y
  121 +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
  122 +CONFIG_EXT3_FS_POSIX_ACL=y
  123 +CONFIG_EXT3_FS_SECURITY=y
  124 +# CONFIG_DNOTIFY is not set
  125 +# CONFIG_INOTIFY_USER is not set
  126 +CONFIG_VFAT_FS=y
  127 +CONFIG_PROC_KCORE=y
  128 +CONFIG_TMPFS=y
  129 +CONFIG_CRAMFS=y
  130 +# CONFIG_NETWORK_FILESYSTEMS is not set
  131 +CONFIG_NLS_DEFAULT="n"
  132 +CONFIG_NLS_CODEPAGE_437=y
  133 +CONFIG_NLS_ISO8859_1=y
  134 +CONFIG_DEBUG_INFO=y
  135 +CONFIG_DEBUG_FS=y
  136 +CONFIG_MAGIC_SYSRQ=y
  137 +CONFIG_DETECT_HUNG_TASK=y
  138 +CONFIG_XMON=y
  139 +CONFIG_XMON_DEFAULT=y
  140 +CONFIG_PPC_EARLY_DEBUG=y
  141 +CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0x00010000
  142 +CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x33f
  143 +CONFIG_CRYPTO_PCBC=y
  144 +CONFIG_CRYPTO_MD5=y
  145 +CONFIG_CRYPTO_SHA1_PPC=y
  146 +CONFIG_CRYPTO_DES=y
  147 +# CONFIG_CRYPTO_ANSI_CPRNG is not set
  148 +# CONFIG_CRYPTO_HW is not set
arch/powerpc/platforms/44x/Kconfig
Diff comments   View file @ 2a2c74b
... ... @@ -199,6 +199,32 @@
199 199 help
200 200 This option enables support for the IBM Currituck (476fpe) evaluation board
201 201  
  202 +config AKEBONO
  203 + bool "IBM Akebono (476gtr) Support"
  204 + depends on PPC_47x
  205 + default n
  206 + select SWIOTLB
  207 + select 476FPE
  208 + select PPC4xx_PCI_EXPRESS
  209 + select I2C
  210 + select I2C_IBM_IIC
  211 + select NETDEVICES
  212 + select ETHERNET
  213 + select NET_VENDOR_IBM
  214 + select IBM_EMAC_EMAC4
  215 + select IBM_EMAC_RGMII_WOL
  216 + select USB
  217 + select USB_OHCI_HCD_PLATFORM
  218 + select USB_EHCI_HCD_PLATFORM
  219 + select MMC_SDHCI
  220 + select MMC_SDHCI_PLTFM
  221 + select MMC_SDHCI_OF_476GTR
  222 + select ATA
  223 + select SATA_AHCI_PLATFORM
  224 + help
  225 + This option enables support for the IBM Akebono (476gtr) evaluation board
  226 +
  227 +
202 228 config ICON
203 229 bool "Icon"
204 230 depends on 44x
arch/powerpc/platforms/44x/Makefile
Diff comments   View file @ 2a2c74b
... ... @@ -11,4 +11,5 @@
11 11 obj-$(CONFIG_ISS4xx) += iss4xx.o
12 12 obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
13 13 obj-$(CONFIG_CURRITUCK) += ppc476.o
  14 +obj-$(CONFIG_AKEBONO) += ppc476.o
arch/powerpc/platforms/44x/ppc476.c
Diff comments   View file @ 2a2c74b
1 1 /*
2 2 * PowerPC 476FPE board specific routines
3 3 *
4   - * Copyright ยฉ 2011 Tony Breeds IBM Corporation
  4 + * Copyright ยฉ 2013 Tony Breeds IBM Corporation
  5 + * Copyright ยฉ 2013 Alistair Popple IBM Corporation
5 6 *
6 7 * Based on earlier code:
7 8 * Matt Porter <mporter@kernel.crashing.org>
... ... @@ -35,6 +36,7 @@
35 36 #include <asm/mmu.h>
36 37  
37 38 #include <linux/pci.h>
  39 +#include <linux/i2c.h>
38 40  
39 41 static struct of_device_id ppc47x_of_bus[] __initdata = {
40 42 { .compatible = "ibm,plb4", },
41 43  
42 44  
... ... @@ -55,15 +57,69 @@
55 57 }
56 58 DECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup);
57 59  
  60 +/* Akebono has an AVR microcontroller attached to the I2C bus
  61 + * which is used to power off/reset the system. */
  62 +
  63 +/* AVR I2C Commands */
  64 +#define AVR_PWRCTL_CMD (0x26)
  65 +
  66 +/* Flags for the power control I2C commands */
  67 +#define AVR_PWRCTL_PWROFF (0x01)
  68 +#define AVR_PWRCTL_RESET (0x02)
  69 +
  70 +static struct i2c_client *avr_i2c_client;
  71 +static void avr_halt_system(int pwrctl_flags)
  72 +{
  73 + /* Request the AVR to reset the system */
  74 + i2c_smbus_write_byte_data(avr_i2c_client,
  75 + AVR_PWRCTL_CMD, pwrctl_flags);
  76 +
  77 + /* Wait for system to be reset */
  78 + while (1)
  79 + ;
  80 +}
  81 +
  82 +static void avr_power_off_system(void)
  83 +{
  84 + avr_halt_system(AVR_PWRCTL_PWROFF);
  85 +}
  86 +
  87 +static void avr_reset_system(char *cmd)
  88 +{
  89 + avr_halt_system(AVR_PWRCTL_RESET);
  90 +}
  91 +
  92 +static int avr_probe(struct i2c_client *client,
  93 + const struct i2c_device_id *id)
  94 +{
  95 + avr_i2c_client = client;
  96 + ppc_md.restart = avr_reset_system;
  97 + ppc_md.power_off = avr_power_off_system;
  98 + return 0;
  99 +}
  100 +
  101 +static const struct i2c_device_id avr_id[] = {
  102 + { "akebono-avr", 0 },
  103 + { }
  104 +};
  105 +
  106 +static struct i2c_driver avr_driver = {
  107 + .driver = {
  108 + .name = "akebono-avr",
  109 + },
  110 + .probe = avr_probe,
  111 + .id_table = avr_id,
  112 +};
  113 +
58 114 static int __init ppc47x_device_probe(void)
59 115 {
  116 + i2c_add_driver(&avr_driver);
60 117 of_platform_bus_probe(NULL, ppc47x_of_bus, NULL);
61 118  
62 119 return 0;
63 120 }
64 121 machine_device_initcall(ppc47x, ppc47x_device_probe);
65 122  
66   -/* We can have either UICs or MPICs */
67 123 static void __init ppc47x_init_irq(void)
68 124 {
69 125 struct device_node *np;
70 126  
71 127  
72 128  
73 129  
... ... @@ -163,37 +219,30 @@
163 219 ppc47x_smp_init();
164 220 }
165 221  
166   -/*
167   - * Called very early, MMU is off, device-tree isn't unflattened
168   - */
169   -static int __init ppc47x_probe(void)
170   -{
171   - unsigned long root = of_get_flat_dt_root();
172   -
173   - if (!of_flat_dt_is_compatible(root, "ibm,currituck"))
174   - return 0;
175   -
176   - return 1;
177   -}
178   -
179 222 static int board_rev = -1;
180 223 static int __init ppc47x_get_board_rev(void)
181 224 {
182   - u8 fpga_reg0;
183   - void *fpga;
184   - struct device_node *np;
  225 + int reg;
  226 + u8 *fpga;
  227 + struct device_node *np = NULL;
185 228  
186   - np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga");
  229 + if (of_machine_is_compatible("ibm,currituck")) {
  230 + np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga");
  231 + reg = 0;
  232 + } else if (of_machine_is_compatible("ibm,akebono")) {
  233 + np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga");
  234 + reg = 2;
  235 + }
  236 +
187 237 if (!np)
188 238 goto fail;
189 239  
190   - fpga = of_iomap(np, 0);
  240 + fpga = (u8 *) of_iomap(np, 0);
191 241 of_node_put(np);
192 242 if (!fpga)
193 243 goto fail;
194 244  
195   - fpga_reg0 = ioread8(fpga);
196   - board_rev = fpga_reg0 & 0x03;
  245 + board_rev = ioread8(fpga + reg) & 0x03;
197 246 pr_info("%s: Found board revision %d\n", __func__, board_rev);
198 247 iounmap(fpga);
199 248 return 0;
200 249  
... ... @@ -221,13 +270,30 @@
221 270 }
222 271 }
223 272  
  273 +/*
  274 + * Called very early, MMU is off, device-tree isn't unflattened
  275 + */
  276 +static int __init ppc47x_probe(void)
  277 +{
  278 + unsigned long root = of_get_flat_dt_root();
  279 +
  280 + if (of_flat_dt_is_compatible(root, "ibm,akebono"))
  281 + return 1;
  282 +
  283 + if (of_flat_dt_is_compatible(root, "ibm,currituck")) {
  284 + ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup;
  285 + return 1;
  286 + }
  287 +
  288 + return 0;
  289 +}
  290 +
224 291 define_machine(ppc47x) {
225 292 .name = "PowerPC 47x",
226 293 .probe = ppc47x_probe,
227 294 .progress = udbg_progress,
228 295 .init_IRQ = ppc47x_init_irq,
229 296 .setup_arch = ppc47x_setup_arch,
230   - .pci_irq_fixup = ppc47x_pci_irq_fixup,
231 297 .restart = ppc4xx_reset_system,
232 298 .calibrate_decr = generic_calibrate_decr,
233 299 };
arch/powerpc/sysdev/ppc4xx_pci.c
Diff comments   View file @ 2a2c74b
... ... @@ -1440,7 +1440,8 @@
1440 1440 ppc4xx_pciex_hwops = &ppc405ex_pcie_hwops;
1441 1441 #endif
1442 1442 #ifdef CONFIG_476FPE
1443   - if (of_device_is_compatible(np, "ibm,plb-pciex-476fpe"))
  1443 + if (of_device_is_compatible(np, "ibm,plb-pciex-476fpe")
  1444 + || of_device_is_compatible(np, "ibm,plb-pciex-476gtr"))
1444 1445 ppc4xx_pciex_hwops = &ppc_476fpe_pcie_hwops;
1445 1446 #endif
1446 1447 if (ppc4xx_pciex_hwops == NULL) {
... ... @@ -1751,7 +1752,10 @@
1751 1752 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1752 1753 sa | DCRO_PEGPL_460SX_OMR1MSKL_UOT
1753 1754 | DCRO_PEGPL_OMRxMSKL_VAL);
1754   - else if (of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
  1755 + else if (of_device_is_compatible(
  1756 + port->node, "ibm,plb-pciex-476fpe") ||
  1757 + of_device_is_compatible(
  1758 + port->node, "ibm,plb-pciex-476gtr"))
1755 1759 dcr_write(port->dcrs, DCRO_PEGPL_OMR1MSKL,
1756 1760 sa | DCRO_PEGPL_476FPE_OMR1MSKL_UOT
1757 1761 | DCRO_PEGPL_OMRxMSKL_VAL);
... ... @@ -1881,7 +1885,10 @@
1881 1885 sa |= PCI_BASE_ADDRESS_MEM_PREFETCH;
1882 1886  
1883 1887 if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx") ||
1884   - of_device_is_compatible(port->node, "ibm,plb-pciex-476fpe"))
  1888 + of_device_is_compatible(
  1889 + port->node, "ibm,plb-pciex-476fpe") ||
  1890 + of_device_is_compatible(
  1891 + port->node, "ibm,plb-pciex-476gtr"))
1885 1892 sa |= PCI_BASE_ADDRESS_MEM_TYPE_64;
1886 1893  
1887 1894 out_le32(mbase + PECFG_BAR0HMPA, RES_TO_U32_HIGH(sa));