Commit 615b994e64ac42c9ce0c76f88fc3b716e1a1ba23
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
Merge tag 'armsoc-for-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann: "Not much interesting going on fixes-wise for us this week, as it should be for an -rc7. I'm not expecting Olof to work much over Thanksgiving weekend, so I decided to take over again and push these out to you. Just four simple fixes this week: - one missing of_node_put() on armv7 based mvebu - forcing the USB host into the right mode on Chromebook (exynos5-snow) - enabling two important drivers for exynos_defconfig - fixing a noncritical bug for tegra that would cause a regression with common code patches queued for 3.19" * tag 'armsoc-for-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: irq: fix buggy usage of irq_data irq field ARM: exynos_defconfig: Enable max77802 rtc and clock drivers ARM: dts: Explicitly set dr_mode on exynos5250-snow ARM: mvebu: add missing of_node_put() call in coherency.c
Showing 5 changed files Side-by-side Diff
arch/arm/boot/dts/exynos5250-snow.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/configs/exynos_defconfig
... | ... | @@ -142,11 +142,13 @@ |
142 | 142 | CONFIG_MMC_DW_EXYNOS=y |
143 | 143 | CONFIG_RTC_CLASS=y |
144 | 144 | CONFIG_RTC_DRV_MAX77686=y |
145 | +CONFIG_RTC_DRV_MAX77802=y | |
145 | 146 | CONFIG_RTC_DRV_S5M=y |
146 | 147 | CONFIG_RTC_DRV_S3C=y |
147 | 148 | CONFIG_DMADEVICES=y |
148 | 149 | CONFIG_PL330_DMA=y |
149 | 150 | CONFIG_COMMON_CLK_MAX77686=y |
151 | +CONFIG_COMMON_CLK_MAX77802=y | |
150 | 152 | CONFIG_COMMON_CLK_S2MPS11=y |
151 | 153 | CONFIG_EXYNOS_IOMMU=y |
152 | 154 | CONFIG_IIO=y |
arch/arm/mach-mvebu/coherency.c
arch/arm/mach-tegra/irq.c
... | ... | @@ -99,42 +99,42 @@ |
99 | 99 | |
100 | 100 | static void tegra_mask(struct irq_data *d) |
101 | 101 | { |
102 | - if (d->irq < FIRST_LEGACY_IRQ) | |
102 | + if (d->hwirq < FIRST_LEGACY_IRQ) | |
103 | 103 | return; |
104 | 104 | |
105 | - tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_CLR); | |
105 | + tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_CLR); | |
106 | 106 | } |
107 | 107 | |
108 | 108 | static void tegra_unmask(struct irq_data *d) |
109 | 109 | { |
110 | - if (d->irq < FIRST_LEGACY_IRQ) | |
110 | + if (d->hwirq < FIRST_LEGACY_IRQ) | |
111 | 111 | return; |
112 | 112 | |
113 | - tegra_irq_write_mask(d->irq, ICTLR_CPU_IER_SET); | |
113 | + tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IER_SET); | |
114 | 114 | } |
115 | 115 | |
116 | 116 | static void tegra_ack(struct irq_data *d) |
117 | 117 | { |
118 | - if (d->irq < FIRST_LEGACY_IRQ) | |
118 | + if (d->hwirq < FIRST_LEGACY_IRQ) | |
119 | 119 | return; |
120 | 120 | |
121 | - tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR); | |
121 | + tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR); | |
122 | 122 | } |
123 | 123 | |
124 | 124 | static void tegra_eoi(struct irq_data *d) |
125 | 125 | { |
126 | - if (d->irq < FIRST_LEGACY_IRQ) | |
126 | + if (d->hwirq < FIRST_LEGACY_IRQ) | |
127 | 127 | return; |
128 | 128 | |
129 | - tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_CLR); | |
129 | + tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_CLR); | |
130 | 130 | } |
131 | 131 | |
132 | 132 | static int tegra_retrigger(struct irq_data *d) |
133 | 133 | { |
134 | - if (d->irq < FIRST_LEGACY_IRQ) | |
134 | + if (d->hwirq < FIRST_LEGACY_IRQ) | |
135 | 135 | return 0; |
136 | 136 | |
137 | - tegra_irq_write_mask(d->irq, ICTLR_CPU_IEP_FIR_SET); | |
137 | + tegra_irq_write_mask(d->hwirq, ICTLR_CPU_IEP_FIR_SET); | |
138 | 138 | |
139 | 139 | return 1; |
140 | 140 | } |
... | ... | @@ -142,7 +142,7 @@ |
142 | 142 | #ifdef CONFIG_PM_SLEEP |
143 | 143 | static int tegra_set_wake(struct irq_data *d, unsigned int enable) |
144 | 144 | { |
145 | - u32 irq = d->irq; | |
145 | + u32 irq = d->hwirq; | |
146 | 146 | u32 index, mask; |
147 | 147 | |
148 | 148 | if (irq < FIRST_LEGACY_IRQ || |