Commit 81ef447950bf0955aca46f4a7617d8ce435cf0ce
Committed by
Shawn Guo
1 parent
b2faf1a1af
Exists in
ti-lsk-linux-4.1.y
and in
10 other branches
ARM: clk-imx6q: fix video divider for rev T0 1.0
The post dividers do not work on i.MX6Q rev T0 1.0 so they must be fixed to 1. As the table index was wrong, a divider a of 4 could still be requested which implied the clock not to be set properly. This is the root cause of the HDMI not working at high resolution on rev T0 1.0 of the SoC. Signed-off-by: Gary Bisson <bisson.gary@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
arch/arm/mach-imx/clk-imx6q.c
... | ... | @@ -144,7 +144,7 @@ |
144 | 144 | post_div_table[1].div = 1; |
145 | 145 | post_div_table[2].div = 1; |
146 | 146 | video_div_table[1].div = 1; |
147 | - video_div_table[2].div = 1; | |
147 | + video_div_table[3].div = 1; | |
148 | 148 | } |
149 | 149 | |
150 | 150 | clk[IMX6QDL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 2, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels)); |