Eric Lee / smarc-ti-linux-kernel

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Commit 9e9a928eed8796a0a1aaed7e0b676db86ba84594

Authored by Linus Torvalds
2 parents d2cfd31050 0a4ae727d6
Exists in ti-lsk-linux-4.1.y and in 12 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-linux-3.15.y, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04, ti-linux-3.15.y

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux 

Pull drm fixes from Dave Airlie:
 "All fairly small: radeon stability and a panic path fix.

  Mostly radeon fixes, suspend/resume fix, stability on the CIK
  chipsets, along with a locking check avoidance patch for panic times
  regression"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
  drm/radeon: use the CP DMA on CIK
  drm/radeon: sync page table updates
  drm/radeon: fix vm buffer size estimation
  drm/crtc-helper: skip locking checks in panicking path
  drm/radeon/dpm: resume fixes for some systems

Showing 6 changed files Side-by-side Diff

drivers/gpu/drm/drm_crtc_helper.c
Diff comments   View file @ 9e9a928
... ... @@ -29,6 +29,7 @@
29 29 * Jesse Barnes <jesse.barnes@intel.com>
30 30 */
31 31  
  32 +#include <linux/kernel.h>
32 33 #include <linux/export.h>
33 34 #include <linux/moduleparam.h>
34 35  
... ... @@ -88,7 +89,13 @@
88 89 struct drm_connector *connector;
89 90 struct drm_device *dev = encoder->dev;
90 91  
91   - WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
  92 + /*
  93 + * We can expect this mutex to be locked if we are not panicking.
  94 + * Locking is currently fubar in the panic handler.
  95 + */
  96 + if (!oops_in_progress)
  97 + WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
  98 +
92 99 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
93 100 if (connector->encoder == encoder)
94 101 return true;
... ... @@ -112,7 +119,13 @@
112 119 struct drm_encoder *encoder;
113 120 struct drm_device *dev = crtc->dev;
114 121  
115   - WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
  122 + /*
  123 + * We can expect this mutex to be locked if we are not panicking.
  124 + * Locking is currently fubar in the panic handler.
  125 + */
  126 + if (!oops_in_progress)
  127 + WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
  128 +
116 129 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
117 130 if (encoder->crtc == crtc && drm_helper_encoder_in_use(encoder))
118 131 return true;
drivers/gpu/drm/radeon/atombios_crtc.c
Diff comments   View file @ 9e9a928
... ... @@ -270,8 +270,6 @@
270 270 switch (mode) {
271 271 case DRM_MODE_DPMS_ON:
272 272 radeon_crtc->enabled = true;
273   - /* adjust pm to dpms changes BEFORE enabling crtcs */
274   - radeon_pm_compute_clocks(rdev);
275 273 atombios_enable_crtc(crtc, ATOM_ENABLE);
276 274 if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))
277 275 atombios_enable_crtc_memreq(crtc, ATOM_ENABLE);
278 276  
... ... @@ -289,10 +287,10 @@
289 287 atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);
290 288 atombios_enable_crtc(crtc, ATOM_DISABLE);
291 289 radeon_crtc->enabled = false;
292   - /* adjust pm to dpms changes AFTER disabling crtcs */
293   - radeon_pm_compute_clocks(rdev);
294 290 break;
295 291 }
  292 + /* adjust pm to dpms */
  293 + radeon_pm_compute_clocks(rdev);
296 294 }
297 295  
298 296 static void
drivers/gpu/drm/radeon/radeon_asic.c
Diff comments   View file @ 9e9a928
... ... @@ -2049,8 +2049,8 @@
2049 2049 .blit_ring_index = RADEON_RING_TYPE_GFX_INDEX,
2050 2050 .dma = &cik_copy_dma,
2051 2051 .dma_ring_index = R600_RING_TYPE_DMA_INDEX,
2052   - .copy = &cik_copy_dma,
2053   - .copy_ring_index = R600_RING_TYPE_DMA_INDEX,
  2052 + .copy = &cik_copy_cpdma,
  2053 + .copy_ring_index = RADEON_RING_TYPE_GFX_INDEX,
2054 2054 },
2055 2055 .surface = {
2056 2056 .set_reg = r600_set_surface_reg,
drivers/gpu/drm/radeon/radeon_device.c
Diff comments   View file @ 9e9a928
... ... @@ -1558,6 +1558,10 @@
1558 1558  
1559 1559 drm_kms_helper_poll_enable(dev);
1560 1560  
  1561 + /* set the power state here in case we are a PX system or headless */
  1562 + if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled)
  1563 + radeon_pm_compute_clocks(rdev);
  1564 +
1561 1565 if (fbcon) {
1562 1566 radeon_fbdev_set_suspend(rdev, 0);
1563 1567 console_unlock();
drivers/gpu/drm/radeon/radeon_pm.c
Diff comments   View file @ 9e9a928
... ... @@ -1104,7 +1104,6 @@
1104 1104 if (ret)
1105 1105 goto dpm_resume_fail;
1106 1106 rdev->pm.dpm_enabled = true;
1107   - radeon_pm_compute_clocks(rdev);
1108 1107 return;
1109 1108  
1110 1109 dpm_resume_fail:
drivers/gpu/drm/radeon/radeon_vm.c
Diff comments   View file @ 9e9a928
... ... @@ -132,7 +132,7 @@
132 132 struct radeon_cs_reloc *list;
133 133 unsigned i, idx;
134 134  
135   - list = kmalloc_array(vm->max_pde_used + 1,
  135 + list = kmalloc_array(vm->max_pde_used + 2,
136 136 sizeof(struct radeon_cs_reloc), GFP_KERNEL);
137 137 if (!list)
138 138 return NULL;
... ... @@ -585,7 +585,8 @@
585 585 {
586 586 static const uint32_t incr = RADEON_VM_PTE_COUNT * 8;
587 587  
588   - uint64_t pd_addr = radeon_bo_gpu_offset(vm->page_directory);
  588 + struct radeon_bo *pd = vm->page_directory;
  589 + uint64_t pd_addr = radeon_bo_gpu_offset(pd);
589 590 uint64_t last_pde = ~0, last_pt = ~0;
590 591 unsigned count = 0, pt_idx, ndw;
591 592 struct radeon_ib ib;
... ... @@ -642,6 +643,7 @@
642 643 incr, R600_PTE_VALID);
643 644  
644 645 if (ib.length_dw != 0) {
  646 + radeon_semaphore_sync_to(ib.semaphore, pd->tbo.sync_obj);
645 647 radeon_semaphore_sync_to(ib.semaphore, vm->last_id_use);
646 648 r = radeon_ib_schedule(rdev, &ib, NULL);
647 649 if (r) {
648 650  
649 651  
... ... @@ -689,15 +691,18 @@
689 691 /* walk over the address space and update the page tables */
690 692 for (addr = start; addr < end; ) {
691 693 uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE;
  694 + struct radeon_bo *pt = vm->page_tables[pt_idx].bo;
692 695 unsigned nptes;
693 696 uint64_t pte;
694 697  
  698 + radeon_semaphore_sync_to(ib->semaphore, pt->tbo.sync_obj);
  699 +
695 700 if ((addr & ~mask) == (end & ~mask))
696 701 nptes = end - addr;
697 702 else
698 703 nptes = RADEON_VM_PTE_COUNT - (addr & mask);
699 704  
700   - pte = radeon_bo_gpu_offset(vm->page_tables[pt_idx].bo);
  705 + pte = radeon_bo_gpu_offset(pt);
701 706 pte += (addr & mask) * 8;
702 707  
703 708 if ((last_pte + 8 * count) != pte) {