Commit c0e00b5c31e2392cdfdfefeb3cd3e3918dc2bef2
Exists in
smarct4x-processor-sdk-linux-02.00.01
and in
3 other branches
Merge branch 'ti-linux-4.1.y' of git.ti.com:ti-linux-kernel/ti-linux-kernel into ti-lsk-linux-4.1.y
TI-Feature: ti_linux_base_lsk TI-Tree: git@git.ti.com:ti-linux-kernel/ti-linux-kernel.git TI-Branch: ti-linux-4.1.y * 'ti-linux-4.1.y' of git.ti.com:ti-linux-kernel/ti-linux-kernel: mmc: host: omap_hsmmc: increase the timeout value given for sw timeout mmc: host: omap_hsmmc: Fix software timeout handling mmc: host: omap_hsmmc: disable irq while handling soft timeout ASoC: davinci-mcasp: Fix master capture only mode ASoC: davinci-mcasp: Fix TDM slot rx/tx mask associations ARM: DTS: am57xx-idk-lcd-osd: Add support for capacitive touch controller Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
Showing 5 changed files Side-by-side Diff
arch/arm/boot/dts/am571x-idk-lcd-osd.dts
arch/arm/boot/dts/am572x-idk-lcd-osd.dts
arch/arm/boot/dts/am57xx-idk-lcd-osd.dtsi
... | ... | @@ -71,4 +71,18 @@ |
71 | 71 | status = "okay"; |
72 | 72 | }; |
73 | 73 | }; |
74 | + | |
75 | +&i2c1 { | |
76 | + touchscreen: edt-ft5506@38 { | |
77 | + status = "okay"; | |
78 | + compatible = "edt,edt-ft5506", "edt,edt-ft5x06"; | |
79 | + | |
80 | + reg = <0x38>; | |
81 | + | |
82 | + reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; | |
83 | + | |
84 | + touchscreen-size-x = <1920>; | |
85 | + touchscreen-size-y = <1200>; | |
86 | + }; | |
87 | +}; |
drivers/mmc/host/omap_hsmmc.c
... | ... | @@ -168,7 +168,6 @@ |
168 | 168 | #define ACNE (1 << 0) |
169 | 169 | |
170 | 170 | #define MMC_AUTOSUSPEND_DELAY 100 |
171 | -#define MMC_SOFT_TIMER_SLACK 1000000 /* ns */ | |
172 | 171 | #define MMC_TIMEOUT_MS 20 /* 20 mSec */ |
173 | 172 | #define MMC_TIMEOUT_US 20000 /* 20000 micro Sec */ |
174 | 173 | #define OMAP_MMC_MIN_CLOCK 400000 |
175 | 174 | |
176 | 175 | |
... | ... | @@ -1356,8 +1355,19 @@ |
1356 | 1355 | static void omap_hsmmc_soft_timeout(unsigned long data) |
1357 | 1356 | { |
1358 | 1357 | struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)data; |
1358 | + bool end_trans; | |
1359 | 1359 | |
1360 | + omap_hsmmc_disable_irq(host); | |
1361 | + if (host->data || host->response_busy) { | |
1362 | + host->response_busy = 0; | |
1363 | + end_trans = 1; | |
1364 | + } | |
1365 | + | |
1360 | 1366 | hsmmc_command_incomplete(host, -ETIMEDOUT, 0); |
1367 | + if (end_trans && host->mrq) | |
1368 | + omap_hsmmc_xfer_done(host, host->data); | |
1369 | + else if (host->cmd) | |
1370 | + omap_hsmmc_cmd_done(host, host->cmd); | |
1361 | 1371 | } |
1362 | 1372 | |
1363 | 1373 | static void set_sd_bus_power(struct omap_hsmmc_host *host) |
1364 | 1374 | |
... | ... | @@ -1609,12 +1619,16 @@ |
1609 | 1619 | |
1610 | 1620 | /* |
1611 | 1621 | * We should really be using just timeout_ns + delta, |
1612 | - * however we have no control over when DMA will | |
1613 | - * actually start transferring; due to that we will add | |
1614 | - * an extra slack to make sure we don't expire too | |
1615 | - * early. | |
1622 | + * however during the experiments observed that the transfer | |
1623 | + * complete happens after really long time (roughly 3 times | |
1624 | + * of the advertised timeout value). With the eMMC card in | |
1625 | + * DRA72 EVM, the card advertised 960ms but the (worst case) | |
1626 | + * transfer complete came after 2.6 seconds. | |
1616 | 1627 | */ |
1617 | - host->data_timeout = timeout_ns + delta + MMC_SOFT_TIMER_SLACK; | |
1628 | + host->data_timeout = 3 * (timeout_ns + delta); | |
1629 | + if (host->data_timeout < MMC_TIMEOUT_MS) | |
1630 | + host->data_timeout = MMC_TIMEOUT_MS; | |
1631 | + | |
1618 | 1632 | return; |
1619 | 1633 | } |
1620 | 1634 |
sound/soc/davinci/davinci-mcasp.c
... | ... | @@ -679,8 +679,8 @@ |
679 | 679 | } |
680 | 680 | |
681 | 681 | mcasp->tdm_slots = slots; |
682 | - mcasp->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = rx_mask; | |
683 | - mcasp->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = tx_mask; | |
682 | + mcasp->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = tx_mask; | |
683 | + mcasp->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = rx_mask; | |
684 | 684 | mcasp->slot_width = slot_width; |
685 | 685 | |
686 | 686 | return davinci_mcasp_set_ch_constraints(mcasp); |
... | ... | @@ -912,6 +912,14 @@ |
912 | 912 | mcasp_set_bits(mcasp, DAVINCI_MCASP_RXFMT_REG, busel | RXORD); |
913 | 913 | mcasp_mod_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, |
914 | 914 | FSRMOD(total_slots), FSRMOD(0x1FF)); |
915 | + /* | |
916 | + * If McASP is set to be TX/RX synchronous and the playback is | |
917 | + * not running already we need to configure the TX slots in | |
918 | + * order to have correct FSX on the bus | |
919 | + */ | |
920 | + if (mcasp_is_synchronous(mcasp) && !mcasp->channels) | |
921 | + mcasp_mod_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, | |
922 | + FSXMOD(total_slots), FSXMOD(0x1FF)); | |
915 | 923 | } |
916 | 924 | |
917 | 925 | return 0; |