Eric Lee / smarc-ti-linux-kernel

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Commit cb84c2b401d9cead5508cfed57b59b6d5feffdac

Authored by Guenter Roeck
Committed by Richard Kuo
1 parent b2776bf714
Exists in ti-lsk-linux-4.1.y and in 10 other branches dlt-processor-sdk-linux-03.00.00.04, processor-sdk-linux-02.00.01, smarc-ti-lsk-linux-4.1.y, smarct3x-processor-sdk-04.01.00.06, smarct3x-processor-sdk-linux-02.00.01, smarct3x-processor-sdk-linux-03.00.00.04, smarct4x-800-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-04.01.00.06, smarct4x-processor-sdk-linux-02.00.01, smarct4x-processor-sdk-linux-03.00.00.04

hexagon: Fix build failures in linux-next 

hexagon:defconfig fails to build in linux-next since commit 332fd7c4fef5
("genirq: Generic chip: Change irq_reg_{readl,writel} arguments").

The primary build failure is

arch/hexagon/include/asm/cacheflush.h: In function 'copy_to_user_page':
arch/hexagon/include/asm/cacheflush.h:89:22: error: 'VM_EXEC' undeclared

This is the result of including of <linux/io.h> from <linux/irq.h>,
which is now necessary due to the use of readl and writel from irq.h.
This causes recursive inclusions in hexagon code; cacheflush.h is included
from mm.h prior to the definition of VM_EXEC.

Fix the problem by moving copy_to_user_page from the hexagon include file to
arch/hexagon/mm/cache.c, similar to other architectures. After this change,
several redefinitions of readl and writel are reported. Those are caused
by recursive inclusions of io.h and asm/cacheflush.h. Fix those problems by
reducing the number of files included from those files. Also, it was necessary
to stop including asm-generic/cacheflush.h from asm/cacheflush.h. Instead,
functionality originally provided by asm-generic/cacheflush.h is now coded
in asm/cacheflush.h directly.

Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
signed-off-by: Richard Kuo <rkuo@codeaurora.org>

Showing 5 changed files with 31 additions and 22 deletions Side-by-side Diff

arch/hexagon/include/asm/cacheflush.h
Diff comments   View file @ cb84c2b
... ... @@ -21,10 +21,7 @@
21 21 #ifndef _ASM_CACHEFLUSH_H
22 22 #define _ASM_CACHEFLUSH_H
23 23  
24   -#include <linux/cache.h>
25   -#include <linux/mm.h>
26   -#include <asm/string.h>
27   -#include <asm-generic/cacheflush.h>
  24 +#include <linux/mm_types.h>
28 25  
29 26 /* Cache flushing:
30 27 *
... ... @@ -41,6 +38,20 @@
41 38 #define LINESIZE 32
42 39 #define LINEBITS 5
43 40  
  41 +#define flush_cache_all() do { } while (0)
  42 +#define flush_cache_mm(mm) do { } while (0)
  43 +#define flush_cache_dup_mm(mm) do { } while (0)
  44 +#define flush_cache_range(vma, start, end) do { } while (0)
  45 +#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
  46 +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0
  47 +#define flush_dcache_page(page) do { } while (0)
  48 +#define flush_dcache_mmap_lock(mapping) do { } while (0)
  49 +#define flush_dcache_mmap_unlock(mapping) do { } while (0)
  50 +#define flush_icache_page(vma, pg) do { } while (0)
  51 +#define flush_icache_user_range(vma, pg, adr, len) do { } while (0)
  52 +#define flush_cache_vmap(start, end) do { } while (0)
  53 +#define flush_cache_vunmap(start, end) do { } while (0)
  54 +
44 55 /*
45 56 * Flush Dcache range through current map.
46 57 */
... ... @@ -49,7 +60,6 @@
49 60 /*
50 61 * Flush Icache range through current map.
51 62 */
52   -#undef flush_icache_range
53 63 extern void flush_icache_range(unsigned long start, unsigned long end);
54 64  
55 65 /*
56 66  
... ... @@ -79,19 +89,11 @@
79 89 /* generic_ptrace_pokedata doesn't wind up here, does it? */
80 90 }
81 91  
82   -#undef copy_to_user_page
83   -static inline void copy_to_user_page(struct vm_area_struct *vma,
84   - struct page *page,
85   - unsigned long vaddr,
86   - void *dst, void *src, int len)
87   -{
88   - memcpy(dst, src, len);
89   - if (vma->vm_flags & VM_EXEC) {
90   - flush_icache_range((unsigned long) dst,
91   - (unsigned long) dst + len);
92   - }
93   -}
  92 +void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  93 + unsigned long vaddr, void *dst, void *src, int len);
94 94  
  95 +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
  96 + memcpy(dst, src, len)
95 97  
96 98 extern void hexagon_inv_dcache_range(unsigned long start, unsigned long end);
97 99 extern void hexagon_clean_dcache_range(unsigned long start, unsigned long end);
arch/hexagon/include/asm/io.h
Diff comments   View file @ cb84c2b
... ... @@ -24,14 +24,9 @@
24 24 #ifdef __KERNEL__
25 25  
26 26 #include <linux/types.h>
27   -#include <linux/delay.h>
28   -#include <linux/vmalloc.h>
29   -#include <asm/string.h>
30   -#include <asm/mem-layout.h>
31 27 #include <asm/iomap.h>
32 28 #include <asm/page.h>
33 29 #include <asm/cacheflush.h>
34   -#include <asm/tlbflush.h>
35 30  
36 31 /*
37 32 * We don't have PCI yet.
arch/hexagon/kernel/setup.c
Diff comments   View file @ cb84c2b
... ... @@ -19,6 +19,7 @@
19 19 */
20 20  
21 21 #include <linux/init.h>
  22 +#include <linux/delay.h>
22 23 #include <linux/bootmem.h>
23 24 #include <linux/mmzone.h>
24 25 #include <linux/mm.h>
arch/hexagon/mm/cache.c
Diff comments   View file @ cb84c2b
... ... @@ -127,4 +127,14 @@
127 127 local_irq_restore(flags);
128 128 mb();
129 129 }
  130 +
  131 +void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
  132 + unsigned long vaddr, void *dst, void *src, int len)
  133 +{
  134 + memcpy(dst, src, len);
  135 + if (vma->vm_flags & VM_EXEC) {
  136 + flush_icache_range((unsigned long) dst,
  137 + (unsigned long) dst + len);
  138 + }
  139 +}
arch/hexagon/mm/ioremap.c
Diff comments   View file @ cb84c2b
... ... @@ -20,6 +20,7 @@
20 20  
21 21 #include <linux/io.h>
22 22 #include <linux/vmalloc.h>
  23 +#include <linux/mm.h>
23 24  
24 25 void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size)
25 26 {