Eric Lee / smarc-ti-linux-kernel

17 Dec, 2014

1 commit

  • fec77bb50   drm/radeon: Assign VMID to PASID for IH in non-HWS mode ... Browse Code »

    This patch fixes a bug in kgd_set_pasid_vmid_mapping(), where the function
    only updated the ATC registers (IOMMU) with the new VMID PASID mapping,
    but didn't update the IH (Interrupt) registers.

    The bug only occurs when using non-HWS mode. In HWS mode, the CP automatically
    does the VMID PASID mapping.

    Signed-off-by: Ben Goz
    Signed-off-by: Oded Gabbay
    Acked-by: Alex Deucher

    Ben Goz
     

04 Dec, 2014

1 commit

21 Nov, 2014

1 commit

15 Jul, 2014

1 commit

  • e28740ece   drm/radeon: Add radeon <--> amdkfd interface ... Browse Code »

    This patch adds the interface between the radeon driver and the amdkfd driver.
    The interface implementation is contained in radeon_kfd.c and radeon_kfd.h.

    The interface itself is represented by a pointer to struct
    kfd_dev. The pointer is located inside radeon_device structure.

    All the register accesses that amdkfd need are done using this interface. This
    allows us to avoid direct register accesses in amdkfd proper, while also
    avoiding locking between amdkfd and radeon.

    The single exception is the doorbells that are used in both of the drivers.
    However, because they are located in separate pci bar pages, the danger of
    sharing registers between the drivers is minimal.

    Having said that, we are planning to move the doorbells as well to radeon.

    v3:

    Add interface for sa manager init and fini. The init function will allocate a
    buffer on system memory and pin it to the GART address space via the radeon sa
    manager.

    All mappings of buffers to GART address space are done via the radeon sa
    manager. The interface of allocate memory will use the radeon sa manager to sub
    allocate from the single buffer that was allocated during the init function.

    Change lower_32/upper_32 calls to use linux macros

    Add documentation for the interface

    v4:

    Change ptr field type in kgd_mem from uint32_t* to void* to match to type that
    is returned by radeon_sa_bo_cpu_addr

    v5:

    Change format of mqd structure to work with latest KV firmware
    Add support for AQL queues creation to enable working with open-source HSA
    runtime.
    Move generic kfd-->kgd interface and other generic kgd definitions to a generic
    header file that will be used by AMD's radeon and amdgpu drivers

    Signed-off-by: Oded Gabbay

    Oded Gabbay
     

03 Jul, 2014

1 commit

05 Jun, 2014

1 commit

02 Jun, 2014

1 commit

01 May, 2014

1 commit

  • f5d636d2a   drm/radeon: use pflip irq on R600+ v2 ... Browse Code »
    5

    Testing the update pending bit directly after issuing an
    update is nonsense cause depending on the pixel clock the
    CRTC needs a bit of time to execute the flip even when we
    are in the VBLANK period.

    This is just a non invasive patch to solve the problem at
    hand, a more complete and cleaner solution should follow
    in the next merge window.

    Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564

    v2: fix source IDs for CRTC2-6

    Signed-off-by: Christian König
    Cc: stable@vger.kernel.org

    Christian König
     

18 Feb, 2014

3 commits

16 Jan, 2014

1 commit

  • 62a7b7fbd   drm/radeon: reduce number of free VMIDs and pipes in KV ... Browse Code »

    To support HSA on KV, we need to limit the number of vmids and pipes
    that are available for radeon's use with KV.

    This patch reserves VMIDs 8-15 for amdkfd (so radeon can only use VMIDs
    0-7) and also makes radeon thinks that KV has only a single MEC with a single
    pipe in it

    v3: Use define for static vmid allocation in radeon

    Reviewed-by: Alex Deucher
    Signed-off-by: Oded Gabbay

    Oded Gabbay
     

09 Jan, 2014

1 commit

09 Nov, 2013

4 commits

02 Nov, 2013

2 commits

31 Aug, 2013

12 commits

14 Jul, 2013

1 commit

27 Jun, 2013

7 commits

26 Jun, 2013

1 commit

  • 21a93e130   drm/radeon/cik: add support for sDMA dma engines (v8) ... Browse Code »

    CIK has new asynchronous DMA engines called sDMA
    (system DMA). Each engine supports 1 ring buffer
    for kernel and gfx and 2 userspace queues for compute.

    TODO: fill in the compute setup.

    v2: update to the latest reset code
    v3: remove ib_parse
    v4: fix copy_dma()
    v5: drop WIP compute sDMA queues
    v6: rebase
    v7: endian fixes for IB
    v8: cleanup for release

    Signed-off-by: Alex Deucher

    Alex Deucher