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Commit 8f7b130d2b86d8e939052277aabcf71cd141c6a7

Authored by Eric Lee
1 parent f88566037c
Exists in smarc-imx_3.10.53_1.1.0_ga

Stable release for 3.10.53 kernel branch

Showing 20 changed files with 1786 additions and 359 deletions Side-by-side Diff

Documentation/devicetree/bindings/power/bq2477x-charger.txt
Diff comments   View file @ 8f7b130
  1 +bq2477x charger
  2 +~~~~~~~~~~~~~~~
  3 +
  4 +Required properties :
  5 + - compatible : should contain "ti,bq2477x".
  6 + - ti,dac-ichg : Charge current that must be programmed
  7 + - ti,dac-v : The maximum charge voltage that must be programmed
  8 + - ti,dac-minsv : The minimum System voltage that must be programmed
  9 + - ti,dac-iin : The input current that must be programmed
  10 + - ti,wdt-refresh-timeout : watch dog timer that must be programmed
  11 + - ti,charger-detect-gpio : a GPIO spec for AC adapter detection. The flag
  12 + that determines if AC adapter presence is indicated by active low.
  13 + Set this to GPIO_ACTIVE_LOW if active low indicates adapter is present,
  14 + else GPIO_ACTIVE_HIGH.
  15 +
  16 +Example:
  17 +
  18 + bq2477x@6a {
  19 + compatible = "ti,bq2477x";
  20 + reg = <0x6a>;
  21 + ti,dac-ichg = <2240>;
  22 + ti,dac-v = <9008>;
  23 + ti,dac-minsv = <4608>;
  24 + ti,dac-iin = <4992>;
  25 + ti,wdt-refresh-timeout = <40>;
  26 + ti,charger-detect-gpio = <&gpio TEGRA_GPIO(J, 0) GPIO_ACTIVE_LOW>;
  27 + };
arch/arm/boot/dts/imx6dl-smarcfimx6-1080p.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6dl-smarcfimx6.dts"
  10 +
  11 +/* Dual-Channel LVDS Panel for AUO G240HW01 V0 24-inch Color TFT 1920x1080 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 + split-mode;
  15 +
  16 + lvds-channel@0 {
  17 + fsl,data-mapping = "spwg";
  18 + fsl,data-width = <24>;
  19 + primary;
  20 + status = "okay";
  21 +
  22 + display-timings {
  23 + native-mode = <&timing0>;
  24 + timing0: g24hw01 {
  25 + clock-frequency = <130005200>;
  26 + hactive = <1920>;
  27 + vactive = <1080>;
  28 + hback-porch = <100>;
  29 + hfront-porch = <40>;
  30 + vback-porch = <30>;
  31 + vfront-porch = <3>;
  32 + hsync-len = <10>;
  33 + vsync-len = <2>;
  34 + };
  35 + };
  36 + };
  37 +
  38 + lvds-channel@1 {
  39 + fsl,data-mapping = "spwg";
  40 + fsl,data-width = <24>;
  41 + status = "okay";
  42 +
  43 + display-timings {
  44 + native-mode = <&timing1>;
  45 + timing1: g24hw01 {
  46 + clock-frequency = <130005200>;
  47 + hactive = <1920>;
  48 + vactive = <1080>;
  49 + hback-porch = <100>;
  50 + hfront-porch = <40>;
  51 + vback-porch = <30>;
  52 + vfront-porch = <3>;
  53 + hsync-len = <10>;
  54 + vsync-len = <2>;
  55 + };
  56 + };
  57 + };
  58 +};
arch/arm/boot/dts/imx6dl-smarcfimx6-wvga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6dl-smarcfimx6.dts"
  10 +
  11 +/* LVDS Panel for AUO G070VW01 V0 7-inch Color TFT 800x480 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 +
  15 + lvds-channel@0 {
  16 + fsl,data-mapping = "spwg";
  17 + fsl,data-width = <24>;
  18 + primary;
  19 + status = "okay";
  20 +
  21 + display-timings {
  22 + native-mode = <&timing0>;
  23 + timing0: g070vw01 {
  24 + clock-frequency = <33300000>;
  25 + hactive = <800>;
  26 + vactive = <480>;
  27 + hback-porch = <64>;
  28 + hfront-porch = <64>;
  29 + vback-porch = <12>;
  30 + vfront-porch = <4>;
  31 + hsync-len = <128>;
  32 + vsync-len = <12>;
  33 + };
  34 + };
  35 + };
  36 +
  37 + lvds-channel@1 {
  38 + fsl,data-mapping = "spwg";
  39 + fsl,data-width = <24>;
  40 + status = "okay";
  41 +
  42 + display-timings {
  43 + native-mode = <&timing1>;
  44 + timing1: g070vw01 {
  45 + clock-frequency = <33300000>;
  46 + hactive = <800>;
  47 + vactive = <480>;
  48 + hback-porch = <64>;
  49 + hfront-porch = <64>;
  50 + vback-porch = <12>;
  51 + vfront-porch = <4>;
  52 + hsync-len = <128>;
  53 + vsync-len = <12>;
  54 + };
  55 + };
  56 + };
  57 +};
arch/arm/boot/dts/imx6dl-smarcfimx6-wxga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6dl-smarcfimx6.dts"
  10 +
  11 +/* LVDS Panel for AUO G185XW01 V2 18.5-inch Color TFT 1360x768 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 +
  15 + lvds-channel@0 {
  16 + fsl,data-mapping = "spwg";
  17 + fsl,data-width = <24>;
  18 + primary;
  19 + status = "okay";
  20 +
  21 + display-timings {
  22 + native-mode = <&timing0>;
  23 + timing0: g185xw01 {
  24 + clock-frequency = <78000000>;
  25 + hactive = <1360>;
  26 + vactive = <768>;
  27 + hback-porch = <60>;
  28 + hfront-porch = <60>;
  29 + vback-porch = <18>;
  30 + vfront-porch = <4>;
  31 + hsync-len = <120>;
  32 + vsync-len = <18>;
  33 + };
  34 + };
  35 + };
  36 +
  37 + lvds-channel@1 {
  38 + fsl,data-mapping = "spwg";
  39 + fsl,data-width = <24>;
  40 + status = "okay";
  41 +
  42 + display-timings {
  43 + native-mode = <&timing1>;
  44 + timing1: g185xw01 {
  45 + clock-frequency = <78000000>;
  46 + hactive = <1360>;
  47 + vactive = <768>;
  48 + hback-porch = <60>;
  49 + hfront-porch = <60>;
  50 + vback-porch = <18>;
  51 + vfront-porch = <4>;
  52 + hsync-len = <120>;
  53 + vsync-len = <18>;
  54 + };
  55 + };
  56 + };
  57 +};
arch/arm/boot/dts/imx6dl-smarcfimx6-xga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6dl-smarcfimx6.dts"
  10 +
  11 +&ldb {
  12 + status = "okay";
  13 +
  14 + lvds-channel@0 {
  15 + fsl,data-mapping = "spwg";
  16 + fsl,data-width = <24>;
  17 + primary;
  18 + status = "okay";
  19 +
  20 + display-timings {
  21 + native-mode = <&timing0>;
  22 + timing0: hsd100pxn1 {
  23 + clock-frequency = <65000000>;
  24 + hactive = <1024>;
  25 + vactive = <768>;
  26 + hback-porch = <220>;
  27 + hfront-porch = <40>;
  28 + vback-porch = <21>;
  29 + vfront-porch = <7>;
  30 + hsync-len = <60>;
  31 + vsync-len = <10>;
  32 + };
  33 + };
  34 + };
  35 +
  36 + lvds-channel@1 {
  37 + fsl,data-mapping = "spwg";
  38 + fsl,data-width = <24>;
  39 + status = "okay";
  40 +
  41 + display-timings {
  42 + native-mode = <&timing1>;
  43 + timing1: hsd100pxn1 {
  44 + clock-frequency = <65000000>;
  45 + hactive = <1024>;
  46 + vactive = <768>;
  47 + hback-porch = <220>;
  48 + hfront-porch = <40>;
  49 + vback-porch = <21>;
  50 + vfront-porch = <7>;
  51 + hsync-len = <60>;
  52 + vsync-len = <10>;
  53 + };
  54 + };
  55 + };
  56 +};
arch/arm/boot/dts/imx6dl-smarcfimx6.dts
Diff comments   View file @ 8f7b130
... ... @@ -17,20 +17,26 @@
17 17 compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl", "fsl, imx6dl-smarcfimx6";
18 18 };
19 19  
20   -&cpu0 {
21   - arm-supply = <&reg_arm>;
22   - soc-supply = <&reg_soc>;
23   - pu-supply = <&reg_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
  20 +&ldb {
  21 + lvds-channel@0 {
  22 + crtc = "ipu1-di0";
  23 + };
  24 +
  25 + lvds-channel@1 {
  26 + crtc = "ipu1-di1";
  27 + };
24 28 };
25 29  
26   -&gpc {
27   - fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
28   - fsl,wdog-reset = <1>; /* watchdog select of reset source */
29   - pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
  30 +&mxcfb1 {
  31 + status = "okay";
30 32 };
31 33  
32   -&gpu {
33   - pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
  34 +&mxcfb2 {
  35 + status = "okay";
  36 +};
  37 +
  38 +&pxp {
  39 + status = "okay";
34 40 };
35 41  
36 42 &vpu {
arch/arm/boot/dts/imx6q-smarcfimx6-1080p.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6q-smarcfimx6.dts"
  10 +
  11 +/* Dual-Channel LVDS Panel for AUO G240HW01 V0 24-inch Color TFT 1920x1080 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 + split-mode;
  15 +
  16 + lvds-channel@0 {
  17 + fsl,data-mapping = "spwg";
  18 + fsl,data-width = <24>;
  19 + primary;
  20 + status = "okay";
  21 +
  22 + display-timings {
  23 + native-mode = <&timing0>;
  24 + timing0: g24hw01 {
  25 + clock-frequency = <130005200>;
  26 + hactive = <1920>;
  27 + vactive = <1080>;
  28 + hback-porch = <100>;
  29 + hfront-porch = <40>;
  30 + vback-porch = <30>;
  31 + vfront-porch = <3>;
  32 + hsync-len = <10>;
  33 + vsync-len = <2>;
  34 + };
  35 + };
  36 + };
  37 +
  38 + lvds-channel@1 {
  39 + fsl,data-mapping = "spwg";
  40 + fsl,data-width = <24>;
  41 + status = "okay";
  42 +
  43 + display-timings {
  44 + native-mode = <&timing1>;
  45 + timing1: g24hw01 {
  46 + clock-frequency = <130005200>;
  47 + hactive = <1920>;
  48 + vactive = <1080>;
  49 + hback-porch = <100>;
  50 + hfront-porch = <40>;
  51 + vback-porch = <30>;
  52 + vfront-porch = <3>;
  53 + hsync-len = <10>;
  54 + vsync-len = <2>;
  55 + };
  56 + };
  57 + };
  58 +};
arch/arm/boot/dts/imx6q-smarcfimx6-wvga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6q-smarcfimx6.dts"
  10 +
  11 +/* LVDS Panel for AUO G070VW01 V0 7-inch Color TFT 800x480 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 +
  15 + lvds-channel@0 {
  16 + fsl,data-mapping = "spwg";
  17 + fsl,data-width = <24>;
  18 + primary;
  19 + status = "okay";
  20 +
  21 + display-timings {
  22 + native-mode = <&timing0>;
  23 + timing0: g070vw01 {
  24 + clock-frequency = <33300000>;
  25 + hactive = <800>;
  26 + vactive = <480>;
  27 + hback-porch = <64>;
  28 + hfront-porch = <64>;
  29 + vback-porch = <12>;
  30 + vfront-porch = <4>;
  31 + hsync-len = <128>;
  32 + vsync-len = <12>;
  33 + /*hsync-active = <0>;
  34 + vsync-active = <0>;*/
  35 + };
  36 + };
  37 + };
  38 +
  39 + lvds-channel@1 {
  40 + fsl,data-mapping = "spwg";
  41 + fsl,data-width = <24>;
  42 + status = "okay";
  43 +
  44 + display-timings {
  45 + native-mode = <&timing1>;
  46 + timing1: g070vw01 {
  47 + clock-frequency = <33300000>;
  48 + hactive = <800>;
  49 + vactive = <480>;
  50 + hback-porch = <64>;
  51 + hfront-porch = <64>;
  52 + vback-porch = <12>;
  53 + vfront-porch = <4>;
  54 + hsync-len = <128>;
  55 + vsync-len = <12>;
  56 + /*hsync-active = <0>;
  57 + vsync-active = <0>;*/
  58 + };
  59 + };
  60 + };
  61 +};
arch/arm/boot/dts/imx6q-smarcfimx6-wxga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6q-smarcfimx6.dts"
  10 +
  11 +/* LVDS Panel for AUO G185XW01 V2 18.5-inch Color TFT 1360x768 Panel Settings */
  12 +&ldb {
  13 + status = "okay";
  14 +
  15 + lvds-channel@0 {
  16 + fsl,data-mapping = "spwg";
  17 + fsl,data-width = <24>;
  18 + primary;
  19 + status = "okay";
  20 +
  21 + display-timings {
  22 + native-mode = <&timing0>;
  23 + timing0: g185xw01 {
  24 + clock-frequency = <78000000>;
  25 + hactive = <1360>;
  26 + vactive = <768>;
  27 + hback-porch = <60>;
  28 + hfront-porch = <60>;
  29 + vback-porch = <18>;
  30 + vfront-porch = <4>;
  31 + hsync-len = <120>;
  32 + vsync-len = <18>;
  33 + };
  34 + };
  35 + };
  36 +
  37 + lvds-channel@1 {
  38 + fsl,data-mapping = "spwg";
  39 + fsl,data-width = <24>;
  40 + status = "okay";
  41 +
  42 + display-timings {
  43 + native-mode = <&timing1>;
  44 + timing1: g185xw01 {
  45 + clock-frequency = <78000000>;
  46 + hactive = <1360>;
  47 + vactive = <768>;
  48 + hback-porch = <60>;
  49 + hfront-porch = <60>;
  50 + vback-porch = <18>;
  51 + vfront-porch = <4>;
  52 + hsync-len = <120>;
  53 + vsync-len = <18>;
  54 + };
  55 + };
  56 + };
  57 +};
arch/arm/boot/dts/imx6q-smarcfimx6-xga.dts
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * Copyright (C) 2015 Embedian, Inc.
  3 + *
  4 + * This program is free software; you can redistribute it and/or modify
  5 + * it under the terms of the GNU General Public License version 2 as
  6 + * published by the Free Software Foundation.
  7 + */
  8 +
  9 +#include "imx6q-smarcfimx6.dts"
  10 +
  11 +&ldb {
  12 + status = "okay";
  13 +
  14 + lvds-channel@0 {
  15 + fsl,data-mapping = "spwg";
  16 + fsl,data-width = <24>;
  17 + primary;
  18 + status = "okay";
  19 +
  20 + display-timings {
  21 + native-mode = <&timing0>;
  22 + timing0: hsd100pxn1 {
  23 + clock-frequency = <65000000>;
  24 + hactive = <1024>;
  25 + vactive = <768>;
  26 + hback-porch = <220>;
  27 + hfront-porch = <40>;
  28 + vback-porch = <21>;
  29 + vfront-porch = <7>;
  30 + hsync-len = <60>;
  31 + vsync-len = <10>;
  32 + };
  33 + };
  34 + };
  35 +
  36 + lvds-channel@1 {
  37 + fsl,data-mapping = "spwg";
  38 + fsl,data-width = <24>;
  39 + status = "okay";
  40 +
  41 + display-timings {
  42 + native-mode = <&timing1>;
  43 + timing1: hsd100pxn1 {
  44 + clock-frequency = <65000000>;
  45 + hactive = <1024>;
  46 + vactive = <768>;
  47 + hback-porch = <220>;
  48 + hfront-porch = <40>;
  49 + vback-porch = <21>;
  50 + vfront-porch = <7>;
  51 + hsync-len = <60>;
  52 + vsync-len = <10>;
  53 + };
  54 + };
  55 + };
  56 +};
arch/arm/boot/dts/imx6q-smarcfimx6.dts
Diff comments   View file @ 8f7b130
... ... @@ -20,12 +20,6 @@
20 20 compatible = "fsl,imx6q-sabresd", "fsl,imx6q", "fsl,imx6q-smarcfimx6";
21 21 };
22 22  
23   -&battery {
24   - offset-charger = <1900>;
25   - offset-discharger = <1694>;
26   - offset-usb-charger = <1685>;
27   -};
28   -
29 23 &ldb {
30 24 lvds-channel@0 {
31 25 crtc = "ipu2-di0";
... ... @@ -54,18 +48,6 @@
54 48  
55 49 &sata {
56 50 status = "okay";
57   -};
58   -
59   -&cpu0 {
60   - arm-supply = <&reg_arm>;
61   - soc-supply = <&reg_soc>;
62   - pu-supply = <&reg_pu>; /* use pu_dummy if VDDSOC share with VDDPU */
63   -};
64   -
65   -&gpc {
66   - fsl,ldo-bypass = <0>; /* use ldo-bypass, u-boot will check it and configure */
67   - fsl,wdog-reset = <1>; /* watchdog select of reset source */
68   - pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
69 51 };
70 52  
71 53 &gpu {
arch/arm/boot/dts/imx6qdl-smarc.dtsi
Diff comments   View file @ 8f7b130
... ... @@ -39,8 +39,8 @@
39 39 intc: interrupt-controller@00a01000 {
40 40 compatible = "arm,cortex-a9-gic";
41 41 #interrupt-cells = <3>;
42   - #address-cells = <1>;
43   - #size-cells = <1>;
  42 + /*#address-cells = <1>;
  43 + #size-cells = <1>;*/
44 44 interrupt-controller;
45 45 reg = <0x00a01000 0x1000>,
46 46 <0x00a00100 0x100>;
... ... @@ -1069,10 +1069,10 @@
1069 1069  
1070 1070 pinctrl_audmux_2: audmux-2 {
1071 1071 fsl,pins = <
1072   - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
1073   - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
1074   - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
1075   - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  1072 + MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  1073 + MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  1074 + MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  1075 + MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
1076 1076 >;
1077 1077 };
1078 1078  
... ... @@ -1093,8 +1093,8 @@
1093 1093 };
1094 1094 pinctrl_ecspi1_cs_2: ecspi1_cs_grp-2 {
1095 1095 fsl,pins = <
1096   - MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x80000000
1097   - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000
  1096 + MX6QDL_PAD_KEY_ROW1__ECSPI1_SS0 0x80000000
  1097 + MX6QDL_PAD_KEY_COL2__ECSPI1_SS1 0x80000000
1098 1098 >;
1099 1099 };
1100 1100  
... ... @@ -1119,8 +1119,8 @@
1119 1119 pinctrl_ecspi2_cs_1: ecspi2_cs_grp-1 {
1120 1120 fsl,pins = <
1121 1121 MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x80000000
1122   - MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x80000000
1123   - MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
  1122 + MX6QDL_PAD_EIM_D24__ECSPI2_SS2 0x80000000
  1123 + MX6QDL_PAD_EIM_D25__ECSPI2_SS3 0x80000000
1124 1124 >;
1125 1125 };
1126 1126  
... ... @@ -1163,9 +1163,6 @@
1163 1163 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
1164 1164 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
1165 1165 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
1166   - /*MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8*/
1167   - /* AR8035 interrupt */
1168   - /*MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x80000000*/
1169 1166 >;
1170 1167 };
1171 1168  
... ... @@ -1213,6 +1210,7 @@
1213 1210  
1214 1211 pinctrl_enet_irq: enetirqgrp {
1215 1212 fsl,pins = <
  1213 + /* AR8035 interrupt */
1216 1214 MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x000b1
1217 1215 >;
1218 1216 };
... ... @@ -1266,8 +1264,8 @@
1266 1264  
1267 1265 pinctrl_flexcan1_3: flexcan1grp-3 {
1268 1266 fsl,pins = <
1269   - MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000
1270   - MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000
  1267 + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000
  1268 + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x80000000
1271 1269 >;
1272 1270 };
1273 1271 };
... ... @@ -1275,8 +1273,8 @@
1275 1273 flexcan2 {
1276 1274 pinctrl_flexcan2_1: flexcan2grp-1 {
1277 1275 fsl,pins = <
1278   - MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
1279   - MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
  1276 + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
  1277 + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
1280 1278 >;
1281 1279 };
1282 1280 };
1283 1281  
... ... @@ -1414,35 +1412,35 @@
1414 1412 ipu1 {
1415 1413 pinctrl_ipu1_1: ipu1grp-1 {
1416 1414 fsl,pins = <
1417   - MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
1418   - MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
1419   - MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
1420   - MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  1415 + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xe1
  1416 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xe1
  1417 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0xe1
  1418 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0xe1
1421 1419 MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000
1422   - MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
1423   - MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
1424   - MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
1425   - MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
1426   - MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
1427   - MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
1428   - MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
1429   - MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
1430   - MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
1431   - MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
1432   - MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
1433   - MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
1434   - MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
1435   - MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
1436   - MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
1437   - MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
1438   - MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
1439   - MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
1440   - MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
1441   - MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
1442   - MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
1443   - MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
1444   - MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
1445   - MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  1420 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xe1
  1421 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xe1
  1422 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xe1
  1423 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xe1
  1424 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xe1
  1425 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xe1
  1426 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xe1
  1427 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xe1
  1428 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xe1
  1429 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xe1
  1430 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xe1
  1431 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xe1
  1432 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xe1
  1433 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xe1
  1434 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xe1
  1435 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xe1
  1436 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xe1
  1437 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xe1
  1438 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xe1
  1439 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xe1
  1440 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xe1
  1441 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xe1
  1442 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xe1
  1443 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xe1
1446 1444 >;
1447 1445 };
1448 1446  
... ... @@ -1554,10 +1552,10 @@
1554 1552 };
1555 1553 pinctrl_uart1_2: uart1grp-2 {
1556 1554 fsl,pins = <
1557   - MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
1558   - MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
1559   - MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
1560   - MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
  1555 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
  1556 + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
  1557 + MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x1b0b1
  1558 + MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
1561 1559 >;
1562 1560 };
1563 1561 };
1564 1562  
... ... @@ -1565,17 +1563,17 @@
1565 1563 uart2 {
1566 1564 pinctrl_uart2_1: uart2grp-1 {
1567 1565 fsl,pins = <
1568   - MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
1569   - MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  1566 + MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  1567 + MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
1570 1568 >;
1571 1569 };
1572 1570  
1573 1571 pinctrl_uart2_2: uart2grp-2 { /* DTE mode */
1574 1572 fsl,pins = <
1575   - MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
1576   - MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
1577   - MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
1578   - MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
  1573 + MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
  1574 + MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
  1575 + MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
  1576 + MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
1579 1577 >;
1580 1578 };
1581 1579 };
... ... @@ -1610,10 +1608,10 @@
1610 1608  
1611 1609 pinctrl_uart4_2: uart4grp-2 {
1612 1610 fsl,pins = <
1613   - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
1614   - MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
1615   - MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
1616   - MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
  1611 + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
  1612 + MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
  1613 + MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
  1614 + MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
1617 1615 >;
1618 1616 };
1619 1617 };
... ... @@ -1712,10 +1710,6 @@
1712 1710 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
1713 1711 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
1714 1712 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
1715   - /*MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
1716   - MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
1717   - MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
1718   - MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059*/
1719 1713 >;
1720 1714 };
1721 1715  
... ... @@ -1734,17 +1728,13 @@
1734 1728 usdhc3 {
1735 1729 pinctrl_usdhc3_1: usdhc3grp-1 {
1736 1730 fsl,pins = <
1737   - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
1738   - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
1739   - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
1740   - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
1741   - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
1742   - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
1743   - /*MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
1744   - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
1745   - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
1746   - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059*/
1747   - MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
  1731 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  1732 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  1733 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  1734 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  1735 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  1736 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  1737 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x17059
1748 1738 >;
1749 1739 };
1750 1740  
... ... @@ -1793,16 +1783,16 @@
1793 1783 usdhc4 {
1794 1784 pinctrl_usdhc4_1: usdhc4grp-1 {
1795 1785 fsl,pins = <
1796   - MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
1797   - MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
1798   - MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
1799   - MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
1800   - MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
1801   - MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
1802   - MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
1803   - MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
1804   - MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
1805   - MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
  1786 + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
  1787 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
  1788 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
  1789 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
  1790 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
  1791 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
  1792 + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
  1793 + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
  1794 + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
  1795 + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
1806 1796 >;
1807 1797 };
1808 1798  
arch/arm/boot/dts/imx6qdl-smarcfimx6.dtsi
Diff comments   View file @ 8f7b130
... ... @@ -22,40 +22,29 @@
22 22 reg = <0x10000000 0x40000000>;
23 23 };
24 24  
25   - battery: max8903@0 {
26   - compatible = "fsl,max8903-charger";
27   - pinctrl-names = "default";
28   - dok_input = <&gpio2 24 1>;
29   - uok_input = <&gpio1 27 1>;
30   - chg_input = <&gpio3 23 1>;
31   - flt_input = <&gpio5 2 1>;
32   - fsl,dcm_always_high;
33   - fsl,dc_valid;
34   - fsl,usb_valid;
35   - status = "okay";
36   - };
37   -
38 25 hannstar_cabc {
39 26 compatible = "hannstar,cabc";
40 27  
41 28 lvds0 {
42   - gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
  29 + gpios = <&gpio1 00 GPIO_ACTIVE_HIGH>;
43 30 };
44 31  
45 32 lvds1 {
46   - gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
  33 + gpios = <&gpio1 00 GPIO_ACTIVE_HIGH>;
47 34 };
48 35 };
49 36  
50 37 regulators {
51 38 compatible = "simple-bus";
  39 + #address-cells = <1>;
  40 + #size-cells = <0>;
52 41  
53 42 reg_usb_otg_vbus: usb_otg_vbus {
54 43 compatible = "regulator-fixed";
55 44 regulator-name = "usb_otg_vbus";
56 45 regulator-min-microvolt = <5000000>;
57 46 regulator-max-microvolt = <5000000>;
58   - gpio = <&gpio3 22 0>;
  47 + gpio = <&gpio1 29 0>;
59 48 enable-active-high;
60 49 };
61 50  
62 51  
... ... @@ -64,10 +53,18 @@
64 53 regulator-name = "usb_h1_vbus";
65 54 regulator-min-microvolt = <5000000>;
66 55 regulator-max-microvolt = <5000000>;
67   - gpio = <&gpio1 29 0>;
  56 + gpio = <&gpio1 26 0>;
68 57 enable-active-high;
69 58 };
70 59  
  60 + reg_1p8v: 1p8v {
  61 + compatible = "regulator-fixed";
  62 + regulator-name = "1P8V";
  63 + regulator-min-microvolt = <1800000>;
  64 + regulator-max-microvolt = <1800000>;
  65 + regulator-always-on;
  66 + };
  67 +
71 68 reg_2p5v: 2p5v {
72 69 compatible = "regulator-fixed";
73 70 regulator-name = "2P5V";
... ... @@ -84,13 +81,6 @@
84 81 regulator-always-on;
85 82 };
86 83  
87   - reg_mipi_dsi_pwr_on: mipi_dsi_pwr_on {
88   - compatible = "regulator-fixed";
89   - regulator-name = "mipi_dsi_pwr_on";
90   - gpio = <&gpio6 14 0>;
91   - enable-active-high;
92   - };
93   -
94 84 reg_sensor: sensor_supply {
95 85 compatible = "regulator-fixed";
96 86 regulator-name = "sensor-supply";
... ... @@ -116,6 +106,14 @@
116 106 mux-ext-port = <3>;
117 107 };
118 108  
  109 + sound-spdif {
  110 + compatible = "fsl,imx-audio-spdif";
  111 + model = "imx-spdif";
  112 + spdif-controller = <&spdif>;
  113 + spdif-in;
  114 + spdif-out;
  115 + };
  116 +
119 117 sound-hdmi {
120 118 compatible = "fsl,imx6q-audio-hdmi",
121 119 "fsl,imx-audio-hdmi";
... ... @@ -126,8 +124,8 @@
126 124 mxcfb1: fb@0 {
127 125 compatible = "fsl,mxc_sdc_fb";
128 126 disp_dev = "ldb";
129   - interface_pix_fmt = "RGB666";
130   - default_bpp = <16>;
  127 + interface_pix_fmt = "RGB24";
  128 + default_bpp = <24>;
131 129 int_clk = <0>;
132 130 late_init = <0>;
133 131 status = "disabled";
... ... @@ -147,7 +145,7 @@
147 145 mxcfb3: fb@2 {
148 146 compatible = "fsl,mxc_sdc_fb";
149 147 disp_dev = "lcd";
150   - interface_pix_fmt = "RGB565";
  148 + interface_pix_fmt = "RGB24";
151 149 mode_str ="CLAA-WVGA";
152 150 default_bpp = <16>;
153 151 int_clk = <0>;
... ... @@ -158,8 +156,8 @@
158 156 mxcfb4: fb@3 {
159 157 compatible = "fsl,mxc_sdc_fb";
160 158 disp_dev = "ldb";
161   - interface_pix_fmt = "RGB666";
162   - default_bpp = <16>;
  159 + interface_pix_fmt = "RGB24";
  160 + default_bpp = <24>;
163 161 int_clk = <0>;
164 162 late_init = <0>;
165 163 status = "disabled";
... ... @@ -169,7 +167,7 @@
169 167 compatible = "fsl,lcd";
170 168 ipu_id = <0>;
171 169 disp_id = <0>;
172   - default_ifmt = "RGB565";
  170 + default_ifmt = "RGB24";
173 171 pinctrl-names = "default";
174 172 pinctrl-0 = <&pinctrl_ipu1_1>;
175 173 status = "okay";
... ... @@ -179,6 +177,7 @@
179 177 compatible = "pwm-backlight";
180 178 pwms = <&pwm2 0 5000000>;
181 179 brightness-levels = <0 4 8 16 32 64 128 255>;
  180 + /*set default brightness level to 7, 7 is the brightest*/
182 181 default-brightness-level = <7>;
183 182 };
184 183  
... ... @@ -187,7 +186,7 @@
187 186 ipu_id = <0>;
188 187 csi_id = <0>;
189 188 mclk_source = <0>;
190   - status = "okay";
  189 + status = "disabled";
191 190 };
192 191  
193 192 v4l2_cap_1 {
194 193  
195 194  
... ... @@ -195,20 +194,20 @@
195 194 ipu_id = <0>;
196 195 csi_id = <1>;
197 196 mclk_source = <0>;
198   - status = "okay";
  197 + status = "disabled";
199 198 };
200 199  
201 200 v4l2_out {
202 201 compatible = "fsl,mxc_v4l2_output";
203   - status = "okay";
  202 + status = "disabled";
204 203 };
205 204  
206   - mipi_dsi_reset: mipi-dsi-reset {
207   - compatible = "gpio-reset";
208   - reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
209   - reset-delay-us = <50>;
210   - #reset-cells = <0>;
211   - };
  205 + mipi_csi_reset: mipi-csi-reset {
  206 + compatible = "gpio-reset";
  207 + reset-gpios = <&gpio2 06 GPIO_ACTIVE_LOW>,<&gpio2 03 GPIO_ACTIVE_LOW>; /*GPIO2 and GPIO3*/
  208 + reset-delay-us = <50>;
  209 + #reset-cells = <0>;
  210 + };
212 211 };
213 212  
214 213 &audmux {
215 214  
216 215  
217 216  
... ... @@ -218,16 +217,33 @@
218 217 };
219 218  
220 219 &cpu0 {
221   - arm-supply = <&sw1a_reg>;
222   - soc-supply = <&sw1c_reg>;
223   - pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
  220 + pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
224 221 };
225 222  
  223 +&ecspi1 {
  224 + fsl,spi-num-chipselects = <2>;
  225 + cs-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>, <&gpio4 10 GPIO_ACTIVE_HIGH>;
  226 + pinctrl-names = "default";
  227 + pinctrl-0 = <&pinctrl_ecspi1_2 &pinctrl_ecspi1_cs_2>;
  228 + status = "okay";
  229 +
  230 + spidev@0x00 {
  231 + compatible = "spidev";
  232 + spi-max-frequency = <16000000>;
  233 + reg = <0>;
  234 + };
  235 + spidev@0x01 {
  236 + compatible = "spidev";
  237 + spi-max-frequency = <16000000>;
  238 + reg = <1>;
  239 + };
  240 +};
  241 +
226 242 &ecspi2 {
227   - fsl,spi-num-chipselects = <3>;
228   - cs-gpios = <&gpio5 29 0>, <&gpio3 24 0>, <&gpio3 25 0>;
  243 + fsl,spi-num-chipselects = <4>;
  244 + cs-gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>,<&gpio3 24 GPIO_ACTIVE_HIGH>,<&gpio3 25 GPIO_ACTIVE_HIGH>,<0>;
229 245 pinctrl-names = "default";
230   - pinctrl-0 = <&pinctrl_ecspi2_1>, <&pinctrl_ecspi2_cs_1>;
  246 + pinctrl-0 = <&pinctrl_ecspi2_1 &pinctrl_ecspi2_cs_1>;
231 247 status = "okay";
232 248  
233 249 flash: mx25u3235f0@0 {
234 250  
235 251  
236 252  
237 253  
238 254  
239 255  
240 256  
241 257  
242 258  
243 259  
244 260  
245 261  
246 262  
... ... @@ -236,86 +252,73 @@
236 252 compatible = "macronix,mx25u3235f";
237 253 spi-max-frequency = <16000000>;
238 254 reg = <0>;
239   - partition@0 {
240   - label = "U-Boot";
241   - reg = <0x0 0x100000>;
242   - };
  255 + partition@0 {
  256 + label = "U-Boot";
  257 + reg = <0x0 0x100000>;
  258 + };
243 259  
244   - partition@100000 {
245   - label = "U-Boot Environment";
246   - reg = <0x100000 0x080000>;
247   - };
  260 + partition@100000 {
  261 + label = "U-Boot Environment";
  262 + reg = <0x100000 0x080000>;
  263 + };
248 264  
249   - partition@180000 {
250   - label = "Flattened Device Tree";
251   - reg = <0x180000 0x200000>;
252   - };
  265 + partition@180000 {
  266 + label = "Flattened Device Tree";
  267 + reg = <0x180000 0x200000>;
  268 + };
253 269  
254 270 };
255   -};
256 271  
257   -&ecspi1 {
258   - fsl,spi-num-chipselects = <2>;
259   - cs-gpios = <&gpio4 9 0>, <&gpio4 10 0>;
260   - pinctrl-names = "default";
261   - pinctrl-0 = <&pinctrl_ecspi1_2>, <&pinctrl_ecspi1_cs_2>;
262   - status = "okay";
263   -
264   - spidev@0x00 {
265   - compatible = "spidev";
266   - spi-max-frequency = <20000000>;
267   - reg = <0>;
268   - };
269   - spidev@0x01 {
270   - compatible = "spidev";
271   - spi-max-frequency = <20000000>;
272   - reg = <1>;
273   - };
  272 + spidev@0x02 {
  273 + #address-cells = <1>;
  274 + #size-cells = <0>;
  275 + compatible = "spidev";
  276 + reg = <2>;
  277 + spi-max-frequency = <16000000>;
  278 + };
  279 +
  280 + spidev@0x03 {
  281 + #address-cells = <1>;
  282 + #size-cells = <0>;
  283 + compatible = "spidev";
  284 + reg = <3>;
  285 + spi-max-frequency = <16000000>;
  286 + };
274 287 };
275 288  
276 289 &fec {
277 290 pinctrl-names = "default";
278 291 pinctrl-0 = <&pinctrl_enet_1>, <&pinctrl_enet_irq>;
279   - /*interrupts-extended = <&gpio4 11 0x04>, <&intc 0 119 0x04>;*/
280 292 phy-mode = "rgmii";
  293 + fsl,magic-packet;
281 294 status = "okay";
282 295 };
283 296  
284 297 &gpc {
285   - fsl,cpu_pupscr_sw2iso = <0xf>;
286   - fsl,cpu_pupscr_sw = <0xf>;
287   - fsl,cpu_pdnscr_iso2sw = <0x1>;
288   - fsl,cpu_pdnscr_iso = <0x1>;
289   - fsl,ldo-bypass = <1>; /* use ldo-bypass, u-boot will check it and configure */
290   - fsl,wdog-reset = <2>; /* watchdog select of reset source */
291   - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
  298 + /* use ldo-enable, u-boot will check it and configure */
  299 + fsl,ldo-bypass = <1>;
  300 + /* watchdog select of reset source */
  301 + fsl,wdog-reset = <1>;
  302 + pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
292 303 };
293 304  
294   -/*&wdog1 {
295   - status = "disabled";
296   -};
297   -
298   -&wdog2 {
299   - status = "okay";
300   -};*/
301   -
302 305 &gpu {
303   - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
  306 + pu-supply = <&reg_pu>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
304 307 };
305 308  
306 309 &hdmi_audio {
307 310 status = "okay";
308 311 };
309 312  
310   -/*&hdmi_cec {
  313 +&hdmi_cec {
311 314 pinctrl-names = "default";
312   - pinctrl-0 = <&pinctrl_hdmi_cec_2>;
  315 + /*pinctrl-0 = <&pinctrl_hdmi_cec_2>;*/
313 316 status = "okay";
314   -};*/
  317 +};
315 318  
316 319 &hdmi_core {
317 320 ipu_id = <0>;
318   - disp_id = <0>;
  321 + disp_id = <1>;
319 322 status = "okay";
320 323 };
321 324  
... ... @@ -342,6 +345,7 @@
342 345 clocks = <&clks 201>;
343 346 VDDA-supply = <&reg_2p5v>;
344 347 VDDIO-supply = <&reg_3p3v>;
  348 + VDDD-supply = <&reg_1p8v>;
345 349 };
346 350  
347 351 s35390a: s35390a@30 {
... ... @@ -353,6 +357,17 @@
353 357 compatible = "at,24c256";
354 358 reg = <0x57>;
355 359 };
  360 +
  361 + bq2477x@09 {
  362 + compatible = "ti,bq2477x";
  363 + reg = <0x09>;
  364 + ti,dac-ichg = <2240>;
  365 + ti,dac-v = <9008>;
  366 + ti,dac-minsv = <4608>;
  367 + ti,dac-iin = <4992>;
  368 + ti,wdt-refresh-timeout = <40>;
  369 + ti,charger-detect-gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
  370 + };
356 371 };
357 372  
358 373 &i2c2 {
359 374  
360 375  
361 376  
362 377  
363 378  
... ... @@ -374,49 +389,53 @@
374 389 status = "okay";
375 390  
376 391 i2c-switch@70 {
377   - compatible = "nxp,pca9545";
378   - #address-cells = <1>;
379   - #size-cells = <0>;
380   - reg = <0x70>;
381   -
382   - i2c@0 {
383   - #address-cells = <1>;
384   - #size-cells = <0>;
385   - compatible = "nxp,pca954x-bus";
386   - reg = <0>;
387   -
388   - /*eeprom@54 {
389   - compatible = "at,24c08";
390   - reg = <0x54>;
391   - };*/
392   - };
  392 + compatible = "nxp,pca9545";
  393 + #address-cells = <1>;
  394 + #size-cells = <0>;
  395 + reg = <0x70>;
393 396  
394   - i2c@1 {
395   - #address-cells = <1>;
396   - #size-cells = <0>;
397   - compatible = "nxp,pca954x-bus";
398   - reg = <1>;
399   -
400   - /* Example to add new i2c device */
401   - /*rtc@51 {
402   - compatible = "nxp,pcf8563";
403   - reg = <0x51>;
404   - };*/
405   - };
  397 + i2c@0 {
  398 + #address-cells = <1>;
  399 + #size-cells = <0>;
  400 + compatible = "nxp,pca954x-bus";
  401 + reg = <0>;
406 402  
  403 + /*eeprom@54 {
  404 + compatible = "at,24c08";
  405 + reg = <0x54>;
  406 + };*/
  407 + };
  408 +
  409 + i2c@1 {
  410 + #address-cells = <1>;
  411 + #size-cells = <0>;
  412 + compatible = "nxp,pca954x-bus";
  413 + reg = <1>;
  414 +
  415 + /* Example to add new i2c device */
  416 + /*rtc@51 {
  417 + compatible = "nxp,pcf8563";
  418 + reg = <0x51>;
  419 + };*/
  420 + eeprom@76 {
  421 + compatible = "at,24c256";
  422 + reg = <0x76>;
  423 + };
  424 + };
  425 +
407 426 i2c@2 {
408 427 #address-cells = <1>;
409 428 #size-cells = <0>;
410   - compatible = "nxp,pca954x-bus";
  429 + compatible = "nxp,pca954x-bus";
411 430 reg = <2>;
412   - };
  431 + };
413 432 i2c@3 {
414 433 #address-cells = <1>;
415 434 #size-cells = <0>;
416 435 compatible = "nxp,pca954x-bus";
417 436 reg = <3>;
418 437 };
419   - };
  438 + };
420 439 };
421 440  
422 441 &iomuxc {
423 442  
424 443  
425 444  
426 445  
... ... @@ -426,107 +445,46 @@
426 445 hog {
427 446 pinctrl_hog_1: hoggrp-1 {
428 447 fsl,pins = <
429   - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
430   - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
431   - MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
432   - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000
433   - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
434   - MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
435   - MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000
436   - MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000
437   - MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
438   - MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
439   - MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
440   - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000
441   - MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
442   - MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
443   - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
444   - MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
445   - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000
446   - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
447   - MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
448   - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
449   - MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000
450   - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x80000000
451   - MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
452   - MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
453   - MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
454   - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
455   - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
456   - MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
457   - MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000
458   - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
459   - MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
460   - MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0
  448 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
  449 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000
  450 + MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000
  451 + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000
  452 + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000
  453 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000
  454 + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000
  455 + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000
  456 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
  457 + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
  458 + MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x80000000
  459 + MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
  460 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000
  461 + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
  462 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000
  463 + MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000
  464 + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000
  465 + /*MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000*/
  466 + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000
  467 + MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x80000000
  468 + MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000
  469 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000
  470 + MX6QDL_PAD_GPIO_9__WDOG1_B 0x80000000
  471 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
  472 + MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000
  473 + MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0
461 474 >;
462 475 };
463 476 };
464 477 };
465 478  
466   -&ldb {
467   - status = "okay";
468   -
469   - lvds-channel@0 {
470   - fsl,data-mapping = "spwg";
471   - fsl,data-width = <18>;
472   - status = "okay";
473   -
474   - display-timings {
475   - native-mode = <&timing0>;
476   - timing0: hsd100pxn1 {
477   - clock-frequency = <65000000>;
478   - hactive = <1024>;
479   - vactive = <768>;
480   - hback-porch = <220>;
481   - hfront-porch = <40>;
482   - vback-porch = <21>;
483   - vfront-porch = <7>;
484   - hsync-len = <60>;
485   - vsync-len = <10>;
486   - };
487   - };
488   - };
489   -
490   - lvds-channel@1 {
491   - fsl,data-mapping = "spwg";
492   - fsl,data-width = <18>;
493   - primary;
494   - status = "okay";
495   -
496   - display-timings {
497   - native-mode = <&timing1>;
498   - timing1: hsd100pxn1 {
499   - clock-frequency = <65000000>;
500   - hactive = <1024>;
501   - vactive = <768>;
502   - hback-porch = <220>;
503   - hfront-porch = <40>;
504   - vback-porch = <21>;
505   - vfront-porch = <7>;
506   - hsync-len = <60>;
507   - vsync-len = <10>;
508   - };
509   - };
510   - };
511   -};
512   -
513 479 &mipi_csi {
514   - status = "okay";
  480 + status = "disabled";
515 481 ipu_id = <0>;
516 482 csi_id = <1>;
517 483 v_channel = <0>;
518   - lanes = <2>;
  484 + resets = <&mipi_csi_reset>;
  485 + lanes = <4>;
519 486 };
520 487  
521   -&mipi_dsi {
522   - dev_id = <0>;
523   - disp_id = <1>;
524   - lcd_panel = "TRULY-WVGA";
525   - disp-power-on-supply = <&reg_mipi_dsi_pwr_on>;
526   - resets = <&mipi_dsi_reset>;
527   - status = "okay";
528   -};
529   -
530 488 &dcic1 {
531 489 dcic_id = <0>;
532 490 dcic_mux = "dcic-hdmi";
533 491  
534 492  
... ... @@ -540,12 +498,24 @@
540 498 };
541 499  
542 500 &pcie {
543   - power-on-gpio = <&gpio3 19 0>;
544   - reset-gpio = <&gpio7 12 0>;
545   - status = "okay";
  501 + /*power-on-gpio = <&gpio1 17 0>;*/
  502 + reset-gpio = <&gpio1 20 0>;
  503 + reset-delay-us = <50>;
  504 + status = "okay";
546 505 };
547 506  
  507 +&spdif {
  508 + pinctrl-names = "default";
  509 + pinctrl-0 = <&pinctrl_spdif_2>;
  510 + status = "okay";
  511 +};
548 512  
  513 +&pwm1 {
  514 + pinctrl-names = "default";
  515 + pinctrl-0 = <&pinctrl_pwm1_1>;
  516 + status = "okay";
  517 +};
  518 +
549 519 &pwm2 {
550 520 pinctrl-names = "default";
551 521 pinctrl-0 = <&pinctrl_pwm2_1>;
552 522  
... ... @@ -583,17 +553,17 @@
583 553  
584 554  
585 555 &usbh1 {
586   - gpios = <&gpio1 26 1>;
587   - gpios = <&gpio1 27 2>;
  556 + vbus-supply = <&reg_usb_h1_vbus>;
  557 + gpios = <&gpio1 26 1>, <&gpio1 27 2>;
588 558 status = "okay";
589 559 };
590 560  
591 561 &usbotg {
592   - pinctrl-names = "default";
593   - pinctrl-0 = <&pinctrl_usbotg_2>;
594   - gpios = <&gpio1 29 1>;
595   - gpios = <&gpio1 30 2>;
596   - /*disable-over-current;*/
  562 + vbus-supply = <&reg_usb_otg_vbus>;
  563 + pinctrl-names = "default";
  564 + pinctrl-0 = <&pinctrl_usbotg_2>;
  565 + gpios = <&gpio1 29 1>, <&gpio1 30 2>;
  566 + disable-over-current;
597 567 status = "okay";
598 568 };
599 569  
... ... @@ -616,7 +586,7 @@
616 586 no-1-8-v;
617 587 keep-power-in-suspend;
618 588 enable-sdio-wakeup;
619   - status = "okay";
  589 + status = "disabled";
620 590 };
621 591  
622 592 &usdhc4 {
... ... @@ -639,9 +609,5 @@
639 609 pinctrl-names = "default";
640 610 pinctrl-0 = <&pinctrl_flexcan2_1>;
641 611 status = "okay";
642   -};
643   -
644   -&vpu {
645   - pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
646 612 };
arch/arm/configs/smarcfimx6_defconfig
Diff comments   View file @ 8f7b130
Changes suppressed. Click to show
... ... @@ -144,6 +144,7 @@
144 144 CONFIG_EVENTFD=y
145 145 CONFIG_SHMEM=y
146 146 CONFIG_AIO=y
  147 +CONFIG_PCI_QUIRKS=y
147 148 # CONFIG_EMBEDDED is not set
148 149 CONFIG_HAVE_PERF_EVENTS=y
149 150 CONFIG_PERF_USE_VMALLOC=y
150 151  
... ... @@ -403,9 +404,37 @@
403 404 #
404 405 # Bus support
405 406 #
406   -# CONFIG_PCI is not set
407   -# CONFIG_PCI_SYSCALL is not set
  407 +CONFIG_PCI=y
  408 +CONFIG_PCI_DOMAINS=y
  409 +CONFIG_PCI_SYSCALL=y
408 410 CONFIG_ARCH_SUPPORTS_MSI=y
  411 +CONFIG_PCI_MSI=y
  412 +# CONFIG_PCI_DEBUG is not set
  413 +CONFIG_PCI_REALLOC_ENABLE_AUTO=y
  414 +CONFIG_PCI_STUB=y
  415 +CONFIG_PCI_ATS=y
  416 +CONFIG_PCI_IOV=y
  417 +CONFIG_PCI_PRI=y
  418 +CONFIG_PCI_PASID=y
  419 +
  420 +#
  421 +# PCI host controller drivers
  422 +#
  423 +CONFIG_PCIE_DW=y
  424 +CONFIG_PCI_IMX6=y
  425 +# CONFIG_PCI_IMX6SX_EXTREMELY_PWR_SAVE is not set
  426 +# CONFIG_EP_MODE_IN_EP_RC_SYS is not set
  427 +# CONFIG_RC_MODE_IN_EP_RC_SYS is not set
  428 +CONFIG_PCIEPORTBUS=y
  429 +CONFIG_PCIEAER=y
  430 +CONFIG_PCIE_ECRC=y
  431 +CONFIG_PCIEAER_INJECT=y
  432 +CONFIG_PCIEASPM=y
  433 +# CONFIG_PCIEASPM_DEBUG is not set
  434 +CONFIG_PCIEASPM_DEFAULT=y
  435 +# CONFIG_PCIEASPM_POWERSAVE is not set
  436 +# CONFIG_PCIEASPM_PERFORMANCE is not set
  437 +CONFIG_PCIE_PME=y
409 438 # CONFIG_PCCARD is not set
410 439  
411 440 #
... ... @@ -696,6 +725,7 @@
696 725 # CONFIG_CAN_MCP251X is not set
697 726 CONFIG_HAVE_CAN_FLEXCAN=y
698 727 CONFIG_CAN_FLEXCAN=y
  728 +# CONFIG_PCH_CAN is not set
699 729 # CONFIG_CAN_GRCAN is not set
700 730 CONFIG_CAN_M_CAN=y
701 731 # CONFIG_CAN_SJA1000 is not set
... ... @@ -713,7 +743,31 @@
713 743 # CONFIG_CAN_SOFTING is not set
714 744 # CONFIG_CAN_DEBUG_DEVICES is not set
715 745 # CONFIG_IRDA is not set
716   -# CONFIG_BT is not set
  746 +CONFIG_BT=y
  747 +CONFIG_BT_RFCOMM=y
  748 +CONFIG_BT_RFCOMM_TTY=y
  749 +CONFIG_BT_BNEP=y
  750 +CONFIG_BT_BNEP_MC_FILTER=y
  751 +CONFIG_BT_BNEP_PROTO_FILTER=y
  752 +CONFIG_BT_HIDP=y
  753 +
  754 +#
  755 +# Bluetooth device drivers
  756 +#
  757 +CONFIG_BT_HCIBTUSB=y
  758 +CONFIG_BT_HCIBTSDIO=y
  759 +CONFIG_BT_HCIUART=y
  760 +CONFIG_BT_HCIUART_H4=y
  761 +CONFIG_BT_HCIUART_BCSP=y
  762 +CONFIG_BT_HCIUART_ATH3K=y
  763 +# CONFIG_BT_HCIUART_LL is not set
  764 +# CONFIG_BT_HCIUART_3WIRE is not set
  765 +CONFIG_BT_HCIBCM203X=y
  766 +# CONFIG_BT_HCIBPA10X is not set
  767 +# CONFIG_BT_HCIBFUSB is not set
  768 +# CONFIG_BT_HCIVHCI is not set
  769 +# CONFIG_BT_MRVL is not set
  770 +CONFIG_BT_ATH3K=y
717 771 # CONFIG_AF_RXRPC is not set
718 772 CONFIG_WIRELESS=y
719 773 CONFIG_WEXT_CORE=y
... ... @@ -736,7 +790,7 @@
736 790 CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
737 791 CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
738 792 # CONFIG_MAC80211_MESH is not set
739   -# CONFIG_MAC80211_LEDS is not set
  793 +CONFIG_MAC80211_LEDS=y
740 794 # CONFIG_MAC80211_DEBUGFS is not set
741 795 # CONFIG_MAC80211_MESSAGE_TRACING is not set
742 796 # CONFIG_MAC80211_DEBUG_MENU is not set
743 797  
... ... @@ -850,11 +904,13 @@
850 904 # CONFIG_MTD_PHYSMAP is not set
851 905 CONFIG_MTD_PHYSMAP_OF=y
852 906 # CONFIG_MTD_IMPA7 is not set
  907 +# CONFIG_MTD_INTEL_VR_NOR is not set
853 908 # CONFIG_MTD_PLATRAM is not set
854 909  
855 910 #
856 911 # Self-contained MTD device drivers
857 912 #
  913 +# CONFIG_MTD_PMC551 is not set
858 914 CONFIG_MTD_DATAFLASH=y
859 915 # CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set
860 916 # CONFIG_MTD_DATAFLASH_OTP is not set
861 917  
... ... @@ -877,8 +933,10 @@
877 933 # CONFIG_MTD_NAND_DENALI is not set
878 934 # CONFIG_MTD_NAND_GPIO is not set
879 935 CONFIG_MTD_NAND_IDS=y
  936 +# CONFIG_MTD_NAND_RICOH is not set
880 937 # CONFIG_MTD_NAND_DISKONCHIP is not set
881 938 # CONFIG_MTD_NAND_DOCG4 is not set
  939 +# CONFIG_MTD_NAND_CAFE is not set
882 940 # CONFIG_MTD_NAND_NANDSIM is not set
883 941 CONFIG_MTD_NAND_GPMI_NAND=y
884 942 # CONFIG_MTD_NAND_PLATFORM is not set
885 943  
886 944  
... ... @@ -913,15 +971,23 @@
913 971 CONFIG_OF_I2C=y
914 972 CONFIG_OF_NET=y
915 973 CONFIG_OF_MDIO=y
  974 +CONFIG_OF_PCI=y
  975 +CONFIG_OF_PCI_IRQ=y
916 976 CONFIG_OF_MTD=y
917 977 # CONFIG_PARPORT is not set
918 978 CONFIG_BLK_DEV=y
  979 +# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
  980 +# CONFIG_BLK_CPQ_CISS_DA is not set
  981 +# CONFIG_BLK_DEV_DAC960 is not set
  982 +# CONFIG_BLK_DEV_UMEM is not set
919 983 # CONFIG_BLK_DEV_COW_COMMON is not set
920 984 CONFIG_BLK_DEV_LOOP=y
921 985 CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
922 986 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
923 987 # CONFIG_BLK_DEV_DRBD is not set
924 988 # CONFIG_BLK_DEV_NBD is not set
  989 +# CONFIG_BLK_DEV_NVME is not set
  990 +# CONFIG_BLK_DEV_SX8 is not set
925 991 CONFIG_BLK_DEV_RAM=y
926 992 CONFIG_BLK_DEV_RAM_COUNT=16
927 993 CONFIG_BLK_DEV_RAM_SIZE=65536
... ... @@ -930,6 +996,7 @@
930 996 # CONFIG_ATA_OVER_ETH is not set
931 997 # CONFIG_MG_DISK is not set
932 998 # CONFIG_BLK_DEV_RBD is not set
  999 +# CONFIG_BLK_DEV_RSXX is not set
933 1000  
934 1001 #
935 1002 # Misc devices
936 1003  
... ... @@ -938,9 +1005,14 @@
938 1005 # CONFIG_AD525X_DPOT is not set
939 1006 # CONFIG_ATMEL_PWM is not set
940 1007 # CONFIG_DUMMY_IRQ is not set
  1008 +# CONFIG_PHANTOM is not set
  1009 +# CONFIG_INTEL_MID_PTI is not set
  1010 +# CONFIG_SGI_IOC4 is not set
  1011 +# CONFIG_TIFM_CORE is not set
941 1012 # CONFIG_ICS932S401 is not set
942 1013 # CONFIG_ATMEL_SSC is not set
943 1014 # CONFIG_ENCLOSURE_SERVICES is not set
  1015 +# CONFIG_HP_ILO is not set
944 1016 # CONFIG_APDS9802ALS is not set
945 1017 # CONFIG_ISL29003 is not set
946 1018 # CONFIG_ISL29020 is not set
... ... @@ -953,6 +1025,7 @@
953 1025 # CONFIG_TI_DAC7512 is not set
954 1026 # CONFIG_BMP085_I2C is not set
955 1027 # CONFIG_BMP085_SPI is not set
  1028 +# CONFIG_PCH_PHUB is not set
956 1029 # CONFIG_USB_SWITCH_FSA9480 is not set
957 1030 # CONFIG_LATTICE_ECP3_CONFIG is not set
958 1031 CONFIG_SRAM=y
... ... @@ -967,6 +1040,7 @@
967 1040 # CONFIG_EEPROM_MAX6875 is not set
968 1041 # CONFIG_EEPROM_93CX6 is not set
969 1042 # CONFIG_EEPROM_93XX46 is not set
  1043 +# CONFIG_CB710_CORE is not set
970 1044  
971 1045 #
972 1046 # Texas Instruments shared transport line discipline
... ... @@ -979,6 +1053,8 @@
979 1053 # Altera FPGA firmware download module
980 1054 #
981 1055 # CONFIG_ALTERA_STAPL is not set
  1056 +CONFIG_HAVE_IDE=y
  1057 +# CONFIG_IDE is not set
982 1058  
983 1059 #
984 1060 # SCSI device support
985 1061  
986 1062  
987 1063  
988 1064  
989 1065  
990 1066  
991 1067  
992 1068  
993 1069  
994 1070  
995 1071  
996 1072  
... ... @@ -1025,42 +1101,111 @@
1025 1101 #
1026 1102 # Controllers with non-SFF native interface
1027 1103 #
  1104 +# CONFIG_SATA_AHCI is not set
1028 1105 CONFIG_SATA_AHCI_PLATFORM=y
1029 1106 CONFIG_AHCI_IMX=y
  1107 +# CONFIG_SATA_INIC162X is not set
  1108 +# CONFIG_SATA_ACARD_AHCI is not set
  1109 +# CONFIG_SATA_SIL24 is not set
1030 1110 CONFIG_ATA_SFF=y
1031 1111  
1032 1112 #
1033 1113 # SFF controllers with custom DMA interface
1034 1114 #
  1115 +# CONFIG_PDC_ADMA is not set
  1116 +# CONFIG_SATA_QSTOR is not set
  1117 +# CONFIG_SATA_SX4 is not set
1035 1118 CONFIG_ATA_BMDMA=y
1036 1119  
1037 1120 #
1038 1121 # SATA SFF controllers with BMDMA
1039 1122 #
  1123 +# CONFIG_ATA_PIIX is not set
1040 1124 # CONFIG_SATA_HIGHBANK is not set
1041 1125 # CONFIG_SATA_MV is not set
  1126 +# CONFIG_SATA_NV is not set
  1127 +# CONFIG_SATA_PROMISE is not set
  1128 +# CONFIG_SATA_SIL is not set
  1129 +# CONFIG_SATA_SIS is not set
  1130 +# CONFIG_SATA_SVW is not set
  1131 +# CONFIG_SATA_ULI is not set
  1132 +# CONFIG_SATA_VIA is not set
  1133 +# CONFIG_SATA_VITESSE is not set
1042 1134  
1043 1135 #
1044 1136 # PATA SFF controllers with BMDMA
1045 1137 #
  1138 +# CONFIG_PATA_ALI is not set
  1139 +# CONFIG_PATA_AMD is not set
1046 1140 # CONFIG_PATA_ARASAN_CF is not set
  1141 +# CONFIG_PATA_ARTOP is not set
  1142 +# CONFIG_PATA_ATIIXP is not set
  1143 +# CONFIG_PATA_ATP867X is not set
  1144 +# CONFIG_PATA_CMD64X is not set
  1145 +# CONFIG_PATA_CS5520 is not set
  1146 +# CONFIG_PATA_CS5530 is not set
  1147 +# CONFIG_PATA_CS5536 is not set
  1148 +# CONFIG_PATA_CYPRESS is not set
  1149 +# CONFIG_PATA_EFAR is not set
  1150 +# CONFIG_PATA_HPT366 is not set
  1151 +# CONFIG_PATA_HPT37X is not set
  1152 +# CONFIG_PATA_HPT3X2N is not set
  1153 +# CONFIG_PATA_HPT3X3 is not set
1047 1154 CONFIG_PATA_IMX=y
  1155 +# CONFIG_PATA_IT8213 is not set
  1156 +# CONFIG_PATA_IT821X is not set
  1157 +# CONFIG_PATA_JMICRON is not set
  1158 +# CONFIG_PATA_MARVELL is not set
  1159 +# CONFIG_PATA_NETCELL is not set
  1160 +# CONFIG_PATA_NINJA32 is not set
  1161 +# CONFIG_PATA_NS87415 is not set
  1162 +# CONFIG_PATA_OLDPIIX is not set
  1163 +# CONFIG_PATA_OPTIDMA is not set
  1164 +# CONFIG_PATA_PDC2027X is not set
  1165 +# CONFIG_PATA_PDC_OLD is not set
  1166 +# CONFIG_PATA_RADISYS is not set
  1167 +# CONFIG_PATA_RDC is not set
  1168 +# CONFIG_PATA_SC1200 is not set
  1169 +# CONFIG_PATA_SCH is not set
  1170 +# CONFIG_PATA_SERVERWORKS is not set
  1171 +# CONFIG_PATA_SIL680 is not set
  1172 +# CONFIG_PATA_SIS is not set
  1173 +# CONFIG_PATA_TOSHIBA is not set
  1174 +# CONFIG_PATA_TRIFLEX is not set
  1175 +# CONFIG_PATA_VIA is not set
  1176 +# CONFIG_PATA_WINBOND is not set
1048 1177  
1049 1178 #
1050 1179 # PIO-only SFF controllers
1051 1180 #
  1181 +# CONFIG_PATA_CMD640_PCI is not set
  1182 +# CONFIG_PATA_MPIIX is not set
  1183 +# CONFIG_PATA_NS87410 is not set
  1184 +# CONFIG_PATA_OPTI is not set
1052 1185 # CONFIG_PATA_PLATFORM is not set
  1186 +# CONFIG_PATA_RZ1000 is not set
1053 1187  
1054 1188 #
1055 1189 # Generic fallback / legacy drivers
1056 1190 #
  1191 +# CONFIG_ATA_GENERIC is not set
  1192 +# CONFIG_PATA_LEGACY is not set
1057 1193 # CONFIG_MD is not set
1058 1194 # CONFIG_TARGET_CORE is not set
  1195 +# CONFIG_FUSION is not set
  1196 +
  1197 +#
  1198 +# IEEE 1394 (FireWire) support
  1199 +#
  1200 +# CONFIG_FIREWIRE is not set
  1201 +# CONFIG_FIREWIRE_NOSY is not set
  1202 +# CONFIG_I2O is not set
1059 1203 CONFIG_NETDEVICES=y
1060 1204 CONFIG_NET_CORE=y
1061 1205 # CONFIG_BONDING is not set
1062 1206 # CONFIG_DUMMY is not set
1063 1207 # CONFIG_EQUALIZER is not set
  1208 +# CONFIG_NET_FC is not set
1064 1209 CONFIG_MII=y
1065 1210 # CONFIG_NET_TEAM is not set
1066 1211 # CONFIG_MACVLAN is not set
... ... @@ -1070,6 +1215,7 @@
1070 1215 # CONFIG_NET_POLL_CONTROLLER is not set
1071 1216 # CONFIG_TUN is not set
1072 1217 # CONFIG_VETH is not set
  1218 +# CONFIG_ARCNET is not set
1073 1219  
1074 1220 #
1075 1221 # CAIF transport drivers
1076 1222  
1077 1223  
1078 1224  
1079 1225  
1080 1226  
1081 1227  
1082 1228  
1083 1229  
1084 1230  
1085 1231  
1086 1232  
1087 1233  
1088 1234  
... ... @@ -1084,27 +1230,114 @@
1084 1230 # CONFIG_NET_DSA_MV88E6131 is not set
1085 1231 # CONFIG_NET_DSA_MV88E6123_61_65 is not set
1086 1232 CONFIG_ETHERNET=y
  1233 +CONFIG_NET_VENDOR_3COM=y
  1234 +# CONFIG_VORTEX is not set
  1235 +# CONFIG_TYPHOON is not set
  1236 +CONFIG_NET_VENDOR_ADAPTEC=y
  1237 +# CONFIG_ADAPTEC_STARFIRE is not set
  1238 +CONFIG_NET_VENDOR_ALTEON=y
  1239 +# CONFIG_ACENIC is not set
  1240 +CONFIG_NET_VENDOR_AMD=y
  1241 +# CONFIG_AMD8111_ETH is not set
  1242 +# CONFIG_PCNET32 is not set
  1243 +CONFIG_NET_VENDOR_ATHEROS=y
  1244 +# CONFIG_ATL2 is not set
  1245 +# CONFIG_ATL1 is not set
  1246 +# CONFIG_ATL1E is not set
  1247 +# CONFIG_ATL1C is not set
  1248 +# CONFIG_ALX is not set
1087 1249 CONFIG_NET_CADENCE=y
1088 1250 # CONFIG_ARM_AT91_ETHER is not set
1089 1251 # CONFIG_MACB is not set
1090 1252 # CONFIG_NET_VENDOR_BROADCOM is not set
  1253 +CONFIG_NET_VENDOR_BROCADE=y
  1254 +# CONFIG_BNA is not set
1091 1255 # CONFIG_NET_CALXEDA_XGMAC is not set
  1256 +CONFIG_NET_VENDOR_CHELSIO=y
  1257 +# CONFIG_CHELSIO_T1 is not set
  1258 +# CONFIG_CHELSIO_T3 is not set
  1259 +# CONFIG_CHELSIO_T4 is not set
  1260 +# CONFIG_CHELSIO_T4VF is not set
1092 1261 # CONFIG_NET_VENDOR_CIRRUS is not set
  1262 +CONFIG_NET_VENDOR_CISCO=y
  1263 +# CONFIG_ENIC is not set
1093 1264 # CONFIG_DM9000 is not set
1094 1265 # CONFIG_DNET is not set
  1266 +CONFIG_NET_VENDOR_DEC=y
  1267 +# CONFIG_NET_TULIP is not set
  1268 +CONFIG_NET_VENDOR_DLINK=y
  1269 +# CONFIG_DL2K is not set
  1270 +# CONFIG_SUNDANCE is not set
  1271 +CONFIG_NET_VENDOR_EMULEX=y
  1272 +# CONFIG_BE2NET is not set
  1273 +CONFIG_NET_VENDOR_EXAR=y
  1274 +# CONFIG_S2IO is not set
  1275 +# CONFIG_VXGE is not set
1095 1276 # CONFIG_NET_VENDOR_FARADAY is not set
1096 1277 CONFIG_NET_VENDOR_FREESCALE=y
1097 1278 CONFIG_FEC=y
  1279 +CONFIG_NET_VENDOR_HP=y
  1280 +# CONFIG_HP100 is not set
1098 1281 # CONFIG_NET_VENDOR_INTEL is not set
  1282 +# CONFIG_IP1000 is not set
  1283 +# CONFIG_JME is not set
1099 1284 # CONFIG_NET_VENDOR_MARVELL is not set
  1285 +CONFIG_NET_VENDOR_MELLANOX=y
  1286 +# CONFIG_MLX4_EN is not set
  1287 +# CONFIG_MLX4_CORE is not set
1100 1288 # CONFIG_NET_VENDOR_MICREL is not set
1101 1289 # CONFIG_NET_VENDOR_MICROCHIP is not set
  1290 +CONFIG_NET_VENDOR_MYRI=y
  1291 +# CONFIG_MYRI10GE is not set
  1292 +# CONFIG_FEALNX is not set
1102 1293 # CONFIG_NET_VENDOR_NATSEMI is not set
  1294 +CONFIG_NET_VENDOR_NVIDIA=y
  1295 +# CONFIG_FORCEDETH is not set
  1296 +CONFIG_NET_VENDOR_OKI=y
  1297 +# CONFIG_PCH_GBE is not set
1103 1298 # CONFIG_ETHOC is not set
  1299 +CONFIG_NET_PACKET_ENGINE=y
  1300 +# CONFIG_HAMACHI is not set
  1301 +# CONFIG_YELLOWFIN is not set
  1302 +CONFIG_NET_VENDOR_QLOGIC=y
  1303 +# CONFIG_QLA3XXX is not set
  1304 +# CONFIG_QLCNIC is not set
  1305 +# CONFIG_QLGE is not set
  1306 +# CONFIG_NETXEN_NIC is not set
  1307 +CONFIG_NET_VENDOR_REALTEK=y
  1308 +# CONFIG_8139CP is not set
  1309 +CONFIG_8139TOO=y
  1310 +CONFIG_8139TOO_PIO=y
  1311 +# CONFIG_8139TOO_TUNE_TWISTER is not set
  1312 +# CONFIG_8139TOO_8129 is not set
  1313 +# CONFIG_8139_OLD_RX_RESET is not set
  1314 +CONFIG_R8169=y
  1315 +CONFIG_NET_VENDOR_RDC=y
  1316 +# CONFIG_R6040 is not set
1104 1317 # CONFIG_NET_VENDOR_SEEQ is not set
  1318 +CONFIG_NET_VENDOR_SILAN=y
  1319 +# CONFIG_SC92031 is not set
  1320 +CONFIG_NET_VENDOR_SIS=y
  1321 +# CONFIG_SIS900 is not set
  1322 +# CONFIG_SIS190 is not set
  1323 +# CONFIG_SFC is not set
1105 1324 # CONFIG_NET_VENDOR_SMSC is not set
1106 1325 # CONFIG_NET_VENDOR_STMICRO is not set
  1326 +CONFIG_NET_VENDOR_SUN=y
  1327 +# CONFIG_HAPPYMEAL is not set
  1328 +# CONFIG_SUNGEM is not set
  1329 +# CONFIG_CASSINI is not set
  1330 +# CONFIG_NIU is not set
  1331 +CONFIG_NET_VENDOR_TEHUTI=y
  1332 +# CONFIG_TEHUTI is not set
  1333 +CONFIG_NET_VENDOR_TI=y
  1334 +# CONFIG_TLAN is not set
  1335 +CONFIG_NET_VENDOR_VIA=y
  1336 +# CONFIG_VIA_RHINE is not set
  1337 +# CONFIG_VIA_VELOCITY is not set
1107 1338 # CONFIG_NET_VENDOR_WIZNET is not set
  1339 +# CONFIG_FDDI is not set
  1340 +# CONFIG_HIPPI is not set
1108 1341 CONFIG_PHYLIB=y
1109 1342  
1110 1343 #
1111 1344  
1112 1345  
1113 1346  
1114 1347  
1115 1348  
1116 1349  
1117 1350  
1118 1351  
1119 1352  
... ... @@ -1175,26 +1408,45 @@
1175 1408 # CONFIG_USB_VL600 is not set
1176 1409 CONFIG_WLAN=y
1177 1410 # CONFIG_LIBERTAS_THINFIRM is not set
  1411 +# CONFIG_ATMEL is not set
1178 1412 # CONFIG_AT76C50X_USB is not set
  1413 +# CONFIG_PRISM54 is not set
1179 1414 # CONFIG_USB_ZD1201 is not set
1180 1415 # CONFIG_USB_NET_RNDIS_WLAN is not set
  1416 +# CONFIG_RTL8180 is not set
1181 1417 # CONFIG_RTL8187 is not set
  1418 +# CONFIG_ADM8211 is not set
1182 1419 # CONFIG_MAC80211_HWSIM is not set
  1420 +# CONFIG_MWL8K is not set
  1421 +CONFIG_ATH_COMMON=m
1183 1422 CONFIG_ATH_CARDS=y
1184 1423 # CONFIG_ATH_DEBUG is not set
1185   -# CONFIG_ATH9K is not set
  1424 +# CONFIG_ATH5K is not set
  1425 +# CONFIG_ATH5K_PCI is not set
  1426 +CONFIG_ATH9K_HW=m
  1427 +CONFIG_ATH9K_COMMON=m
  1428 +# CONFIG_ATH9K_BTCOEX_SUPPORT is not set
  1429 +CONFIG_ATH9K=m
  1430 +CONFIG_ATH9K_PCI=y
  1431 +# CONFIG_ATH9K_AHB is not set
  1432 +# CONFIG_ATH9K_DEBUGFS is not set
  1433 +CONFIG_ATH9K_LEGACY_RATE_CONTROL=y
1186 1434 # CONFIG_ATH9K_HTC is not set
1187 1435 # CONFIG_CARL9170 is not set
1188   -CONFIG_ATH6KL=m
1189   -CONFIG_ATH6KL_SDIO=m
1190   -# CONFIG_ATH6KL_USB is not set
1191   -# CONFIG_ATH6KL_DEBUG is not set
  1436 +# CONFIG_ATH6KL is not set
1192 1437 # CONFIG_AR5523 is not set
  1438 +# CONFIG_WIL6210 is not set
1193 1439 # CONFIG_B43 is not set
1194 1440 # CONFIG_B43LEGACY is not set
1195 1441 # CONFIG_BRCMFMAC is not set
1196 1442 # CONFIG_HOSTAP is not set
  1443 +# CONFIG_IPW2100 is not set
  1444 +# CONFIG_IPW2200 is not set
  1445 +# CONFIG_IWLWIFI is not set
  1446 +# CONFIG_IWL4965 is not set
  1447 +# CONFIG_IWL3945 is not set
1197 1448 # CONFIG_LIBERTAS is not set
  1449 +# CONFIG_HERMES is not set
1198 1450 # CONFIG_P54_COMMON is not set
1199 1451 # CONFIG_RT2X00 is not set
1200 1452 # CONFIG_RTLWIFI is not set
... ... @@ -1206,6 +1458,7 @@
1206 1458 # Enable WiMAX (Networking options) to see the WiMAX drivers
1207 1459 #
1208 1460 # CONFIG_WAN is not set
  1461 +# CONFIG_VMXNET3 is not set
1209 1462 # CONFIG_ISDN is not set
1210 1463  
1211 1464 #
... ... @@ -1346,6 +1599,7 @@
1346 1599 #
1347 1600 CONFIG_SERIO=y
1348 1601 CONFIG_SERIO_SERPORT=m
  1602 +# CONFIG_SERIO_PCIPS2 is not set
1349 1603 CONFIG_SERIO_LIBPS2=y
1350 1604 # CONFIG_SERIO_RAW is not set
1351 1605 # CONFIG_SERIO_ALTERA_PS2 is not set
... ... @@ -1368,6 +1622,7 @@
1368 1622 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
1369 1623 # CONFIG_LEGACY_PTYS is not set
1370 1624 # CONFIG_SERIAL_NONSTANDARD is not set
  1625 +# CONFIG_NOZOMI is not set
1371 1626 # CONFIG_N_GSM is not set
1372 1627 # CONFIG_TRACE_SINK is not set
1373 1628 # CONFIG_DEVKMEM is not set
1374 1629  
1375 1630  
1376 1631  
... ... @@ -1382,17 +1637,21 @@
1382 1637 #
1383 1638 # CONFIG_SERIAL_MAX3100 is not set
1384 1639 # CONFIG_SERIAL_MAX310X is not set
  1640 +# CONFIG_SERIAL_MFD_HSU is not set
1385 1641 CONFIG_SERIAL_IMX=y
1386 1642 CONFIG_SERIAL_IMX_CONSOLE=y
1387 1643 CONFIG_SERIAL_CORE=y
1388 1644 CONFIG_SERIAL_CORE_CONSOLE=y
  1645 +# CONFIG_SERIAL_JSM is not set
1389 1646 # CONFIG_SERIAL_SCCNXP is not set
1390 1647 # CONFIG_SERIAL_TIMBERDALE is not set
1391 1648 # CONFIG_SERIAL_ALTERA_JTAGUART is not set
1392 1649 # CONFIG_SERIAL_ALTERA_UART is not set
1393 1650 # CONFIG_SERIAL_IFX6X60 is not set
  1651 +# CONFIG_SERIAL_PCH_UART is not set
1394 1652 # CONFIG_SERIAL_XILINX_PS_UART is not set
1395 1653 # CONFIG_SERIAL_ARC is not set
  1654 +# CONFIG_SERIAL_RP2 is not set
1396 1655 CONFIG_SERIAL_FSL_LPUART=y
1397 1656 CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
1398 1657 # CONFIG_TTY_PRINTK is not set
1399 1658  
... ... @@ -1405,8 +1664,10 @@
1405 1664 # CONFIG_HW_RANDOM_IMX_RNG is not set
1406 1665 # CONFIG_HW_RANDOM_EXYNOS is not set
1407 1666 # CONFIG_R3964 is not set
  1667 +# CONFIG_APPLICOM is not set
1408 1668 # CONFIG_RAW_DRIVER is not set
1409 1669 # CONFIG_TCG_TPM is not set
  1670 +CONFIG_DEVPORT=y
1410 1671 CONFIG_MXS_VIIM=y
1411 1672 # CONFIG_XILLYBUS is not set
1412 1673 CONFIG_IMX_SEMA4=y
... ... @@ -1426,7 +1687,7 @@
1426 1687 CONFIG_I2C_MUX_PCA954x=y
1427 1688 # CONFIG_I2C_MUX_PINCTRL is not set
1428 1689 # CONFIG_I2C_HELPER_AUTO is not set
1429   -# CONFIG_I2C_SMBUS is not set
  1690 +CONFIG_I2C_SMBUS=y
1430 1691  
1431 1692 #
1432 1693 # I2C Algorithms
1433 1694  
1434 1695  
... ... @@ -1440,12 +1701,33 @@
1440 1701 #
1441 1702  
1442 1703 #
  1704 +# PC SMBus host controller drivers
  1705 +#
  1706 +# CONFIG_I2C_ALI1535 is not set
  1707 +# CONFIG_I2C_ALI1563 is not set
  1708 +# CONFIG_I2C_ALI15X3 is not set
  1709 +# CONFIG_I2C_AMD756 is not set
  1710 +# CONFIG_I2C_AMD8111 is not set
  1711 +# CONFIG_I2C_I801 is not set
  1712 +# CONFIG_I2C_ISCH is not set
  1713 +# CONFIG_I2C_PIIX4 is not set
  1714 +# CONFIG_I2C_NFORCE2 is not set
  1715 +# CONFIG_I2C_SIS5595 is not set
  1716 +# CONFIG_I2C_SIS630 is not set
  1717 +# CONFIG_I2C_SIS96X is not set
  1718 +# CONFIG_I2C_VIA is not set
  1719 +# CONFIG_I2C_VIAPRO is not set
  1720 +
  1721 +#
1443 1722 # I2C system bus drivers (mostly embedded / system-on-chip)
1444 1723 #
1445 1724 # CONFIG_I2C_CBUS_GPIO is not set
1446 1725 # CONFIG_I2C_DESIGNWARE_PLATFORM is not set
  1726 +# CONFIG_I2C_DESIGNWARE_PCI is not set
  1727 +# CONFIG_I2C_EG20T is not set
1447 1728 # CONFIG_I2C_GPIO is not set
1448 1729 CONFIG_I2C_IMX=y
  1730 +# CONFIG_I2C_INTEL_MID is not set
1449 1731 # CONFIG_I2C_OCORES is not set
1450 1732 # CONFIG_I2C_PCA_PLATFORM is not set
1451 1733 # CONFIG_I2C_PXA_PCI is not set
1452 1734  
... ... @@ -1480,8 +1762,10 @@
1480 1762 CONFIG_SPI_IMX=y
1481 1763 # CONFIG_SPI_FSL_SPI is not set
1482 1764 # CONFIG_SPI_OC_TINY is not set
  1765 +# CONFIG_SPI_PXA2XX is not set
1483 1766 # CONFIG_SPI_PXA2XX_PCI is not set
1484 1767 # CONFIG_SPI_SC18IS602 is not set
  1768 +# CONFIG_SPI_TOPCLIFF_PCH is not set
1485 1769 # CONFIG_SPI_XCOMM is not set
1486 1770 # CONFIG_SPI_XILINX is not set
1487 1771 # CONFIG_SPI_DESIGNWARE is not set
... ... @@ -1560,6 +1844,7 @@
1560 1844 CONFIG_GPIO_MXC=y
1561 1845 # CONFIG_GPIO_RCAR is not set
1562 1846 # CONFIG_GPIO_TS5500 is not set
  1847 +# CONFIG_GPIO_VX855 is not set
1563 1848 # CONFIG_GPIO_GRGPIO is not set
1564 1849  
1565 1850 #
... ... @@ -1577,6 +1862,10 @@
1577 1862 #
1578 1863 # PCI GPIO expanders:
1579 1864 #
  1865 +# CONFIG_GPIO_BT8XX is not set
  1866 +# CONFIG_GPIO_AMD8111 is not set
  1867 +# CONFIG_GPIO_ML_IOH is not set
  1868 +# CONFIG_GPIO_RDC321X is not set
1580 1869  
1581 1870 #
1582 1871 # SPI GPIO expanders:
... ... @@ -1618,6 +1907,7 @@
1618 1907 # CONFIG_CHARGER_GPIO is not set
1619 1908 # CONFIG_CHARGER_MANAGER is not set
1620 1909 # CONFIG_CHARGER_BQ2415X is not set
  1910 +CONFIG_CHARGER_BQ2477X=y
1621 1911 # CONFIG_CHARGER_SMB347 is not set
1622 1912 # CONFIG_BATTERY_GOLDFISH is not set
1623 1913 CONFIG_IMX6_USB_CHARGER=y
... ... @@ -1652,6 +1942,7 @@
1652 1942 # CONFIG_SENSORS_DS620 is not set
1653 1943 # CONFIG_SENSORS_DS1621 is not set
1654 1944 # CONFIG_SENSORS_DA9052_ADC is not set
  1945 +# CONFIG_SENSORS_I5K_AMB is not set
1655 1946 # CONFIG_SENSORS_F71805F is not set
1656 1947 # CONFIG_SENSORS_F71882FG is not set
1657 1948 # CONFIG_SENSORS_F75375S is not set
... ... @@ -1703,6 +1994,7 @@
1703 1994 # CONFIG_PMBUS is not set
1704 1995 # CONFIG_SENSORS_SHT15 is not set
1705 1996 # CONFIG_SENSORS_SHT21 is not set
  1997 +# CONFIG_SENSORS_SIS5595 is not set
1706 1998 # CONFIG_SENSORS_SMM665 is not set
1707 1999 # CONFIG_SENSORS_DME1737 is not set
1708 2000 # CONFIG_SENSORS_EMC1403 is not set
1709 2001  
... ... @@ -1724,7 +2016,9 @@
1724 2016 # CONFIG_SENSORS_TMP102 is not set
1725 2017 # CONFIG_SENSORS_TMP401 is not set
1726 2018 # CONFIG_SENSORS_TMP421 is not set
  2019 +# CONFIG_SENSORS_VIA686A is not set
1727 2020 # CONFIG_SENSORS_VT1211 is not set
  2021 +# CONFIG_SENSORS_VT8231 is not set
1728 2022 # CONFIG_SENSORS_W83781D is not set
1729 2023 # CONFIG_SENSORS_W83791D is not set
1730 2024 # CONFIG_SENSORS_W83792D is not set
1731 2025  
... ... @@ -1763,8 +2057,16 @@
1763 2057 # CONFIG_MPCORE_WATCHDOG is not set
1764 2058 # CONFIG_MAX63XX_WATCHDOG is not set
1765 2059 CONFIG_IMX2_WDT=y
  2060 +# CONFIG_ALIM7101_WDT is not set
  2061 +# CONFIG_I6300ESB_WDT is not set
1766 2062  
1767 2063 #
  2064 +# PCI-based Watchdog Cards
  2065 +#
  2066 +# CONFIG_PCIPCWATCHDOG is not set
  2067 +# CONFIG_WDTPCI is not set
  2068 +
  2069 +#
1768 2070 # USB-based Watchdog Cards
1769 2071 #
1770 2072 # CONFIG_USBPCWATCHDOG is not set
... ... @@ -1803,6 +2105,9 @@
1803 2105 # CONFIG_HTC_EGPIO is not set
1804 2106 # CONFIG_HTC_PASIC3 is not set
1805 2107 # CONFIG_HTC_I2CPLD is not set
  2108 +# CONFIG_LPC_ICH is not set
  2109 +# CONFIG_LPC_SCH is not set
  2110 +# CONFIG_MFD_JANZ_CMODIO is not set
1806 2111 # CONFIG_MFD_88PM800 is not set
1807 2112 # CONFIG_MFD_88PM805 is not set
1808 2113 # CONFIG_MFD_88PM860X is not set
... ... @@ -1817,6 +2122,8 @@
1817 2122 # CONFIG_MFD_VIPERBOARD is not set
1818 2123 # CONFIG_MFD_RETU is not set
1819 2124 # CONFIG_MFD_PCF50633 is not set
  2125 +# CONFIG_MFD_RDC321X is not set
  2126 +# CONFIG_MFD_RTSX_PCI is not set
1820 2127 # CONFIG_MFD_RC5T583 is not set
1821 2128 # CONFIG_MFD_SEC_CORE is not set
1822 2129 CONFIG_MFD_SI476X_CORE=y
1823 2130  
... ... @@ -1843,11 +2150,13 @@
1843 2150 # CONFIG_TWL6040_CORE is not set
1844 2151 # CONFIG_MFD_WL1273_CORE is not set
1845 2152 # CONFIG_MFD_LM3533 is not set
  2153 +# CONFIG_MFD_TIMBERDALE is not set
1846 2154 # CONFIG_MFD_TC3589X is not set
1847 2155 # CONFIG_MFD_TMIO is not set
1848 2156 # CONFIG_MFD_T7L66XB is not set
1849 2157 # CONFIG_MFD_TC6387XB is not set
1850 2158 # CONFIG_MFD_TC6393XB is not set
  2159 +# CONFIG_MFD_VX855 is not set
1851 2160 # CONFIG_MFD_ARIZONA_I2C is not set
1852 2161 # CONFIG_MFD_ARIZONA_SPI is not set
1853 2162 # CONFIG_MFD_WM8400 is not set
1854 2163  
... ... @@ -1978,7 +2287,9 @@
1978 2287 # Webcam, TV (analog/digital) USB devices
1979 2288 #
1980 2289 # CONFIG_VIDEO_EM28XX is not set
  2290 +# CONFIG_MEDIA_PCI_SUPPORT is not set
1981 2291 CONFIG_V4L_PLATFORM_DRIVERS=y
  2292 +# CONFIG_VIDEO_CAFE_CCIC is not set
1982 2293 # CONFIG_VIDEO_TIMBERDALE is not set
1983 2294 CONFIG_VIDEO_MXC_OUTPUT=y
1984 2295 CONFIG_VIDEO_MXC_CAPTURE=m
... ... @@ -2015,6 +2326,7 @@
2015 2326 CONFIG_RADIO_SI476X=y
2016 2327 # CONFIG_USB_MR800 is not set
2017 2328 # CONFIG_USB_DSBR is not set
  2329 +# CONFIG_RADIO_MAXIRADIO is not set
2018 2330 # CONFIG_RADIO_SHARK is not set
2019 2331 # CONFIG_RADIO_SHARK2 is not set
2020 2332 # CONFIG_I2C_SI4713 is not set
2021 2333  
2022 2334  
2023 2335  
2024 2336  
... ... @@ -2116,11 +2428,25 @@
2116 2428 #
2117 2429 # Graphics support
2118 2430 #
  2431 +CONFIG_VGA_ARB=y
  2432 +CONFIG_VGA_ARB_MAX_GPUS=16
2119 2433 CONFIG_DRM=y
  2434 +# CONFIG_DRM_TDFX is not set
  2435 +# CONFIG_DRM_R128 is not set
  2436 +# CONFIG_DRM_RADEON is not set
  2437 +# CONFIG_DRM_NOUVEAU is not set
  2438 +# CONFIG_DRM_MGA is not set
  2439 +# CONFIG_DRM_VIA is not set
  2440 +# CONFIG_DRM_SAVAGE is not set
2120 2441 CONFIG_DRM_VIVANTE=y
2121 2442 # CONFIG_DRM_EXYNOS is not set
  2443 +# CONFIG_DRM_VMWGFX is not set
2122 2444 # CONFIG_DRM_UDL is not set
  2445 +# CONFIG_DRM_AST is not set
  2446 +# CONFIG_DRM_MGAG200 is not set
  2447 +# CONFIG_DRM_CIRRUS_QEMU is not set
2123 2448 # CONFIG_DRM_TILCDC is not set
  2449 +# CONFIG_DRM_QXL is not set
2124 2450 # CONFIG_TEGRA_HOST1X is not set
2125 2451 # CONFIG_VGASTATE is not set
2126 2452 # CONFIG_VIDEO_OUTPUT_CONTROL is not set
2127 2453  
2128 2454  
... ... @@ -2149,14 +2475,39 @@
2149 2475 #
2150 2476 # Frame buffer hardware drivers
2151 2477 #
  2478 +# CONFIG_FB_CIRRUS is not set
  2479 +# CONFIG_FB_PM2 is not set
  2480 +# CONFIG_FB_CYBER2000 is not set
  2481 +# CONFIG_FB_ASILIANT is not set
  2482 +# CONFIG_FB_IMSTT is not set
2152 2483 # CONFIG_FB_UVESA is not set
2153 2484 # CONFIG_FB_S1D13XXX is not set
  2485 +# CONFIG_FB_NVIDIA is not set
  2486 +# CONFIG_FB_RIVA is not set
  2487 +# CONFIG_FB_I740 is not set
  2488 +# CONFIG_FB_MATROX is not set
  2489 +# CONFIG_FB_RADEON is not set
  2490 +# CONFIG_FB_ATY128 is not set
  2491 +# CONFIG_FB_ATY is not set
  2492 +# CONFIG_FB_S3 is not set
  2493 +# CONFIG_FB_SAVAGE is not set
  2494 +# CONFIG_FB_SIS is not set
  2495 +# CONFIG_FB_NEOMAGIC is not set
  2496 +# CONFIG_FB_KYRO is not set
  2497 +# CONFIG_FB_3DFX is not set
  2498 +# CONFIG_FB_VOODOO1 is not set
  2499 +# CONFIG_FB_VT8623 is not set
  2500 +# CONFIG_FB_TRIDENT is not set
  2501 +# CONFIG_FB_ARK is not set
  2502 +# CONFIG_FB_PM3 is not set
  2503 +# CONFIG_FB_CARMINE is not set
2154 2504 # CONFIG_FB_TMIO is not set
2155 2505 # CONFIG_FB_SMSCUFX is not set
2156 2506 # CONFIG_FB_UDL is not set
2157 2507 # CONFIG_FB_GOLDFISH is not set
2158 2508 # CONFIG_FB_VIRTUAL is not set
2159 2509 # CONFIG_FB_METRONOME is not set
  2510 +# CONFIG_FB_MB862XX is not set
2160 2511 CONFIG_FB_MX3=y
2161 2512 # CONFIG_FB_BROADSHEET is not set
2162 2513 # CONFIG_FB_AUO_K190X is not set
... ... @@ -2251,6 +2602,71 @@
2251 2602 # CONFIG_SND_MTPAV is not set
2252 2603 # CONFIG_SND_SERIAL_U16550 is not set
2253 2604 # CONFIG_SND_MPU401 is not set
  2605 +CONFIG_SND_PCI=y
  2606 +# CONFIG_SND_AD1889 is not set
  2607 +# CONFIG_SND_ALS300 is not set
  2608 +# CONFIG_SND_ALI5451 is not set
  2609 +# CONFIG_SND_ATIIXP is not set
  2610 +# CONFIG_SND_ATIIXP_MODEM is not set
  2611 +# CONFIG_SND_AU8810 is not set
  2612 +# CONFIG_SND_AU8820 is not set
  2613 +# CONFIG_SND_AU8830 is not set
  2614 +# CONFIG_SND_AW2 is not set
  2615 +# CONFIG_SND_AZT3328 is not set
  2616 +# CONFIG_SND_BT87X is not set
  2617 +# CONFIG_SND_CA0106 is not set
  2618 +# CONFIG_SND_CMIPCI is not set
  2619 +# CONFIG_SND_OXYGEN is not set
  2620 +# CONFIG_SND_CS4281 is not set
  2621 +# CONFIG_SND_CS46XX is not set
  2622 +# CONFIG_SND_CS5535AUDIO is not set
  2623 +# CONFIG_SND_CTXFI is not set
  2624 +# CONFIG_SND_DARLA20 is not set
  2625 +# CONFIG_SND_GINA20 is not set
  2626 +# CONFIG_SND_LAYLA20 is not set
  2627 +# CONFIG_SND_DARLA24 is not set
  2628 +# CONFIG_SND_GINA24 is not set
  2629 +# CONFIG_SND_LAYLA24 is not set
  2630 +# CONFIG_SND_MONA is not set
  2631 +# CONFIG_SND_MIA is not set
  2632 +# CONFIG_SND_ECHO3G is not set
  2633 +# CONFIG_SND_INDIGO is not set
  2634 +# CONFIG_SND_INDIGOIO is not set
  2635 +# CONFIG_SND_INDIGODJ is not set
  2636 +# CONFIG_SND_INDIGOIOX is not set
  2637 +# CONFIG_SND_INDIGODJX is not set
  2638 +# CONFIG_SND_EMU10K1 is not set
  2639 +# CONFIG_SND_EMU10K1X is not set
  2640 +# CONFIG_SND_ENS1370 is not set
  2641 +# CONFIG_SND_ENS1371 is not set
  2642 +# CONFIG_SND_ES1938 is not set
  2643 +# CONFIG_SND_ES1968 is not set
  2644 +# CONFIG_SND_FM801 is not set
  2645 +# CONFIG_SND_HDA_INTEL is not set
  2646 +# CONFIG_SND_HDSP is not set
  2647 +# CONFIG_SND_HDSPM is not set
  2648 +# CONFIG_SND_ICE1712 is not set
  2649 +# CONFIG_SND_ICE1724 is not set
  2650 +# CONFIG_SND_INTEL8X0 is not set
  2651 +# CONFIG_SND_INTEL8X0M is not set
  2652 +# CONFIG_SND_KORG1212 is not set
  2653 +# CONFIG_SND_LOLA is not set
  2654 +# CONFIG_SND_LX6464ES is not set
  2655 +# CONFIG_SND_MAESTRO3 is not set
  2656 +# CONFIG_SND_MIXART is not set
  2657 +# CONFIG_SND_NM256 is not set
  2658 +# CONFIG_SND_PCXHR is not set
  2659 +# CONFIG_SND_RIPTIDE is not set
  2660 +# CONFIG_SND_RME32 is not set
  2661 +# CONFIG_SND_RME96 is not set
  2662 +# CONFIG_SND_RME9652 is not set
  2663 +# CONFIG_SND_SONICVIBES is not set
  2664 +# CONFIG_SND_TRIDENT is not set
  2665 +# CONFIG_SND_VIA82XX is not set
  2666 +# CONFIG_SND_VIA82XX_MODEM is not set
  2667 +# CONFIG_SND_VIRTUOSO is not set
  2668 +# CONFIG_SND_VX222 is not set
  2669 +# CONFIG_SND_YMFPCI is not set
2254 2670 CONFIG_SND_ARM=y
2255 2671 # CONFIG_SND_SPI is not set
2256 2672 # CONFIG_SND_USB is not set
2257 2673  
... ... @@ -2375,9 +2791,9 @@
2375 2791 # I2C HID support
2376 2792 #
2377 2793 # CONFIG_I2C_HID is not set
2378   -# CONFIG_USB_ARCH_HAS_OHCI is not set
  2794 +CONFIG_USB_ARCH_HAS_OHCI=y
2379 2795 CONFIG_USB_ARCH_HAS_EHCI=y
2380   -# CONFIG_USB_ARCH_HAS_XHCI is not set
  2796 +CONFIG_USB_ARCH_HAS_XHCI=y
2381 2797 CONFIG_USB_SUPPORT=y
2382 2798 CONFIG_USB_COMMON=y
2383 2799 CONFIG_USB_ARCH_HAS_HCD=y
2384 2800  
2385 2801  
... ... @@ -2401,15 +2817,19 @@
2401 2817 # USB Host Controller Drivers
2402 2818 #
2403 2819 # CONFIG_USB_C67X00_HCD is not set
  2820 +# CONFIG_USB_XHCI_HCD is not set
2404 2821 CONFIG_USB_EHCI_HCD=y
2405 2822 CONFIG_USB_EHCI_ROOT_HUB_TT=y
2406 2823 CONFIG_USB_EHCI_TT_NEWSCHED=y
  2824 +CONFIG_USB_EHCI_PCI=y
2407 2825 # CONFIG_USB_EHCI_MXC is not set
2408 2826 # CONFIG_USB_EHCI_HCD_PLATFORM is not set
2409 2827 # CONFIG_USB_OXU210HP_HCD is not set
2410 2828 # CONFIG_USB_ISP116X_HCD is not set
2411 2829 # CONFIG_USB_ISP1760_HCD is not set
2412 2830 # CONFIG_USB_ISP1362_HCD is not set
  2831 +# CONFIG_USB_OHCI_HCD is not set
  2832 +# CONFIG_USB_UHCI_HCD is not set
2413 2833 # CONFIG_USB_SL811_HCD is not set
2414 2834 # CONFIG_USB_R8A66597_HCD is not set
2415 2835 # CONFIG_USB_IMX21_HCD is not set
2416 2836  
... ... @@ -2523,7 +2943,11 @@
2523 2943 # CONFIG_USB_MV_UDC is not set
2524 2944 # CONFIG_USB_MV_U3D is not set
2525 2945 # CONFIG_USB_M66592 is not set
  2946 +# CONFIG_USB_AMD5536UDC is not set
2526 2947 # CONFIG_USB_NET2272 is not set
  2948 +# CONFIG_USB_NET2280 is not set
  2949 +# CONFIG_USB_GOKU is not set
  2950 +# CONFIG_USB_EG20T is not set
2527 2951 # CONFIG_USB_DUMMY_HCD is not set
2528 2952 CONFIG_USB_LIBCOMPOSITE=m
2529 2953 CONFIG_USB_F_ACM=m
... ... @@ -2550,6 +2974,7 @@
2550 2974 # CONFIG_USB_G_HID is not set
2551 2975 # CONFIG_USB_G_DBGP is not set
2552 2976 # CONFIG_USB_G_WEBCAM is not set
  2977 +# CONFIG_UWB is not set
2553 2978 CONFIG_MMC=y
2554 2979 # CONFIG_MMC_DEBUG is not set
2555 2980 CONFIG_MMC_UNSAFE_RESUME=y
2556 2981  
... ... @@ -2569,11 +2994,15 @@
2569 2994 #
2570 2995 CONFIG_MMC_SDHCI=y
2571 2996 CONFIG_MMC_SDHCI_IO_ACCESSORS=y
  2997 +# CONFIG_MMC_SDHCI_PCI is not set
2572 2998 CONFIG_MMC_SDHCI_PLTFM=y
2573 2999 CONFIG_MMC_SDHCI_ESDHC_IMX=y
2574 3000 # CONFIG_MMC_SDHCI_PXAV3 is not set
2575 3001 # CONFIG_MMC_SDHCI_PXAV2 is not set
2576 3002 # CONFIG_MMC_MXC is not set
  3003 +# CONFIG_MMC_TIFM_SD is not set
  3004 +# CONFIG_MMC_CB710 is not set
  3005 +# CONFIG_MMC_VIA_SDMMC is not set
2577 3006 # CONFIG_MMC_DW is not set
2578 3007 # CONFIG_MMC_VUB300 is not set
2579 3008 # CONFIG_MMC_USHC is not set
... ... @@ -2665,6 +3094,7 @@
2665 3094 # CONFIG_LEDS_TRIGGER_TRANSIENT is not set
2666 3095 # CONFIG_LEDS_TRIGGER_CAMERA is not set
2667 3096 # CONFIG_ACCESSIBILITY is not set
  3097 +# CONFIG_INFINIBAND is not set
2668 3098 # CONFIG_EDAC is not set
2669 3099 CONFIG_RTC_LIB=y
2670 3100 CONFIG_RTC_CLASS=y
2671 3101  
2672 3102  
2673 3103  
2674 3104  
2675 3105  
... ... @@ -2781,24 +3211,31 @@
2781 3211 #
2782 3212 # Virtio drivers
2783 3213 #
  3214 +# CONFIG_VIRTIO_PCI is not set
2784 3215 # CONFIG_VIRTIO_MMIO is not set
2785 3216  
2786 3217 #
2787 3218 # Microsoft Hyper-V guest support
2788 3219 #
2789 3220 CONFIG_STAGING=y
  3221 +# CONFIG_ET131X is not set
2790 3222 # CONFIG_USBIP_CORE is not set
2791 3223 # CONFIG_W35UND is not set
2792 3224 # CONFIG_PRISM2_USB is not set
2793 3225 # CONFIG_ECHO is not set
2794 3226 # CONFIG_COMEDI is not set
2795 3227 # CONFIG_ASUS_OLED is not set
  3228 +# CONFIG_R8187SE is not set
  3229 +# CONFIG_RTL8192U is not set
2796 3230 # CONFIG_RTLLIB is not set
2797 3231 # CONFIG_R8712U is not set
2798 3232 # CONFIG_RTS5139 is not set
2799 3233 # CONFIG_TRANZPORT is not set
  3234 +# CONFIG_IDE_PHISON is not set
2800 3235 # CONFIG_LINE6_USB is not set
  3236 +# CONFIG_VT6655 is not set
2801 3237 # CONFIG_VT6656 is not set
  3238 +# CONFIG_DX_SEP is not set
2802 3239  
2803 3240 #
2804 3241 # IIO staging drivers
... ... @@ -2895,6 +3332,9 @@
2895 3332 #
2896 3333 # CONFIG_IIO_SIMPLE_DUMMY is not set
2897 3334 # CONFIG_ZSMALLOC is not set
  3335 +# CONFIG_FB_SM7XX is not set
  3336 +# CONFIG_CRYSTALHD is not set
  3337 +# CONFIG_FB_XGI is not set
2898 3338 # CONFIG_USB_ENESTORAGE is not set
2899 3339 # CONFIG_BCM_WIMAX is not set
2900 3340 # CONFIG_FT1000 is not set
... ... @@ -2914,6 +3354,9 @@
2914 3354 # CONFIG_USB_WPAN_HCD is not set
2915 3355 # CONFIG_WIMAX_GDM72XX is not set
2916 3356 # CONFIG_CSR_WIFI is not set
  3357 +CONFIG_NET_VENDOR_SILICOM=y
  3358 +# CONFIG_SBYPASS is not set
  3359 +# CONFIG_BPCTL is not set
2917 3360 # CONFIG_CED1401 is not set
2918 3361 # CONFIG_DRM_IMX is not set
2919 3362 # CONFIG_DGRP is not set
... ... @@ -3041,6 +3484,7 @@
3041 3484 #
3042 3485 # CONFIG_AK8975 is not set
3043 3486 # CONFIG_IIO_ST_MAGN_3AXIS is not set
  3487 +# CONFIG_VME_BUS is not set
3044 3488 CONFIG_PWM=y
3045 3489 CONFIG_PWM_IMX=y
3046 3490 CONFIG_IRQCHIP=y
... ... @@ -3467,6 +3911,7 @@
3467 3911 # CONFIG_CRYPTO_USER_API_HASH is not set
3468 3912 # CONFIG_CRYPTO_USER_API_SKCIPHER is not set
3469 3913 CONFIG_CRYPTO_HW=y
  3914 +# CONFIG_CRYPTO_DEV_HIFN_795X is not set
3470 3915 CONFIG_CRYPTO_DEV_FSL_CAAM=y
3471 3916 CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
3472 3917 CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
arch/arm/mach-imx/clk-imx6q.c
Diff comments   View file @ 8f7b130
... ... @@ -711,6 +711,8 @@
711 711  
712 712 /* ipu clock initialization */
713 713 init_ldb_clks();
  714 + imx_clk_set_parent(clk[ldb_di0_sel], clk[pll5_video_div]);
  715 + imx_clk_set_parent(clk[ldb_di1_sel], clk[pll5_video_div]);
714 716 imx_clk_set_parent(clk[ipu1_di0_pre_sel], clk[pll5_video_div]);
715 717 imx_clk_set_parent(clk[ipu1_di1_pre_sel], clk[pll5_video_div]);
716 718 imx_clk_set_parent(clk[ipu2_di0_pre_sel], clk[pll5_video_div]);
drivers/pci/host/pci-imx6.c
Diff comments   View file @ 8f7b130
... ... @@ -335,11 +335,11 @@
335 335 }
336 336  
337 337 /* allow the clocks to stabilize */
338   - udelay(200);
  338 + usleep_range(200, 500);
339 339  
340 340 if (gpio_is_valid(imx6_pcie->reset_gpio)) {
341 341 gpio_set_value_cansleep(imx6_pcie->reset_gpio, 0);
342   - mdelay(1);
  342 + msleep(100);
343 343 gpio_set_value_cansleep(imx6_pcie->reset_gpio, 1);
344 344 }
345 345  
... ... @@ -574,6 +574,9 @@
574 574 pp->ops = &imx6_pcie_host_ops;
575 575  
576 576 spin_lock_init(&pp->conf_lock);
  577 +
  578 + usleep_range(25000, 30000);
  579 +
577 580 ret = dw_pcie_host_init(pp);
578 581 if (ret) {
579 582 dev_err(&pdev->dev, "failed to initialize host\n");
drivers/power/Kconfig
Diff comments   View file @ 8f7b130
... ... @@ -342,6 +342,15 @@
342 342 You'll need this driver to charge batteries on e.g. Nokia
343 343 RX-51/N900.
344 344  
  345 +config CHARGER_BQ2477X
  346 + tristate "BQ24770/BQ24773 Charger driver support"
  347 + depends on I2C
  348 + help
  349 + BQ2477X is a companion pmic for smartphones and tablets
  350 + which supports battery charging feature.
  351 + Say Y here to enable driver support for TI BQ24770/
  352 + BQ24773 Battery Charger.
  353 +
345 354 config CHARGER_SMB347
346 355 tristate "Summit Microelectronics SMB347 Battery Charger"
347 356 depends on I2C
drivers/power/Makefile
Diff comments   View file @ 8f7b130
... ... @@ -51,6 +51,7 @@
51 51 obj-$(CONFIG_CHARGER_MAX8997) += max8997_charger.o
52 52 obj-$(CONFIG_CHARGER_MAX8998) += max8998_charger.o
53 53 obj-$(CONFIG_CHARGER_BQ2415X) += bq2415x_charger.o
  54 +obj-$(CONFIG_CHARGER_BQ2477X) += bq2477x-charger.o
54 55 obj-$(CONFIG_POWER_AVS) += avs/
55 56 obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o
56 57 obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o
drivers/power/bq2477x-charger.c
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * bq2477x-charger.c -- BQ24770/3 Charger driver
  3 + *
  4 + * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
  5 + *
  6 + * Author: Andy Park <an...@nvidia.com>
  7 + * Author: Syed Rafiuddin <srafi...@nvidia.com>
  8 + *
  9 + * This program is free software; you can redistribute it and/or
  10 + * modify it under the terms of the GNU General Public License as
  11 + * published by the Free Software Foundation version 2.
  12 + *
  13 + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
  14 + * whether express or implied; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16 + * General Public License for more details.
  17 + *
  18 + * You should have received a copy of the GNU General Public License
  19 + * along with this program; if not, write to the Free Software
  20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  21 + * 02111-1307, USA
  22 + */
  23 +#include <linux/delay.h>
  24 +#include <linux/err.h>
  25 +#include <linux/i2c.h>
  26 +#include <linux/init.h>
  27 +#include <linux/interrupt.h>
  28 +#include <linux/kthread.h>
  29 +#include <linux/sched.h>
  30 +#include <linux/time.h>
  31 +#include <linux/timer.h>
  32 +#include <linux/kernel.h>
  33 +#include <linux/module.h>
  34 +#include <linux/power/bq2477x-charger.h>
  35 +#include <linux/power_supply.h>
  36 +#include <linux/regmap.h>
  37 +#include <linux/regulator/driver.h>
  38 +#include <linux/regulator/machine.h>
  39 +#include <linux/slab.h>
  40 +#include <linux/rtc.h>
  41 +#include <linux/alarmtimer.h>
  42 +#include <linux/sched/rt.h>
  43 +#include <linux/gpio.h>
  44 +#include <linux/of_gpio.h>
  45 +
  46 +enum bq2477x_chip_id { BQ24770, BQ24773};
  47 +
  48 +struct bq2477x_chip {
  49 + struct device *dev;
  50 + struct power_supply ac;
  51 + struct regmap *regmap;
  52 + struct regmap *regmap_word;
  53 + struct mutex mutex;
  54 + int irq;
  55 + int charger_detect_gpio;
  56 + int charger_detect_gpio_active_low;
  57 + int ac_online;
  58 + int dac_ichg;
  59 + int dac_v;
  60 + int dac_minsv;
  61 + int dac_iin;
  62 + int suspended;
  63 + int wdt_refresh_timeout;
  64 + struct kthread_worker bq_kworker;
  65 + struct task_struct *bq_kworker_task;
  66 + struct kthread_work bq_wdt_work;
  67 +};
  68 +
  69 +/* Kthread scheduling parameters */
  70 +struct sched_param bq2477x_param = {
  71 + .sched_priority = MAX_RT_PRIO - 1,
  72 +};
  73 +
  74 +static const struct regmap_config bq2477x_regmap_config = {
  75 + .name = "bq2477x",
  76 + .reg_bits = 8,
  77 + .val_bits = 8,
  78 + .max_register = BQ2477X_MAX_REGS,
  79 +};
  80 +
  81 +static const struct regmap_config bq2477x_regmap_word_config = {
  82 + .name = "bq2477x_word",
  83 + .reg_bits = 8,
  84 + .val_bits = 16,
  85 + .max_register = BQ2477X_MAX_REGS,
  86 +};
  87 +
  88 +static int bq2477x_read(struct bq2477x_chip *bq2477x,
  89 + unsigned int reg, unsigned int *val)
  90 +{
  91 + return regmap_read(bq2477x->regmap, reg, val);
  92 +}
  93 +
  94 +static int bq2477x_write(struct bq2477x_chip *bq2477x,
  95 + unsigned int reg, unsigned int val)
  96 +{
  97 + return regmap_write(bq2477x->regmap, reg, val);
  98 +}
  99 +
  100 +static int bq2477x_write_word(struct bq2477x_chip *bq2477x,
  101 + unsigned int reg, unsigned int val)
  102 +{
  103 + return regmap_write(bq2477x->regmap_word, reg, val);
  104 +}
  105 +
  106 +static int bq2477x_update_bits(struct bq2477x_chip *bq2477x,
  107 + unsigned int reg, unsigned int mask, unsigned int val)
  108 +{
  109 + return regmap_update_bits(bq2477x->regmap, reg, mask, val);
  110 +}
  111 +
  112 +static enum power_supply_property bq2477x_psy_props[] = {
  113 + POWER_SUPPLY_PROP_ONLINE,
  114 +};
  115 +
  116 +static int bq2477x_ac_get_property(struct power_supply *psy,
  117 + enum power_supply_property psp, union power_supply_propval *val)
  118 +{
  119 + struct bq2477x_chip *bq2477x;
  120 +
  121 + bq2477x = container_of(psy, struct bq2477x_chip, ac);
  122 + if (psp == POWER_SUPPLY_PROP_ONLINE)
  123 + val->intval = bq2477x->ac_online;
  124 + else
  125 + return -EINVAL;
  126 + return 0;
  127 +}
  128 +
  129 +static int bq2477x_show_chip_version(struct bq2477x_chip *bq2477x)
  130 +{
  131 + int ret;
  132 + unsigned int val;
  133 +
  134 + ret = bq2477x_read(bq2477x, BQ2477X_DEVICE_ID_REG, &val);
  135 + if (ret < 0) {
  136 + dev_err(bq2477x->dev, "DEVICE_ID_REG read failed: %d\n", ret);
  137 + return ret;
  138 + }
  139 +
  140 + if (val == BQ24770_DEVICE_ID)
  141 + dev_info(bq2477x->dev, "chip type BQ24770 detected\n");
  142 + else if (val == BQ24773_DEVICE_ID)
  143 + dev_info(bq2477x->dev, "chip type BQ24773 detected\n");
  144 + else {
  145 + dev_info(bq2477x->dev, "unrecognized chip type: 0x%4x\n", val);
  146 + return -EINVAL;
  147 + }
  148 + return 0;
  149 +}
  150 +
  151 +static int bq2477x_hw_init(struct bq2477x_chip *bq2477x)
  152 +{
  153 + int ret = 0;
  154 +
  155 + /* Configure control */
  156 + ret = bq2477x_write(bq2477x, BQ2477X_CHARGE_OPTION_0_MSB,
  157 + BQ2477X_CHARGE_OPTION_POR_MSB);
  158 + if (ret < 0) {
  159 + dev_err(bq2477x->dev, "CHARGE_OPTION_0 write failed %d\n", ret);
  160 + return ret;
  161 + }
  162 + ret = bq2477x_write(bq2477x, BQ2477X_CHARGE_OPTION_0_LSB,
  163 + BQ2477X_CHARGE_OPTION_POR_LSB);
  164 + if (ret < 0) {
  165 + dev_err(bq2477x->dev, "CHARGE_OPTION_0 write failed %d\n", ret);
  166 + return ret;
  167 + }
  168 +
  169 + ret = bq2477x_write_word(bq2477x, BQ2477X_MAX_CHARGE_VOLTAGE_LSB,
  170 + (bq2477x->dac_v >> 8) | (bq2477x->dac_v << 8));
  171 + if (ret < 0) {
  172 + dev_err(bq2477x->dev, "CHARGE_VOLTAGE write failed %d\n", ret);
  173 + return ret;
  174 + }
  175 +
  176 + ret = bq2477x_write(bq2477x, BQ2477X_MIN_SYS_VOLTAGE,
  177 + bq2477x->dac_minsv >> BQ2477X_MIN_SYS_VOLTAGE_SHIFT);
  178 + if (ret < 0) {
  179 + dev_err(bq2477x->dev, "MIN_SYS_VOLTAGE write failed %d\n", ret);
  180 + return ret;
  181 + }
  182 +
  183 + /* Configure setting input current */
  184 + ret = bq2477x_write(bq2477x, BQ2477X_INPUT_CURRENT,
  185 + bq2477x->dac_iin >> BQ2477X_INPUT_CURRENT_SHIFT);
  186 + if (ret < 0) {
  187 + dev_err(bq2477x->dev, "INPUT_CURRENT write failed %d\n", ret);
  188 + return ret;
  189 + }
  190 +
  191 + ret = bq2477x_write_word(bq2477x, BQ2477X_CHARGE_CURRENT_LSB,
  192 + (bq2477x->dac_ichg >> 8) | (bq2477x->dac_ichg << 8));
  193 + if (ret < 0) {
  194 + dev_err(bq2477x->dev, "CHARGE_CURRENT write failed %d\n", ret);
  195 + return ret;
  196 + }
  197 +
  198 + return ret;
  199 +}
  200 +
  201 +static void bq2477x_work_thread(struct kthread_work *work)
  202 +{
  203 + struct bq2477x_chip *bq2477x = container_of(work,
  204 + struct bq2477x_chip, bq_wdt_work);
  205 + int ret;
  206 +
  207 + for (;;) {
  208 + ret = bq2477x_hw_init(bq2477x);
  209 + if (ret < 0) {
  210 + dev_err(bq2477x->dev, "Hardware init failed %d\n", ret);
  211 + return;
  212 + }
  213 +
  214 + ret = bq2477x_update_bits(bq2477x, BQ2477X_CHARGE_OPTION_0_MSB,
  215 + BQ2477X_WATCHDOG_TIMER, 0x60);
  216 + if (ret < 0) {
  217 + dev_err(bq2477x->dev,
  218 + "CHARGE_OPTION write failed %d\n", ret);
  219 + return;
  220 + }
  221 +
  222 + msleep(bq2477x->wdt_refresh_timeout * 1000);
  223 + }
  224 +}
  225 +
  226 +static void of_bq2477x_parse_platform_data(struct i2c_client *client,
  227 + struct bq2477x_platform_data *pdata)
  228 +{
  229 + struct device_node *np = client->dev.of_node;
  230 + enum of_gpio_flags flags;
  231 + u32 pval;
  232 + int ret;
  233 +
  234 + ret = of_property_read_u32(np, "ti,dac-ichg", &pval);
  235 + if (!ret)
  236 + pdata->dac_ichg = pval;
  237 + else
  238 + dev_warn(&client->dev, "dac-ichg not provided\n");
  239 +
  240 + ret = of_property_read_u32(np, "ti,dac-v", &pval);
  241 + if (!ret)
  242 + pdata->dac_v = pval;
  243 + else
  244 + dev_warn(&client->dev, "dac-v not provided\n");
  245 +
  246 + ret = of_property_read_u32(np, "ti,dac-minsv", &pval);
  247 + if (!ret)
  248 + pdata->dac_minsv = pval;
  249 + else
  250 + dev_warn(&client->dev, "dac-minsv not provided\n");
  251 +
  252 + ret = of_property_read_u32(np, "ti,dac-iin", &pval);
  253 + if (!ret)
  254 + pdata->dac_iin = pval;
  255 + else
  256 + dev_warn(&client->dev, "dac-iin not provided\n");
  257 +
  258 + ret = of_property_read_u32(np, "ti,wdt-refresh-timeout", &pval);
  259 + if (!ret)
  260 + pdata->wdt_refresh_timeout = pval;
  261 + else
  262 + dev_warn(&client->dev, "wdt-refresh-timeout not provided\n");
  263 +
  264 + pdata->charger_detect_gpio = of_get_named_gpio_flags(np,
  265 + "ti,charger-detect-gpio",
  266 + 0, &flags);
  267 + if (pdata->charger_detect_gpio >= 0)
  268 + pdata->charger_detect_gpio_active_low = flags &
  269 + OF_GPIO_ACTIVE_LOW;
  270 + else
  271 + dev_warn(&client->dev, "invalid charger_detect_gpio\n");
  272 +}
  273 +
  274 +static irqreturn_t bq2477x_charger_detect_irq(int irq, void *data)
  275 +{
  276 + struct bq2477x_chip *bq2477x = data;
  277 + bq2477x->ac_online =
  278 + gpio_get_value_cansleep(bq2477x->charger_detect_gpio);
  279 + bq2477x->ac_online ^= bq2477x->charger_detect_gpio_active_low;
  280 +
  281 + if (bq2477x->ac_online == 1)
  282 + bq2477x_hw_init(bq2477x);
  283 +
  284 + power_supply_changed(&bq2477x->ac);
  285 + return IRQ_HANDLED;
  286 +}
  287 +
  288 +static int bq2477x_probe(struct i2c_client *client,
  289 + const struct i2c_device_id *id)
  290 +{
  291 + struct bq2477x_chip *bq2477x = NULL;
  292 + struct bq2477x_platform_data *pdata;
  293 + int ret = 0;
  294 +
  295 + if (client->dev.of_node) {
  296 + pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
  297 + if (!pdata)
  298 + return -ENOMEM;
  299 + of_bq2477x_parse_platform_data(client, pdata);
  300 + } else {
  301 + pdata = client->dev.platform_data;
  302 + }
  303 +
  304 + if (!pdata) {
  305 + dev_err(&client->dev, "No Platform data");
  306 + return -EINVAL;
  307 + }
  308 +
  309 + bq2477x = devm_kzalloc(&client->dev, sizeof(*bq2477x), GFP_KERNEL);
  310 + if (!bq2477x) {
  311 + dev_err(&client->dev, "Memory allocation failed\n");
  312 + ret = -ENOMEM;
  313 + return ret;
  314 + }
  315 + bq2477x->dev = &client->dev;
  316 +
  317 + bq2477x->dac_ichg = pdata->dac_ichg;
  318 + bq2477x->dac_v = pdata->dac_v;
  319 + bq2477x->dac_minsv = pdata->dac_minsv;
  320 + bq2477x->dac_iin = pdata->dac_iin;
  321 + bq2477x->wdt_refresh_timeout = pdata->wdt_refresh_timeout;
  322 + bq2477x->charger_detect_gpio = pdata->charger_detect_gpio;
  323 + bq2477x->charger_detect_gpio_active_low =
  324 + pdata->charger_detect_gpio_active_low;
  325 +
  326 + i2c_set_clientdata(client, bq2477x);
  327 + mutex_init(&bq2477x->mutex);
  328 +
  329 + bq2477x->ac_online = 0;
  330 +
  331 + bq2477x->regmap = devm_regmap_init_i2c(client, &bq2477x_regmap_config);
  332 + if (IS_ERR(bq2477x->regmap)) {
  333 + ret = PTR_ERR(bq2477x->regmap);
  334 + dev_err(&client->dev, "regmap init failed with err %d\n", ret);
  335 + return ret;
  336 + }
  337 +
  338 + bq2477x->regmap_word = devm_regmap_init_i2c(client,
  339 + &bq2477x_regmap_word_config);
  340 + if (IS_ERR(bq2477x->regmap_word)) {
  341 + ret = PTR_ERR(bq2477x->regmap_word);
  342 + dev_err(&client->dev,
  343 + "regmap_word init failed with err %d\n", ret);
  344 + return ret;
  345 + }
  346 +
  347 + ret = bq2477x_show_chip_version(bq2477x);
  348 + if (ret < 0) {
  349 + dev_err(bq2477x->dev, "version read failed %d\n", ret);
  350 + return ret;
  351 + }
  352 +
  353 + bq2477x->ac.name = "bq2477x-ac";
  354 + bq2477x->ac.type = POWER_SUPPLY_TYPE_MAINS;
  355 + bq2477x->ac.get_property = bq2477x_ac_get_property;
  356 + bq2477x->ac.properties = bq2477x_psy_props;
  357 + bq2477x->ac.num_properties = ARRAY_SIZE(bq2477x_psy_props);
  358 +
  359 + ret = power_supply_register(bq2477x->dev, &bq2477x->ac);
  360 + if (ret < 0) {
  361 + dev_err(bq2477x->dev,
  362 + "AC power supply register failed %d\n", ret);
  363 + return ret;
  364 + }
  365 +
  366 + if (gpio_is_valid(bq2477x->charger_detect_gpio)) {
  367 + ret = devm_gpio_request_one(bq2477x->dev,
  368 + bq2477x->charger_detect_gpio, GPIOF_IN,
  369 + "bq2477x-charger-detect");
  370 + if (ret) {
  371 + dev_err(bq2477x->dev, "gpio request failed %d\n", ret);
  372 + goto psy_err;
  373 + }
  374 +
  375 + bq2477x->irq = gpio_to_irq(bq2477x->charger_detect_gpio);
  376 + bq2477x->ac_online =
  377 + gpio_get_value_cansleep(bq2477x->charger_detect_gpio);
  378 + bq2477x->ac_online ^= bq2477x->charger_detect_gpio_active_low;
  379 +
  380 + ret = devm_request_threaded_irq(bq2477x->dev, bq2477x->irq,
  381 + NULL, bq2477x_charger_detect_irq,
  382 + IRQF_ONESHOT | IRQF_TRIGGER_RISING
  383 + | IRQF_TRIGGER_FALLING, dev_name(bq2477x->dev),
  384 + bq2477x);
  385 + if (ret < 0) {
  386 + dev_err(bq2477x->dev,
  387 + "Failed to request irq %d\n", ret);
  388 + goto psy_err;
  389 + }
  390 + }
  391 +
  392 + ret = bq2477x_hw_init(bq2477x);
  393 + if (ret < 0) {
  394 + dev_err(bq2477x->dev, "Hardware init failed %d\n", ret);
  395 + goto psy_err;
  396 + }
  397 +
  398 + init_kthread_worker(&bq2477x->bq_kworker);
  399 + bq2477x->bq_kworker_task = kthread_run(kthread_worker_fn,
  400 + &bq2477x->bq_kworker,
  401 + dev_name(bq2477x->dev));
  402 + if (IS_ERR(bq2477x->bq_kworker_task)) {
  403 + ret = PTR_ERR(bq2477x->bq_kworker_task);
  404 + dev_err(&client->dev, "Kworker task creation failed %d\n", ret);
  405 + goto psy_err;
  406 + }
  407 +
  408 + init_kthread_work(&bq2477x->bq_wdt_work, bq2477x_work_thread);
  409 + sched_setscheduler(bq2477x->bq_kworker_task,
  410 + SCHED_FIFO, &bq2477x_param);
  411 + queue_kthread_work(&bq2477x->bq_kworker, &bq2477x->bq_wdt_work);
  412 +
  413 + dev_info(bq2477x->dev, "bq2477x charger registerd\n");
  414 +
  415 + return ret;
  416 +
  417 +psy_err:
  418 + power_supply_unregister(&bq2477x->ac);
  419 + return ret;
  420 +}
  421 +
  422 +static int bq2477x_remove(struct i2c_client *client)
  423 +{
  424 + struct bq2477x_chip *bq2477x = i2c_get_clientdata(client);
  425 + flush_kthread_worker(&bq2477x->bq_kworker);
  426 + kthread_stop(bq2477x->bq_kworker_task);
  427 + power_supply_unregister(&bq2477x->ac);
  428 + return 0;
  429 +}
  430 +
  431 +static const struct i2c_device_id bq2477x_id[] = {
  432 + { "bq24770", BQ24770 },
  433 + { "bq24773", BQ24773 },
  434 + {},
  435 +};
  436 +MODULE_DEVICE_TABLE(i2c, bq2477x_id);
  437 +
  438 +static struct i2c_driver bq2477x_i2c_driver = {
  439 + .driver = {
  440 + .name = "bq2477x-charger",
  441 + .owner = THIS_MODULE,
  442 + },
  443 + .probe = bq2477x_probe,
  444 + .remove = bq2477x_remove,
  445 + .id_table = bq2477x_id,
  446 +};
  447 +
  448 +static int __init bq2477x_module_init(void)
  449 +{
  450 + return i2c_add_driver(&bq2477x_i2c_driver);
  451 +}
  452 +module_init(bq2477x_module_init);
  453 +
  454 +static void __exit bq2477x_cleanup(void)
  455 +{
  456 + i2c_del_driver(&bq2477x_i2c_driver);
  457 +}
  458 +module_exit(bq2477x_cleanup);
  459 +
  460 +MODULE_DESCRIPTION("BQ24770/BQ24773 battery charger driver");
  461 +MODULE_AUTHOR("Andy Park <an...@nvidia.com>");
  462 +MODULE_AUTHOR("Syed Rafiuddin <srafi...@nvidia.com");
  463 +MODULE_LICENSE("GPL v2");
include/linux/power/bq2477x-charger.h
Diff comments   View file @ 8f7b130
  1 +/*
  2 + * bq2477x-charger.h -- BQ2477X Charger driver
  3 + *
  4 + * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
  5 + *
  6 + * Author: Andy Park <an...@nvidia.com>
  7 + * Author: Syed Rafiuddin <srafi...@nvidia.com>
  8 + *
  9 + * This program is free software; you can redistribute it and/or modify
  10 + * it under the terms of the GNU General Public License as published by
  11 + * the Free Software Foundation; either version 2 of the License, or
  12 + * (at your option) any later version.
  13 + *
  14 + * This program is distributed in the hope that it will be useful, but WITHOUT
  15 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16 + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17 + * more details.
  18 + *
  19 + * You should have received a copy of the GNU General Public License along
  20 + * with this program; if not, write to the Free Software Foundation, Inc.,
  21 + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  22 + *
  23 + */
  24 +
  25 +#ifndef __LINUX_POWER_BQ2477X_CHARGER_H
  26 +#define __LINUX_POWER_BQ2477X_CHARGER_H
  27 +
  28 +/* Register definitions */
  29 +#define BQ2477X_CHARGE_OPTION_0_LSB 0x00
  30 +#define BQ2477X_CHARGE_OPTION_0_MSB 0x01
  31 +#define BQ2477X_CHARGE_OPTION_1_LSB 0x02
  32 +#define BQ2477X_CHARGE_OPTION_1_MSB 0x03
  33 +#define BQ2477X_PROCHOT_OPTION_0_LSB 0x04
  34 +#define BQ2477X_PROCHOT_OPTION_0_MSB 0x05
  35 +#define BQ2477X_PROCHOT_OPTION_1_LSB 0x06
  36 +#define BQ2477X_PROCHOT_OPTION_1_MSB 0x07
  37 +#define BQ2477X_DEVICE_ID_REG 0x09
  38 +#define BQ2477X_CHARGE_CURRENT_LSB 0x0A
  39 +#define BQ2477X_CHARGE_CURRENT_MSB 0x0B
  40 +#define BQ2477X_MAX_CHARGE_VOLTAGE_LSB 0x0C
  41 +#define BQ2477X_MAX_CHARGE_VOLTAGE_MSB 0x0D
  42 +#define BQ2477X_MIN_SYS_VOLTAGE 0x0E
  43 +#define BQ2477X_INPUT_CURRENT 0x0F
  44 +
  45 +#define BQ24770_DEVICE_ID 0x14
  46 +#define BQ24773_DEVICE_ID 0x41
  47 +
  48 +#define BQ2477X_CHARGE_OPTION_POR_LSB 0x0E
  49 +#define BQ2477X_CHARGE_OPTION_POR_MSB 0x81
  50 +
  51 +#define BQ2477X_CHARGE_CURRENT_SHIFT 6
  52 +#define BQ2477X_MAX_CHARGE_VOLTAGE_SHIFT 4
  53 +#define BQ2477X_MIN_SYS_VOLTAGE_SHIFT 8
  54 +#define BQ2477X_INPUT_CURRENT_SHIFT 6
  55 +
  56 +#define BQ2477X_ENABLE_CHARGE_MASK BIT(0)
  57 +#define BQ2477X_WATCHDOG_TIMER 0x60
  58 +
  59 +#define BQ2477X_MAX_REGS (BQ2477X_INPUT_CURRENT + 1)
  60 +
  61 +struct bq2477x_platform_data {
  62 + int irq;
  63 + int dac_ctrl;
  64 + int dac_ichg;
  65 + int dac_v;
  66 + int dac_minsv;
  67 + int dac_iin;
  68 + int wdt_refresh_timeout;
  69 + int gpio;
  70 + int charger_detect_gpio;
  71 + int charger_detect_gpio_active_low;
  72 +};
  73 +#endif /* __LINUX_POWER_BQ2477X_CHARGER_H */