Commit 66bfbd2c5b35dc81edce0c24843c476161ab5978

Authored by Philip, Avinash
1 parent 370630359c
Exists in master

arm:omap:am33xx - GPMC timings

Default timing causes issues with OOB data corruption on reading and
causes UBIFS torture test. To resolve the above issue, NAND was tested
with different timings and optimal timings were adapted after repeated
tests and trials.

Signed-off-by: Philip, Avinash <avinashphilip@ti.com>

Showing 1 changed file with 26 additions and 2 deletions Side-by-side Diff

arch/arm/mach-omap2/board-flash.c
... ... @@ -131,6 +131,29 @@
131 131 .wr_data_mux_bus = 0,
132 132 };
133 133  
  134 +static struct gpmc_timings am335x_nand_timings = {
  135 +
  136 + .sync_clk = 0,
  137 +
  138 + .cs_on = 0,
  139 + .cs_rd_off = 44,
  140 + .cs_wr_off = 44,
  141 +
  142 + .adv_on = 6,
  143 + .adv_rd_off = 34,
  144 + .adv_wr_off = 44,
  145 +
  146 + .we_off = 40,
  147 + .oe_off = 54,
  148 +
  149 + .access = 64,
  150 + .rd_cycle = 82,
  151 + .wr_cycle = 82,
  152 +
  153 + .wr_access = 40,
  154 + .wr_data_mux_bus = 0,
  155 +};
  156 +
134 157 static struct omap_nand_platform_data board_nand_data = {
135 158 .gpmc_t = &nand_timings,
136 159 };
... ... @@ -148,8 +171,9 @@
148 171 board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
149 172  
150 173 if (cpu_is_am335x()) {
151   - board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
152   - board_nand_data.xfer_type = NAND_OMAP_PREFETCH_POLLED;
  174 + board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW;
  175 + board_nand_data.xfer_type = NAND_OMAP_PREFETCH_POLLED;
  176 + board_nand_data.gpmc_t = &am335x_nand_timings;
153 177 }
154 178  
155 179 gpmc_nand_init(&board_nand_data);