Eric Lee / linux-smarc-t335x-v3.2

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/*

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/*

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* Code for AM335X EVM.

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* Code for AM335X EVM.

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*

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*

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*

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*

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* This program is free software; you can redistribute it and/or

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* This program is free software; you can redistribute it and/or

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* modify it under the terms of the GNU General Public License as

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* modify it under the terms of the GNU General Public License as

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* published by the Free Software Foundation version 2.

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* published by the Free Software Foundation version 2.

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*

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*

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* This program is distributed "as is" WITHOUT ANY WARRANTY of any

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* This program is distributed "as is" WITHOUT ANY WARRANTY of any

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* kind, whether express or implied; without even the implied warranty

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* kind, whether express or implied; without even the implied warranty

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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the

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* GNU General Public License for more details.

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* GNU General Public License for more details.

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*/

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*/

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#include <linux/kernel.h>

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#include <linux/kernel.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/i2c.h>

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#include <linux/i2c.h>

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/i2c/at24.h>

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#include <linux/i2c/at24.h>

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#include <linux/phy.h>

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#include <linux/phy.h>

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#include <linux/gpio.h>

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#include <linux/gpio.h>

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#include <linux/spi/spi.h>

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#include <linux/spi/spi.h>

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#include <linux/spi/flash.h>

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#include <linux/spi/flash.h>

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#include <linux/gpio_keys.h>

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#include <linux/gpio_keys.h>

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#include <linux/input.h>

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#include <linux/input.h>

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#include <linux/input/matrix_keypad.h>

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#include <linux/input/matrix_keypad.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/mtd.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/nand.h>

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#include <linux/mtd/partitions.h>

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#include <linux/mtd/partitions.h>

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#include <linux/platform_device.h>

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#include <linux/platform_device.h>

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#include <linux/clk.h>

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#include <linux/clk.h>

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#include <linux/err.h>

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#include <linux/err.h>

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#include <linux/export.h>

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#include <linux/export.h>

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#include <linux/wl12xx.h>

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#include <linux/wl12xx.h>

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#include <linux/ethtool.h>

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#include <linux/ethtool.h>

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#include <linux/mfd/tps65910.h>

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#include <linux/mfd/tps65910.h>

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#include <linux/mfd/tps65217.h>

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#include <linux/mfd/tps65217.h>

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#include <linux/pwm_backlight.h>

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#include <linux/pwm_backlight.h>

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#include <linux/input/ti_tsc.h>

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#include <linux/input/ti_tsc.h>

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#include <linux/platform_data/ti_adc.h>

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#include <linux/platform_data/ti_adc.h>

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#include <linux/mfd/ti_tscadc.h>

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#include <linux/mfd/ti_tscadc.h>

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#include <linux/reboot.h>

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#include <linux/reboot.h>

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#include <linux/pwm/pwm.h>

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#include <linux/pwm/pwm.h>

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#include <linux/rtc/rtc-omap.h>

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#include <linux/rtc/rtc-omap.h>

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#include <linux/opp.h>

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#include <linux/opp.h>

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/* LCD controller is similar to DA850 */

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/* LCD controller is similar to DA850 */

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#include <video/da8xx-fb.h>

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#include <video/da8xx-fb.h>

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#include <mach/hardware.h>

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#include <mach/hardware.h>

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#include <mach/board-am335xevm.h>

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#include <mach/board-am335xevm.h>

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#include <asm/mach-types.h>

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#include <asm/mach-types.h>

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#include <asm/mach/arch.h>

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#include <asm/mach/arch.h>

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#include <asm/mach/map.h>

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#include <asm/mach/map.h>

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#include <asm/hardware/asp.h>

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#include <asm/hardware/asp.h>

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#include <plat/omap_device.h>

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#include <plat/omap_device.h>

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#include <plat/omap-pm.h>

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#include <plat/omap-pm.h>

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#include <plat/irqs.h>

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#include <plat/irqs.h>

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#include <plat/board.h>

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#include <plat/board.h>

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#include <plat/common.h>

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#include <plat/common.h>

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#include <plat/lcdc.h>

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#include <plat/lcdc.h>

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#include <plat/usb.h>

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#include <plat/usb.h>

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#include <plat/mmc.h>

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#include <plat/mmc.h>

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#include <plat/emif.h>

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#include <plat/emif.h>

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#include <plat/nand.h>

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#include <plat/nand.h>

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#include "board-flash.h"

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#include "board-flash.h"

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#include "cpuidle33xx.h"

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#include "cpuidle33xx.h"

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#include "mux.h"

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#include "mux.h"

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#include "devices.h"

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#include "devices.h"

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#include "hsmmc.h"

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#include "hsmmc.h"

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/* Convert GPIO signal to GPIO pin number */

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/* Convert GPIO signal to GPIO pin number */

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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))

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#define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))

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/* BBB PHY IDs */

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/* BBB PHY IDs */

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#define BBB_PHY_ID 0x7c0f1

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#define BBB_PHY_ID 0x7c0f1

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#define BBB_PHY_MASK 0xfffffffe

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#define BBB_PHY_MASK 0xfffffffe

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/* AM335X EVM Phy ID and Debug Registers */

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/* AM335X EVM Phy ID and Debug Registers */

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#define AM335X_EVM_PHY_ID 0x4dd074

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#define AM335X_EVM_PHY_ID 0x4dd074

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#define AM335X_EVM_PHY_MASK 0xfffffffe

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#define AM335X_EVM_PHY_MASK 0xfffffffe

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#define AR8051_PHY_DEBUG_ADDR_REG 0x1d

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#define AR8051_PHY_DEBUG_ADDR_REG 0x1d

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#define AR8051_PHY_DEBUG_DATA_REG 0x1e

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#define AR8051_PHY_DEBUG_DATA_REG 0x1e

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#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5

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#define AR8051_DEBUG_RGMII_CLK_DLY_REG 0x5

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#define AR8051_RGMII_TX_CLK_DLY BIT(8)

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#define AR8051_RGMII_TX_CLK_DLY BIT(8)

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static const struct display_panel disp_panel = {

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static const struct display_panel disp_panel = {

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WVGA,

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WVGA,

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32,

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32,

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32,

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32,

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COLOR_ACTIVE,

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COLOR_ACTIVE,

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};

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};

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/* LCD backlight platform Data */

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/* LCD backlight platform Data */

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#define AM335X_BACKLIGHT_MAX_BRIGHTNESS 100

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#define AM335X_BACKLIGHT_MAX_BRIGHTNESS 100

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#define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS 100

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#define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS 100

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#define AM335X_PWM_PERIOD_NANO_SECONDS (5000 * 10)

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#define AM335X_PWM_PERIOD_NANO_SECONDS (5000 * 10)

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static struct platform_pwm_backlight_data am335x_backlight_data0 = {

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static struct platform_pwm_backlight_data am335x_backlight_data0 = {

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.pwm_id = "ecap.0",

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.pwm_id = "ecap.0",

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.ch = -1,

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.ch = -1,

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.lth_brightness = 21,

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.lth_brightness = 21,

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.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,

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.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,

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.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,

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.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,

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.pwm_period_ns = AM335X_PWM_PERIOD_NANO_SECONDS,

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.pwm_period_ns = AM335X_PWM_PERIOD_NANO_SECONDS,

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};

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};

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static struct platform_pwm_backlight_data am335x_backlight_data2 = {

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static struct platform_pwm_backlight_data am335x_backlight_data2 = {

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.pwm_id = "ecap.2",

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.pwm_id = "ecap.2",

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.ch = -1,

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.ch = -1,

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.lth_brightness = 21,

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.lth_brightness = 21,

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.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,

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.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,

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.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,

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.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,

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.pwm_period_ns = AM335X_PWM_PERIOD_NANO_SECONDS,

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.pwm_period_ns = AM335X_PWM_PERIOD_NANO_SECONDS,

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};

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};

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static struct lcd_ctrl_config lcd_cfg = {

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static struct lcd_ctrl_config lcd_cfg = {

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&disp_panel,

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&disp_panel,

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.ac_bias = 255,

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.ac_bias = 255,

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.ac_bias_intrpt = 0,

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.ac_bias_intrpt = 0,

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.dma_burst_sz = 16,

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.dma_burst_sz = 16,

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.bpp = 32,

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.bpp = 32,

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.fdd = 0x80,

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.fdd = 0x80,

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.tft_alt_mode = 0,

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.tft_alt_mode = 0,

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.stn_565_mode = 0,

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.stn_565_mode = 0,

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.mono_8bit_mode = 0,

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.mono_8bit_mode = 0,

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.invert_line_clock = 1,

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.invert_line_clock = 1,

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.invert_frm_clock = 1,

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.invert_frm_clock = 1,

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.sync_edge = 0,

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.sync_edge = 0,

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.sync_ctrl = 1,

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.sync_ctrl = 1,

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.raster_order = 0,

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.raster_order = 0,

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};

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};

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struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {

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struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {

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.manu_name = "ThreeFive",

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.manu_name = "ThreeFive",

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.controller_data = &lcd_cfg,

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.controller_data = &lcd_cfg,

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.type = "TFC_S9700RTWV35TR_01B",

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.type = "TFC_S9700RTWV35TR_01B",

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};

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};

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struct da8xx_lcdc_platform_data NHD_480272MF_ATXI_pdata = {

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struct da8xx_lcdc_platform_data NHD_480272MF_ATXI_pdata = {

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.manu_name = "NHD",

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.manu_name = "NHD",

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.controller_data = &lcd_cfg,

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.controller_data = &lcd_cfg,

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.type = "NHD-4.3-ATXI#-T-1",

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.type = "NHD-4.3-ATXI#-T-1",

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};

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};

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#include "common.h"

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#include "common.h"

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#include <linux/lis3lv02d.h>

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#include <linux/lis3lv02d.h>

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/* TSc controller */

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/* TSc controller */

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static struct tsc_data am335x_touchscreen_data = {

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static struct tsc_data am335x_touchscreen_data = {

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.wires = 4,

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.wires = 4,

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.x_plate_resistance = 200,

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.x_plate_resistance = 200,

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.steps_to_configure = 5,

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.steps_to_configure = 5,

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};

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};

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static struct adc_data am335x_adc_data = {

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static struct adc_data am335x_adc_data = {

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.adc_channels = 4,

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.adc_channels = 4,

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};

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};

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static struct mfd_tscadc_board tscadc = {

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static struct mfd_tscadc_board tscadc = {

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.tsc_init = &am335x_touchscreen_data,

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.tsc_init = &am335x_touchscreen_data,

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.adc_init = &am335x_adc_data,

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.adc_init = &am335x_adc_data,

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};

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};

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static u8 am335x_iis_serializer_direction1[] = {

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static u8 am335x_iis_serializer_direction1[] = {

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INACTIVE_MODE, INACTIVE_MODE, TX_MODE, RX_MODE,

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INACTIVE_MODE, INACTIVE_MODE, TX_MODE, RX_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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};

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};

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static struct snd_platform_data am335x_evm_snd_data1 = {

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static struct snd_platform_data am335x_evm_snd_data1 = {

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.tx_dma_offset = 0x46400000, /* McASP1 */

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.tx_dma_offset = 0x46400000, /* McASP1 */

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.rx_dma_offset = 0x46400000,

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.rx_dma_offset = 0x46400000,

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.op_mode = DAVINCI_MCASP_IIS_MODE,

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.op_mode = DAVINCI_MCASP_IIS_MODE,

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.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),

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.num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),

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.tdm_slots = 2,

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.tdm_slots = 2,

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.serial_dir = am335x_iis_serializer_direction1,

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.serial_dir = am335x_iis_serializer_direction1,

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.asp_chan_q = EVENTQ_2,

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.asp_chan_q = EVENTQ_2,

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.version = MCASP_VERSION_3,

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.version = MCASP_VERSION_3,

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.txnumevt = 32,

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.txnumevt = 32,

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.rxnumevt = 32,

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.rxnumevt = 32,

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.get_context_loss_count =

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.get_context_loss_count =

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omap_pm_get_dev_context_loss_count,

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omap_pm_get_dev_context_loss_count,

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};

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};

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static u8 am335x_evm_sk_iis_serializer_direction1[] = {

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static u8 am335x_evm_sk_iis_serializer_direction1[] = {

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INACTIVE_MODE, INACTIVE_MODE, TX_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, TX_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,

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};

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};

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static struct snd_platform_data am335x_evm_sk_snd_data1 = {

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static struct snd_platform_data am335x_evm_sk_snd_data1 = {

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.tx_dma_offset = 0x46400000, /* McASP1 */

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.tx_dma_offset = 0x46400000, /* McASP1 */

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/*.rx_dma_offset = 0x46400000,*/

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/*.rx_dma_offset = 0x46400000,*/

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.op_mode = DAVINCI_MCASP_IIS_MODE,

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.op_mode = DAVINCI_MCASP_IIS_MODE,

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.num_serializer = ARRAY_SIZE(am335x_evm_sk_iis_serializer_direction1),

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.num_serializer = ARRAY_SIZE(am335x_evm_sk_iis_serializer_direction1),

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.tdm_slots = 2,

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.tdm_slots = 2,

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.serial_dir = am335x_evm_sk_iis_serializer_direction1,

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.serial_dir = am335x_evm_sk_iis_serializer_direction1,

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.asp_chan_q = EVENTQ_2,

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.asp_chan_q = EVENTQ_2,

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.version = MCASP_VERSION_3,

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.version = MCASP_VERSION_3,

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.txnumevt = 32,

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.txnumevt = 32,

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.get_context_loss_count =

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.get_context_loss_count =

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omap_pm_get_dev_context_loss_count,

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omap_pm_get_dev_context_loss_count,

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};

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};

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static struct omap2_hsmmc_info am335x_mmc[] __initdata = {

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static struct omap2_hsmmc_info am335x_mmc[] __initdata = {

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{

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{

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.mmc = 1,

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.mmc = 1,

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.caps = MMC_CAP_4_BIT_DATA,

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.caps = MMC_CAP_4_BIT_DATA,

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.gpio_cd = GPIO_TO_PIN(0, 6),

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.gpio_cd = GPIO_TO_PIN(0, 6),

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.gpio_wp = GPIO_TO_PIN(3, 18),

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.gpio_wp = GPIO_TO_PIN(3, 18),

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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */

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.ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */

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},

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},

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{

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{

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.mmc = 0, /* will be set at runtime */

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.mmc = 0, /* will be set at runtime */

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},

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},

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{

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{

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.mmc = 0, /* will be set at runtime */

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.mmc = 0, /* will be set at runtime */

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},

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},

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{} /* Terminator */

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{} /* Terminator */

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};

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};

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#ifdef CONFIG_OMAP_MUX

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#ifdef CONFIG_OMAP_MUX

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static struct omap_board_mux board_mux[] __initdata = {

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static struct omap_board_mux board_mux[] __initdata = {

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/*

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/*

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* Setting SYSBOOT[5] should set xdma_event_intr0 pin to mode 3 thereby

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* Setting SYSBOOT[5] should set xdma_event_intr0 pin to mode 3 thereby

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* allowing clkout1 to be available on xdma_event_intr0.

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* allowing clkout1 to be available on xdma_event_intr0.

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* However, on some boards (like EVM-SK), SYSBOOT[5] isn't properly

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* However, on some boards (like EVM-SK), SYSBOOT[5] isn't properly

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* latched.

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* latched.

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* To be extra cautious, setup the pin-mux manually.

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* To be extra cautious, setup the pin-mux manually.

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* If any modules/usecase requries it in different mode, then subsequent

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* If any modules/usecase requries it in different mode, then subsequent

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* module init call will change the mux accordingly.

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* module init call will change the mux accordingly.

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*/

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*/

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AM33XX_MUX(XDMA_EVENT_INTR0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT),

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AM33XX_MUX(XDMA_EVENT_INTR0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT),

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AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |

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AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |

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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),

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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),

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AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |

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AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |

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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),

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AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),

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{ .reg_offset = OMAP_MUX_TERMINATOR },

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{ .reg_offset = OMAP_MUX_TERMINATOR },

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};

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};

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#else

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#else

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#define board_mux NULL

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#define board_mux NULL

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#endif

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#endif

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/* module pin mux structure */

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/* module pin mux structure */

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struct pinmux_config {

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struct pinmux_config {

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const char *string_name; /* signal name format */

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const char *string_name; /* signal name format */

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int val; /* Options for the mux register value */

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int val; /* Options for the mux register value */

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};

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};

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struct evm_dev_cfg {

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struct evm_dev_cfg {

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void (*device_init)(int evm_id, int profile);

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void (*device_init)(int evm_id, int profile);

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/*

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/*

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* If the device is required on both baseboard & daughter board (ex i2c),

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* If the device is required on both baseboard & daughter board (ex i2c),

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* specify DEV_ON_BASEBOARD

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* specify DEV_ON_BASEBOARD

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*/

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*/

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#define DEV_ON_BASEBOARD 0

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#define DEV_ON_BASEBOARD 0

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#define DEV_ON_DGHTR_BRD 1

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#define DEV_ON_DGHTR_BRD 1

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u32 device_on;

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u32 device_on;

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u32 profile; /* Profiles (0-7) in which the module is present */

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u32 profile; /* Profiles (0-7) in which the module is present */

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};

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};

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/* AM335X - CPLD Register Offsets */

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/* AM335X - CPLD Register Offsets */

273

#define CPLD_DEVICE_HDR 0x00 /* CPLD Header */

273

#define CPLD_DEVICE_HDR 0x00 /* CPLD Header */

274

#define CPLD_DEVICE_ID 0x04 /* CPLD identification */

274

#define CPLD_DEVICE_ID 0x04 /* CPLD identification */

275

#define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */

275

#define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */

276

#define CPLD_CFG_REG 0x10 /* Configuration Register */

276

#define CPLD_CFG_REG 0x10 /* Configuration Register */

277

278

static struct i2c_client *cpld_client;

278

static struct i2c_client *cpld_client;

279

static u32 am335x_evm_id;

279

static u32 am335x_evm_id;

280

static struct omap_board_config_kernel am335x_evm_config[] __initdata = {

280

static struct omap_board_config_kernel am335x_evm_config[] __initdata = {

281

};

281

};

282

283

/*

283

/*

284

* EVM Config held in On-Board eeprom device.

284

* EVM Config held in On-Board eeprom device.

285

*

285

*

286

* Header Format

286

* Header Format

287

*

287

*

288

* Name Size Contents

288

* Name Size Contents

289

* (Bytes)

289

* (Bytes)

290

*-------------------------------------------------------------

290

*-------------------------------------------------------------

291

* Header 4 0xAA, 0x55, 0x33, 0xEE

291

* Header 4 0xAA, 0x55, 0x33, 0xEE

292

*

292

*

293

* Board Name 8 Name for board in ASCII.

293

* Board Name 8 Name for board in ASCII.

294

* Example "A33515BB" = "AM335x 15x15 Base Board"

294

* Example "A33515BB" = "AM335x 15x15 Base Board"

295

*

295

*

296

* Version 4 Hardware version code for board in ASCII.

296

* Version 4 Hardware version code for board in ASCII.

297

* "1.0A" = rev.01.0A

297

* "1.0A" = rev.01.0A

298

*

298

*

299

* Serial Number 12 Serial number of the board. This is a 12

299

* Serial Number 12 Serial number of the board. This is a 12

300

* character string which is WWYY4P16nnnn, where

300

* character string which is WWYY4P16nnnn, where

301

* WW = 2 digit week of the year of production

301

* WW = 2 digit week of the year of production

302

* YY = 2 digit year of production

302

* YY = 2 digit year of production

303

* nnnn = incrementing board number

303

* nnnn = incrementing board number

304

*

304

*

305

* Configuration option 32 Codes(TBD) to show the configuration

305

* Configuration option 32 Codes(TBD) to show the configuration

306

* setup on this board.

306

* setup on this board.

307

*

307

*

308

* Available 32720 Available space for other non-volatile data.

308

* Available 32720 Available space for other non-volatile data.

309

*/

309

*/

310

struct am335x_evm_eeprom_config {

310

struct am335x_evm_eeprom_config {

311

u32 header;

311

u32 header;

312

u8 name[8];

312

u8 name[8];

313

char version[4];

313

char version[4];

314

u8 serial[12];

314

u8 serial[12];

315

u8 opt[32];

315

u8 opt[32];

316

};

316

};

317

318

/*

318

/*

319

* EVM Config held in daughter board eeprom device.

319

* EVM Config held in daughter board eeprom device.

320

*

320

*

321

* Header Format

321

* Header Format

322

*

322

*

323

* Name Size Contents

323

* Name Size Contents

324

* (Bytes)

324

* (Bytes)

325

*-------------------------------------------------------------

325

*-------------------------------------------------------------

326

* Header 4 0xAA, 0x55, 0x33, 0xEE

326

* Header 4 0xAA, 0x55, 0x33, 0xEE

327

*

327

*

328

* Board Name 8 Name for board in ASCII.

328

* Board Name 8 Name for board in ASCII.

329

* example "A335GPBD" = "AM335x

329

* example "A335GPBD" = "AM335x

330

* General Purpose Daughterboard"

330

* General Purpose Daughterboard"

331

*

331

*

332

* Version 4 Hardware version code for board in

332

* Version 4 Hardware version code for board in

333

* in ASCII. "1.0A" = rev.01.0A

333

* in ASCII. "1.0A" = rev.01.0A

334

* Serial Number 12 Serial number of the board. This is a 12

334

* Serial Number 12 Serial number of the board. This is a 12

335

* character string which is: WWYY4P13nnnn, where

335

* character string which is: WWYY4P13nnnn, where

336

* WW = 2 digit week of the year of production

336

* WW = 2 digit week of the year of production

337

* YY = 2 digit year of production

337

* YY = 2 digit year of production

338

* nnnn = incrementing board number

338

* nnnn = incrementing board number

339

* Configuration Option 32 Codes to show the configuration

339

* Configuration Option 32 Codes to show the configuration

340

* setup on this board.

340

* setup on this board.

341

* CPLD Version 8 CPLD code version for board in ASCII

341

* CPLD Version 8 CPLD code version for board in ASCII

342

* "CPLD1.0A" = rev. 01.0A of the CPLD

342

* "CPLD1.0A" = rev. 01.0A of the CPLD

343

* Available 32700 Available space for other non-volatile

343

* Available 32700 Available space for other non-volatile

344

* codes/data

344

* codes/data

345

*/

345

*/

346

347

struct am335x_eeprom_config1 {

347

struct am335x_eeprom_config1 {

348

u32 header;

348

u32 header;

349

u8 name[8];

349

u8 name[8];

350

char version[4];

350

char version[4];

351

u8 serial[12];

351

u8 serial[12];

352

u8 opt[32];

352

u8 opt[32];

353

u8 cpld_ver[8];

353

u8 cpld_ver[8];

354

};

354

};

355

356

static struct am335x_evm_eeprom_config config;

356

static struct am335x_evm_eeprom_config config;

357

static struct am335x_eeprom_config1 config1;

357

static struct am335x_eeprom_config1 config1;

358

static bool daughter_brd_detected;

358

static bool daughter_brd_detected;

359

360

#define EEPROM_MAC_ADDRESS_OFFSET 60 /* 4+8+4+12+32 */

360

#define EEPROM_MAC_ADDRESS_OFFSET 60 /* 4+8+4+12+32 */

361

#define EEPROM_NO_OF_MAC_ADDR 3

361

#define EEPROM_NO_OF_MAC_ADDR 3

362

static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];

362

static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];

363

364

#define AM335X_EEPROM_HEADER 0xEE3355AA

364

#define AM335X_EEPROM_HEADER 0xEE3355AA

365

366

static int am33xx_evmid = -EINVAL;

366

static int am33xx_evmid = -EINVAL;

367

368

/*

368

/*

369

* am335x_evm_set_id - set up board evmid

369

* am335x_evm_set_id - set up board evmid

370

* @evmid - evm id which needs to be configured

370

* @evmid - evm id which needs to be configured

371

*

371

*

372

* This function is called to configure board evm id.

372

* This function is called to configure board evm id.

373

*/

373

*/

374

void am335x_evm_set_id(unsigned int evmid)

374

void am335x_evm_set_id(unsigned int evmid)

375

{

375

{

376

am33xx_evmid = evmid;

376

am33xx_evmid = evmid;

377

return;

377

return;

378

}

378

}

379

380

/*

380

/*

381

* am335x_evm_get_id - returns Board Type (EVM/BB/EVM-SK ...)

381

* am335x_evm_get_id - returns Board Type (EVM/BB/EVM-SK ...)

382

*

382

*

383

* Note:

383

* Note:

384

* returns -EINVAL if Board detection hasn't happened yet.

384

* returns -EINVAL if Board detection hasn't happened yet.

385

*/

385

*/

386

int am335x_evm_get_id(void)

386

int am335x_evm_get_id(void)

387

{

387

{

388

return am33xx_evmid;

388

return am33xx_evmid;

389

}

389

}

390

EXPORT_SYMBOL(am335x_evm_get_id);

390

EXPORT_SYMBOL(am335x_evm_get_id);

391

392

/* current profile if exists else PROFILE_0 on error */

392

/* current profile if exists else PROFILE_0 on error */

393

static u32 am335x_get_profile_selection(void)

393

static u32 am335x_get_profile_selection(void)

394

{

394

{

395

int val = 0;

395

int val = 0;

396

397

if (!cpld_client)

397

if (!cpld_client)

398

/* error checking is not done in func's calling this routine.

398

/* error checking is not done in func's calling this routine.

399

so return profile 0 on error */

399

so return profile 0 on error */

400

return 0;

400

return 0;

401

402

val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);

402

val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);

403

if (val < 0)

403

if (val < 0)

404

return 0; /* default to Profile 0 on Error */

404

return 0; /* default to Profile 0 on Error */

405

else

405

else

406

return val & 0x7;

406

return val & 0x7;

407

}

407

}

408

409

static struct pinmux_config haptics_pin_mux[] = {

409

static struct pinmux_config haptics_pin_mux[] = {

410

{"gpmc_ad9.ehrpwm2B", OMAP_MUX_MODE4 |

410

{"gpmc_ad9.ehrpwm2B", OMAP_MUX_MODE4 |

411

AM33XX_PIN_OUTPUT},

411

AM33XX_PIN_OUTPUT},

412

{NULL, 0},

412

{NULL, 0},

413

};

413

};

414

415

/* Module pin mux for LCDC */

415

/* Module pin mux for LCDC */

416

static struct pinmux_config lcdc_pin_mux[] = {

416

static struct pinmux_config lcdc_pin_mux[] = {

417

{"lcd_data0.lcd_data0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

417

{"lcd_data0.lcd_data0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

418

| AM33XX_PULL_DISA},

418

| AM33XX_PULL_DISA},

419

{"lcd_data1.lcd_data1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

419

{"lcd_data1.lcd_data1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

420

| AM33XX_PULL_DISA},

420

| AM33XX_PULL_DISA},

421

{"lcd_data2.lcd_data2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

421

{"lcd_data2.lcd_data2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

422

| AM33XX_PULL_DISA},

422

| AM33XX_PULL_DISA},

423

{"lcd_data3.lcd_data3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

423

{"lcd_data3.lcd_data3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

424

| AM33XX_PULL_DISA},

424

| AM33XX_PULL_DISA},

425

{"lcd_data4.lcd_data4", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

425

{"lcd_data4.lcd_data4", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

426

| AM33XX_PULL_DISA},

426

| AM33XX_PULL_DISA},

427

{"lcd_data5.lcd_data5", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

427

{"lcd_data5.lcd_data5", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

428

| AM33XX_PULL_DISA},

428

| AM33XX_PULL_DISA},

429

{"lcd_data6.lcd_data6", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

429

{"lcd_data6.lcd_data6", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

430

| AM33XX_PULL_DISA},

430

| AM33XX_PULL_DISA},

431

{"lcd_data7.lcd_data7", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

431

{"lcd_data7.lcd_data7", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

432

| AM33XX_PULL_DISA},

432

| AM33XX_PULL_DISA},

433

{"lcd_data8.lcd_data8", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

433

{"lcd_data8.lcd_data8", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

434

| AM33XX_PULL_DISA},

434

| AM33XX_PULL_DISA},

435

{"lcd_data9.lcd_data9", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

435

{"lcd_data9.lcd_data9", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

436

| AM33XX_PULL_DISA},

436

| AM33XX_PULL_DISA},

437

{"lcd_data10.lcd_data10", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

437

{"lcd_data10.lcd_data10", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

438

| AM33XX_PULL_DISA},

438

| AM33XX_PULL_DISA},

439

{"lcd_data11.lcd_data11", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

439

{"lcd_data11.lcd_data11", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

440

| AM33XX_PULL_DISA},

440

| AM33XX_PULL_DISA},

441

{"lcd_data12.lcd_data12", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

441

{"lcd_data12.lcd_data12", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

442

| AM33XX_PULL_DISA},

442

| AM33XX_PULL_DISA},

443

{"lcd_data13.lcd_data13", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

443

{"lcd_data13.lcd_data13", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

444

| AM33XX_PULL_DISA},

444

| AM33XX_PULL_DISA},

445

{"lcd_data14.lcd_data14", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

445

{"lcd_data14.lcd_data14", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

446

| AM33XX_PULL_DISA},

446

| AM33XX_PULL_DISA},

447

{"lcd_data15.lcd_data15", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

447

{"lcd_data15.lcd_data15", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT

448

| AM33XX_PULL_DISA},

448

| AM33XX_PULL_DISA},

449

{"gpmc_ad8.lcd_data16", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

449

{"gpmc_ad8.lcd_data16", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

450

{"gpmc_ad9.lcd_data17", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

450

{"gpmc_ad9.lcd_data17", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

451

{"gpmc_ad10.lcd_data18", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

451

{"gpmc_ad10.lcd_data18", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

452

{"gpmc_ad11.lcd_data19", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

452

{"gpmc_ad11.lcd_data19", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

453

{"gpmc_ad12.lcd_data20", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

453

{"gpmc_ad12.lcd_data20", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

454

{"gpmc_ad13.lcd_data21", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

454

{"gpmc_ad13.lcd_data21", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

455

{"gpmc_ad14.lcd_data22", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

455

{"gpmc_ad14.lcd_data22", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

456

{"gpmc_ad15.lcd_data23", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

456

{"gpmc_ad15.lcd_data23", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

457

{"lcd_vsync.lcd_vsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

457

{"lcd_vsync.lcd_vsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

458

{"lcd_hsync.lcd_hsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

458

{"lcd_hsync.lcd_hsync", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

459

{"lcd_pclk.lcd_pclk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

459

{"lcd_pclk.lcd_pclk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

460

{"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

460

{"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

461

{NULL, 0},

461

{NULL, 0},

462

};

462

};

463

464

/* Pin mux for nand flash module */

464

/* Pin mux for nand flash module */

465

static struct pinmux_config nand_pin_mux[] = {

465

static struct pinmux_config nand_pin_mux[] = {

466

{"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

466

{"gpmc_ad0.gpmc_ad0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

467

{"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

467

{"gpmc_ad1.gpmc_ad1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

468

{"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

468

{"gpmc_ad2.gpmc_ad2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

469

{"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

469

{"gpmc_ad3.gpmc_ad3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

470

{"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

470

{"gpmc_ad4.gpmc_ad4", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

471

{"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

471

{"gpmc_ad5.gpmc_ad5", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

472

{"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

472

{"gpmc_ad6.gpmc_ad6", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

473

{"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

473

{"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

474

{"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

474

{"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

475

{"gpmc_wpn.gpmc_wpn", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

475

{"gpmc_wpn.gpmc_wpn", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

476

{"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

476

{"gpmc_csn0.gpmc_csn0", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

477

{"gpmc_advn_ale.gpmc_advn_ale", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

477

{"gpmc_advn_ale.gpmc_advn_ale", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

478

{"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

478

{"gpmc_oen_ren.gpmc_oen_ren", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

479

{"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

479

{"gpmc_wen.gpmc_wen", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

480

{"gpmc_ben0_cle.gpmc_ben0_cle", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

480

{"gpmc_ben0_cle.gpmc_ben0_cle", OMAP_MUX_MODE0 | AM33XX_PULL_DISA},

481

{NULL, 0},

481

{NULL, 0},

482

};

482

};

483

484

/* Module pin mux for SPI fash */

484

/* Module pin mux for SPI fash */

485

static struct pinmux_config spi0_pin_mux[] = {

485

static struct pinmux_config spi0_pin_mux[] = {

486

{"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL

486

{"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL

487

| AM33XX_INPUT_EN},

487

| AM33XX_INPUT_EN},

488

{"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP

488

{"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP

489

| AM33XX_INPUT_EN},

489

| AM33XX_INPUT_EN},

490

{"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL

490

{"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL

491

| AM33XX_INPUT_EN},

491

| AM33XX_INPUT_EN},

492

{"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP

492

{"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP

493

| AM33XX_INPUT_EN},

493

| AM33XX_INPUT_EN},

494

{NULL, 0},

494

{NULL, 0},

495

};

495

};

496

497

/* Module pin mux for SPI flash */

497

/* Module pin mux for SPI flash */

498

static struct pinmux_config spi1_pin_mux[] = {

498

static struct pinmux_config spi1_pin_mux[] = {

499

{"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

499

{"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

500

| AM33XX_INPUT_EN},

500

| AM33XX_INPUT_EN},

501

{"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

501

{"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

502

| AM33XX_PULL_UP | AM33XX_INPUT_EN},

502

| AM33XX_PULL_UP | AM33XX_INPUT_EN},

503

{"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

503

{"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

504

| AM33XX_INPUT_EN},

504

| AM33XX_INPUT_EN},

505

{"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

505

{"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL

506

| AM33XX_PULL_UP | AM33XX_INPUT_EN},

506

| AM33XX_PULL_UP | AM33XX_INPUT_EN},

507

{NULL, 0},

507

{NULL, 0},

508

};

508

};

509

510

/* Module pin mux for rgmii1 */

510

/* Module pin mux for rgmii1 */

511

static struct pinmux_config rgmii1_pin_mux[] = {

511

static struct pinmux_config rgmii1_pin_mux[] = {

512

{"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

512

{"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

513

{"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

513

{"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

514

{"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

514

{"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

515

{"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

515

{"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

516

{"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

516

{"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

517

{"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

517

{"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

518

{"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

518

{"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

519

{"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

519

{"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

520

{"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

520

{"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

521

{"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

521

{"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

522

{"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

522

{"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

523

{"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

523

{"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

524

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

524

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

525

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

525

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

526

{NULL, 0},

526

{NULL, 0},

527

};

527

};

528

529

/* Module pin mux for rgmii2 */

529

/* Module pin mux for rgmii2 */

530

static struct pinmux_config rgmii2_pin_mux[] = {

530

static struct pinmux_config rgmii2_pin_mux[] = {

531

{"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

531

{"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

532

{"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

532

{"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

533

{"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

533

{"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

534

{"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

534

{"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

535

{"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

535

{"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

536

{"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

536

{"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

537

{"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

537

{"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},

538

{"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

538

{"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

539

{"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

539

{"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

540

{"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

540

{"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

541

{"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

541

{"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

542

{"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

542

{"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},

543

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

543

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

544

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

544

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

545

{NULL, 0},

545

{NULL, 0},

546

};

546

};

547

548

/* Module pin mux for mii1 */

548

/* Module pin mux for mii1 */

549

static struct pinmux_config mii1_pin_mux[] = {

549

static struct pinmux_config mii1_pin_mux[] = {

550

{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

550

{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

551

{"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

551

{"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

552

{"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

552

{"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

553

{"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

553

{"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

554

{"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

554

{"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

555

{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

555

{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

556

{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

556

{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

557

{"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

557

{"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

558

{"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

558

{"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

559

{"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

559

{"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

560

{"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

560

{"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

561

{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

561

{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

562

{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

562

{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

563

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

563

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

564

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

564

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

565

{NULL, 0},

565

{NULL, 0},

566

};

566

};

567

568

/* Module pin mux for rmii1 */

568

/* Module pin mux for rmii1 */

569

static struct pinmux_config rmii1_pin_mux[] = {

569

static struct pinmux_config rmii1_pin_mux[] = {

570

{"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

570

{"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

571

{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

571

{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

572

{"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

572

{"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

573

{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

573

{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

574

{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

574

{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},

575

{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

575

{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

576

{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

576

{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},

577

{"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

577

{"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},

578

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

578

{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

579

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

579

{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},

580

{NULL, 0},

580

{NULL, 0},

581

};

581

};

582

583

static struct pinmux_config i2c1_pin_mux[] = {

583

static struct pinmux_config i2c1_pin_mux[] = {

584

{"spi0_d1.i2c1_sda", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |

584

{"spi0_d1.i2c1_sda", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |

585

AM33XX_PULL_ENBL | AM33XX_INPUT_EN},

585

AM33XX_PULL_ENBL | AM33XX_INPUT_EN},

586

{"spi0_cs0.i2c1_scl", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |

586

{"spi0_cs0.i2c1_scl", OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |

587

AM33XX_PULL_ENBL | AM33XX_INPUT_EN},

587

AM33XX_PULL_ENBL | AM33XX_INPUT_EN},

588

{NULL, 0},

588

{NULL, 0},

589

};

589

};

590

591

static struct pinmux_config i2c2_pin_mux[] = {

591

static struct pinmux_config i2c2_pin_mux[] = {

592

{"uart1_ctsn.i2c2_sda", OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |

592

{"uart1_ctsn.i2c2_sda", OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |

593

AM33XX_PULL_UP | AM33XX_INPUT_EN},

593

AM33XX_PULL_UP | AM33XX_INPUT_EN},

594

{"uart1_rtsn.i2c2_scl", OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |

594

{"uart1_rtsn.i2c2_scl", OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |

595

AM33XX_PULL_UP | AM33XX_INPUT_EN},

595

AM33XX_PULL_UP | AM33XX_INPUT_EN},

596

{NULL, 0},

596

{NULL, 0},

597

};

597

};

598

599

/* Module pin mux for mcasp1 */

599

/* Module pin mux for mcasp1 */

600

static struct pinmux_config mcasp1_pin_mux[] = {

600

static struct pinmux_config mcasp1_pin_mux[] = {

601

{"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

601

{"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

602

{"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

602

{"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

603

{"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

603

{"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},

604

{"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |

604

{"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |

605

AM33XX_PIN_INPUT_PULLDOWN},

605

AM33XX_PIN_INPUT_PULLDOWN},

606

{NULL, 0},

606

{NULL, 0},

607

};

607

};

608

609

610

/* Module pin mux for mmc0 */

610

/* Module pin mux for mmc0 */

611

static struct pinmux_config mmc0_common_pin_mux[] = {

611

static struct pinmux_config mmc0_common_pin_mux[] = {

612

{"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

612

{"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

613

{"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

613

{"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

614

{"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

614

{"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

615

{"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

615

{"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

616

{"mmc0_clk.mmc0_clk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

616

{"mmc0_clk.mmc0_clk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

617

{"mmc0_cmd.mmc0_cmd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

617

{"mmc0_cmd.mmc0_cmd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

618

{NULL, 0},

618

{NULL, 0},

619

};

619

};

620

621

static struct pinmux_config mmc0_wp_only_pin_mux[] = {

621

static struct pinmux_config mmc0_wp_only_pin_mux[] = {

622

{"mcasp0_aclkr.gpio3_18", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

622

{"mcasp0_aclkr.gpio3_18", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

623

{NULL, 0},

623

{NULL, 0},

624

};

624

};

625

626

static struct pinmux_config mmc0_cd_only_pin_mux[] = {

626

static struct pinmux_config mmc0_cd_only_pin_mux[] = {

627

{"spi0_cs1.gpio0_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

627

{"spi0_cs1.gpio0_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

628

{NULL, 0},

628

{NULL, 0},

629

};

629

};

630

631

/* Module pin mux for mmc1 */

631

/* Module pin mux for mmc1 */

632

static struct pinmux_config mmc1_common_pin_mux[] = {

632

static struct pinmux_config mmc1_common_pin_mux[] = {

633

{"gpmc_ad3.mmc1_dat3", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

633

{"gpmc_ad3.mmc1_dat3", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

634

{"gpmc_ad2.mmc1_dat2", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

634

{"gpmc_ad2.mmc1_dat2", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

635

{"gpmc_ad1.mmc1_dat1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

635

{"gpmc_ad1.mmc1_dat1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

636

{"gpmc_ad0.mmc1_dat0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

636

{"gpmc_ad0.mmc1_dat0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

637

{"gpmc_csn1.mmc1_clk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

637

{"gpmc_csn1.mmc1_clk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

638

{"gpmc_csn2.mmc1_cmd", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

638

{"gpmc_csn2.mmc1_cmd", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

639

{NULL, 0},

639

{NULL, 0},

640

};

640

};

641

642

static struct pinmux_config mmc1_dat4_7_pin_mux[] = {

642

static struct pinmux_config mmc1_dat4_7_pin_mux[] = {

643

{"gpmc_ad7.mmc1_dat7", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

643

{"gpmc_ad7.mmc1_dat7", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

644

{"gpmc_ad6.mmc1_dat6", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

644

{"gpmc_ad6.mmc1_dat6", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

645

{"gpmc_ad5.mmc1_dat5", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

645

{"gpmc_ad5.mmc1_dat5", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

646

{"gpmc_ad4.mmc1_dat4", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

646

{"gpmc_ad4.mmc1_dat4", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},

647

{NULL, 0},

647

{NULL, 0},

648

};

648

};

649

650

static struct pinmux_config mmc1_wp_only_pin_mux[] = {

650

static struct pinmux_config mmc1_wp_only_pin_mux[] = {

651

{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

651

{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

652

{NULL, 0},

652

{NULL, 0},

653

};

653

};

654

655

static struct pinmux_config mmc1_cd_only_pin_mux[] = {

655

static struct pinmux_config mmc1_cd_only_pin_mux[] = {

656

{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

656

{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},

657

{NULL, 0},

657

{NULL, 0},

658

};

658

};

659

660

/* Module pin mux for uart3 */

660

/* Module pin mux for uart3 */

661

static struct pinmux_config uart3_pin_mux[] = {

661

static struct pinmux_config uart3_pin_mux[] = {

662

{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},

662

{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},

663

{"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},

663

{"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},

664

{NULL, 0},

664

{NULL, 0},

665

};

665

};

666

667

static struct pinmux_config d_can_gp_pin_mux[] = {

667

static struct pinmux_config d_can_gp_pin_mux[] = {

668

{"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},

668

{"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},

669

{"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

669

{"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

670

{NULL, 0},

670

{NULL, 0},

671

};

671

};

672

673

static struct pinmux_config d_can_ia_pin_mux[] = {

673

static struct pinmux_config d_can_ia_pin_mux[] = {

674

{"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},

674

{"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},

675

{"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

675

{"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},

676

{NULL, 0},

676

{NULL, 0},

677

};

677

};

678

679

/* Module pin mux for uart2 */

679

/* Module pin mux for uart2 */

680

static struct pinmux_config uart2_pin_mux[] = {

680

static struct pinmux_config uart2_pin_mux[] = {

681

{"spi0_sclk.uart2_rxd", OMAP_MUX_MODE1 | AM33XX_SLEWCTRL_SLOW |

681

{"spi0_sclk.uart2_rxd", OMAP_MUX_MODE1 | AM33XX_SLEWCTRL_SLOW |

682

AM33XX_PIN_INPUT_PULLUP},

682

AM33XX_PIN_INPUT_PULLUP},

683

{"spi0_d0.uart2_txd", OMAP_MUX_MODE1 | AM33XX_PULL_UP |

683

{"spi0_d0.uart2_txd", OMAP_MUX_MODE1 | AM33XX_PULL_UP |

684

AM33XX_PULL_DISA |

684

AM33XX_PULL_DISA |

685

AM33XX_SLEWCTRL_SLOW},

685

AM33XX_SLEWCTRL_SLOW},

686

{NULL, 0},

686

{NULL, 0},

687

};

687

};

688

689

/* pinmux for gpio based key */

689

/* pinmux for gpio based key */

690

static struct pinmux_config gpio_keys_pin_mux[] = {

690

static struct pinmux_config gpio_keys_pin_mux[] = {

691

{"gpmc_wait0.gpio0_30", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

691

{"gpmc_wait0.gpio0_30", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

692

{"gpmc_oen_ren.gpio2_3", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

692

{"gpmc_oen_ren.gpio2_3", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

693

{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

693

{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

694

{"gpmc_ben0_cle.gpio2_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

694

{"gpmc_ben0_cle.gpio2_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

695

{NULL, 0},

695

{NULL, 0},

696

};

696

};

697

698

/* pinmux for led device */

698

/* pinmux for led device */

699

static struct pinmux_config gpio_led_mux[] = {

699

static struct pinmux_config gpio_led_mux[] = {

700

{"gpmc_ad4.gpio1_4", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

700

{"gpmc_ad4.gpio1_4", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

701

{"gpmc_ad5.gpio1_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

701

{"gpmc_ad5.gpio1_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

702

{"gpmc_ad6.gpio1_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

702

{"gpmc_ad6.gpio1_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

703

{"gpmc_ad7.gpio1_7", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

703

{"gpmc_ad7.gpio1_7", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

704

{NULL, 0},

704

{NULL, 0},

705

};

705

};

706

707

static struct pinmux_config gpio_ddr_vtt_enb_pin_mux[] = {

707

static struct pinmux_config gpio_ddr_vtt_enb_pin_mux[] = {

708

{"ecap0_in_pwm0_out.gpio0_7", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

708

{"ecap0_in_pwm0_out.gpio0_7", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

709

{NULL, 0},

709

{NULL, 0},

710

};

710

};

711

712

/*

712

/*

713

* @pin_mux - single module pin-mux structure which defines pin-mux

713

* @pin_mux - single module pin-mux structure which defines pin-mux

714

* details for all its pins.

714

* details for all its pins.

715

*/

715

*/

716

static void setup_pin_mux(struct pinmux_config *pin_mux)

716

static void setup_pin_mux(struct pinmux_config *pin_mux)

717

{

717

{

718

int i;

718

int i;

719

720

for (i = 0; pin_mux->string_name != NULL; pin_mux++)

720

for (i = 0; pin_mux->string_name != NULL; pin_mux++)

721

omap_mux_init_signal(pin_mux->string_name, pin_mux->val);

721

omap_mux_init_signal(pin_mux->string_name, pin_mux->val);

722

723

}

723

}

724

725

/* Matrix GPIO Keypad Support for profile-0 only: TODO */

725

/* Matrix GPIO Keypad Support for profile-0 only: TODO */

726

727

/* pinmux for keypad device */

727

/* pinmux for keypad device */

728

static struct pinmux_config matrix_keypad_pin_mux[] = {

728

static struct pinmux_config matrix_keypad_pin_mux[] = {

729

{"gpmc_a5.gpio1_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

729

{"gpmc_a5.gpio1_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

730

{"gpmc_a6.gpio1_22", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

730

{"gpmc_a6.gpio1_22", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

731

{"gpmc_a9.gpio1_25", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

731

{"gpmc_a9.gpio1_25", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

732

{"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

732

{"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

733

{"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

733

{"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

734

{NULL, 0},

734

{NULL, 0},

735

};

735

};

736

737

/* Keys mapping */

737

/* Keys mapping */

738

static const uint32_t am335x_evm_matrix_keys[] = {

738

static const uint32_t am335x_evm_matrix_keys[] = {

739

KEY(0, 0, KEY_MENU),

739

KEY(0, 0, KEY_MENU),

740

KEY(1, 0, KEY_BACK),

740

KEY(1, 0, KEY_BACK),

741

KEY(2, 0, KEY_LEFT),

741

KEY(2, 0, KEY_LEFT),

742

743

KEY(0, 1, KEY_RIGHT),

743

KEY(0, 1, KEY_RIGHT),

744

KEY(1, 1, KEY_ENTER),

744

KEY(1, 1, KEY_ENTER),

745

KEY(2, 1, KEY_DOWN),

745

KEY(2, 1, KEY_DOWN),

746

};

746

};

747

748

const struct matrix_keymap_data am335x_evm_keymap_data = {

748

const struct matrix_keymap_data am335x_evm_keymap_data = {

749

.keymap = am335x_evm_matrix_keys,

749

.keymap = am335x_evm_matrix_keys,

750

.keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),

750

.keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),

751

};

751

};

752

753

static const unsigned int am335x_evm_keypad_row_gpios[] = {

753

static const unsigned int am335x_evm_keypad_row_gpios[] = {

754

GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)

754

GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)

755

};

755

};

756

757

static const unsigned int am335x_evm_keypad_col_gpios[] = {

757

static const unsigned int am335x_evm_keypad_col_gpios[] = {

758

GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)

758

GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)

759

};

759

};

760

761

static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {

761

static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {

762

.keymap_data = &am335x_evm_keymap_data,

762

.keymap_data = &am335x_evm_keymap_data,

763

.row_gpios = am335x_evm_keypad_row_gpios,

763

.row_gpios = am335x_evm_keypad_row_gpios,

764

.num_row_gpios = ARRAY_SIZE(am335x_evm_keypad_row_gpios),

764

.num_row_gpios = ARRAY_SIZE(am335x_evm_keypad_row_gpios),

765

.col_gpios = am335x_evm_keypad_col_gpios,

765

.col_gpios = am335x_evm_keypad_col_gpios,

766

.num_col_gpios = ARRAY_SIZE(am335x_evm_keypad_col_gpios),

766

.num_col_gpios = ARRAY_SIZE(am335x_evm_keypad_col_gpios),

767

.active_low = false,

767

.active_low = false,

768

.debounce_ms = 5,

768

.debounce_ms = 5,

769

.col_scan_delay_us = 2,

769

.col_scan_delay_us = 2,

770

};

770

};

771

772

static struct platform_device am335x_evm_keyboard = {

772

static struct platform_device am335x_evm_keyboard = {

773

.name = "matrix-keypad",

773

.name = "matrix-keypad",

774

.id = -1,

774

.id = -1,

775

.dev = {

775

.dev = {

776

.platform_data = &am335x_evm_keypad_platform_data,

776

.platform_data = &am335x_evm_keypad_platform_data,

777

},

777

},

778

};

778

};

779

780

static void matrix_keypad_init(int evm_id, int profile)

780

static void matrix_keypad_init(int evm_id, int profile)

781

{

781

{

782

int err;

782

int err;

783

784

setup_pin_mux(matrix_keypad_pin_mux);

784

setup_pin_mux(matrix_keypad_pin_mux);

785

err = platform_device_register(&am335x_evm_keyboard);

785

err = platform_device_register(&am335x_evm_keyboard);

786

if (err) {

786

if (err) {

787

pr_err("failed to register matrix keypad (2x3) device\n");

787

pr_err("failed to register matrix keypad (2x3) device\n");

788

}

788

}

789

}

789

}

790

791

792

/* pinmux for keypad device */

792

/* pinmux for keypad device */

793

static struct pinmux_config volume_keys_pin_mux[] = {

793

static struct pinmux_config volume_keys_pin_mux[] = {

794

{"spi0_sclk.gpio0_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

794

{"spi0_sclk.gpio0_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

795

{"spi0_d0.gpio0_3", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

795

{"spi0_d0.gpio0_3", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

796

{NULL, 0},

796

{NULL, 0},

797

};

797

};

798

799

/* Configure GPIOs for Volume Keys */

799

/* Configure GPIOs for Volume Keys */

800

static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {

800

static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {

801

{

801

{

802

.code = KEY_VOLUMEUP,

802

.code = KEY_VOLUMEUP,

803

.gpio = GPIO_TO_PIN(0, 2),

803

.gpio = GPIO_TO_PIN(0, 2),

804

.active_low = true,

804

.active_low = true,

805

.desc = "volume-up",

805

.desc = "volume-up",

806

.type = EV_KEY,

806

.type = EV_KEY,

807

.wakeup = 1,

807

.wakeup = 1,

808

},

808

},

809

{

809

{

810

.code = KEY_VOLUMEDOWN,

810

.code = KEY_VOLUMEDOWN,

811

.gpio = GPIO_TO_PIN(0, 3),

811

.gpio = GPIO_TO_PIN(0, 3),

812

.active_low = true,

812

.active_low = true,

813

.desc = "volume-down",

813

.desc = "volume-down",

814

.type = EV_KEY,

814

.type = EV_KEY,

815

.wakeup = 1,

815

.wakeup = 1,

816

},

816

},

817

};

817

};

818

819

static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {

819

static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {

820

.buttons = am335x_evm_volume_gpio_buttons,

820

.buttons = am335x_evm_volume_gpio_buttons,

821

.nbuttons = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),

821

.nbuttons = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),

822

};

822

};

823

824

static struct platform_device am335x_evm_volume_keys = {

824

static struct platform_device am335x_evm_volume_keys = {

825

.name = "gpio-keys",

825

.name = "gpio-keys",

826

.id = -1,

826

.id = -1,

827

.dev = {

827

.dev = {

828

.platform_data = &am335x_evm_volume_gpio_key_info,

828

.platform_data = &am335x_evm_volume_gpio_key_info,

829

},

829

},

830

};

830

};

831

832

static void volume_keys_init(int evm_id, int profile)

832

static void volume_keys_init(int evm_id, int profile)

833

{

833

{

834

int err;

834

int err;

835

836

setup_pin_mux(volume_keys_pin_mux);

836

setup_pin_mux(volume_keys_pin_mux);

837

err = platform_device_register(&am335x_evm_volume_keys);

837

err = platform_device_register(&am335x_evm_volume_keys);

838

if (err)

838

if (err)

839

pr_err("failed to register matrix keypad (2x3) device\n");

839

pr_err("failed to register matrix keypad (2x3) device\n");

840

}

840

}

841

842

/*

842

/*

843

* @evm_id - evm id which needs to be configured

843

* @evm_id - evm id which needs to be configured

844

* @dev_cfg - single evm structure which includes

844

* @dev_cfg - single evm structure which includes

845

* all module inits, pin-mux defines

845

* all module inits, pin-mux defines

846

* @profile - if present, else PROFILE_NONE

846

* @profile - if present, else PROFILE_NONE

847

* @dghtr_brd_flg - Whether Daughter board is present or not

847

* @dghtr_brd_flg - Whether Daughter board is present or not

848

*/

848

*/

849

static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,

849

static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,

850

int profile)

850

int profile)

851

{

851

{

852

int i;

852

int i;

853

854

am335x_evm_set_id(evm_id);

854

am335x_evm_set_id(evm_id);

855

856

/*

856

/*

857

* Only General Purpose & Industrial Auto Motro Control

857

* Only General Purpose & Industrial Auto Motro Control

858

* EVM has profiles. So check if this evm has profile.

858

* EVM has profiles. So check if this evm has profile.

859

* If not, ignore the profile comparison

859

* If not, ignore the profile comparison

860

*/

860

*/

861

862

/*

862

/*

863

* If the device is on baseboard, directly configure it. Else (device on

863

* If the device is on baseboard, directly configure it. Else (device on

864

* Daughter board), check if the daughter card is detected.

864

* Daughter board), check if the daughter card is detected.

865

*/

865

*/

866

if (profile == PROFILE_NONE) {

866

if (profile == PROFILE_NONE) {

867

for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {

867

for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {

868

if (dev_cfg->device_on == DEV_ON_BASEBOARD)

868

if (dev_cfg->device_on == DEV_ON_BASEBOARD)

869

dev_cfg->device_init(evm_id, profile);

869

dev_cfg->device_init(evm_id, profile);

870

else if (daughter_brd_detected == true)

870

else if (daughter_brd_detected == true)

871

dev_cfg->device_init(evm_id, profile);

871

dev_cfg->device_init(evm_id, profile);

872

}

872

}

873

} else {

873

} else {

874

for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {

874

for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {

875

if (dev_cfg->profile & profile) {

875

if (dev_cfg->profile & profile) {

876

if (dev_cfg->device_on == DEV_ON_BASEBOARD)

876

if (dev_cfg->device_on == DEV_ON_BASEBOARD)

877

dev_cfg->device_init(evm_id, profile);

877

dev_cfg->device_init(evm_id, profile);

878

else if (daughter_brd_detected == true)

878

else if (daughter_brd_detected == true)

879

dev_cfg->device_init(evm_id, profile);

879

dev_cfg->device_init(evm_id, profile);

880

}

880

}

881

}

881

}

882

}

882

}

883

}

883

}

884

885

886

/* pinmux for usb0 drvvbus */

886

/* pinmux for usb0 drvvbus */

887

static struct pinmux_config usb0_pin_mux[] = {

887

static struct pinmux_config usb0_pin_mux[] = {

888

{"usb0_drvvbus.usb0_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

888

{"usb0_drvvbus.usb0_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

889

{NULL, 0},

889

{NULL, 0},

890

};

890

};

891

892

/* pinmux for usb1 drvvbus */

892

/* pinmux for usb1 drvvbus */

893

static struct pinmux_config usb1_pin_mux[] = {

893

static struct pinmux_config usb1_pin_mux[] = {

894

{"usb1_drvvbus.usb1_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

894

{"usb1_drvvbus.usb1_drvvbus", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

895

{NULL, 0},

895

{NULL, 0},

896

};

896

};

897

898

/* pinmux for profibus */

898

/* pinmux for profibus */

899

static struct pinmux_config profibus_pin_mux[] = {

899

static struct pinmux_config profibus_pin_mux[] = {

900

{"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},

900

{"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},

901

{"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},

901

{"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},

902

{"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},

902

{"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},

903

{NULL, 0},

903

{NULL, 0},

904

};

904

};

905

906

/* Module pin mux for eCAP0 */

906

/* Module pin mux for eCAP0 */

907

static struct pinmux_config ecap0_pin_mux[] = {

907

static struct pinmux_config ecap0_pin_mux[] = {

908

{"ecap0_in_pwm0_out.ecap0_in_pwm0_out",

908

{"ecap0_in_pwm0_out.ecap0_in_pwm0_out",

909

OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

909

OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

910

{NULL, 0},

910

{NULL, 0},

911

};

911

};

912

913

/* Module pin mux for eCAP */

913

/* Module pin mux for eCAP */

914

static struct pinmux_config ecap2_pin_mux[] = {

914

static struct pinmux_config ecap2_pin_mux[] = {

915

{"mcasp0_ahclkr.ecap2_in_pwm2_out", AM33XX_PIN_OUTPUT},

915

{"mcasp0_ahclkr.ecap2_in_pwm2_out", AM33XX_PIN_OUTPUT},

916

{NULL, 0},

916

{NULL, 0},

917

};

917

};

918

919

#define AM335XEVM_WLAN_PMENA_GPIO GPIO_TO_PIN(1, 30)

919

#define AM335XEVM_WLAN_PMENA_GPIO GPIO_TO_PIN(1, 30)

920

#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(3, 17)

920

#define AM335XEVM_WLAN_IRQ_GPIO GPIO_TO_PIN(3, 17)

921

#define AM335XEVM_SK_WLAN_IRQ_GPIO GPIO_TO_PIN(1, 29)

921

#define AM335XEVM_SK_WLAN_IRQ_GPIO GPIO_TO_PIN(1, 29)

922

923

struct wl12xx_platform_data am335xevm_wlan_data = {

923

struct wl12xx_platform_data am335xevm_wlan_data = {

924

.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),

924

.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),

925

.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */

925

.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */

926

.bt_enable_gpio = GPIO_TO_PIN(3, 21),

926

.bt_enable_gpio = GPIO_TO_PIN(3, 21),

927

.wlan_enable_gpio = GPIO_TO_PIN(1, 16),

927

.wlan_enable_gpio = GPIO_TO_PIN(1, 16),

928

};

928

};

929

930

/* Module pin mux for wlan and bluetooth */

930

/* Module pin mux for wlan and bluetooth */

931

static struct pinmux_config mmc2_wl12xx_pin_mux[] = {

931

static struct pinmux_config mmc2_wl12xx_pin_mux[] = {

932

{"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

932

{"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

933

{"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

933

{"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

934

{"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

934

{"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

935

{"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

935

{"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

936

{"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

936

{"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

937

{"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

937

{"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},

938

{NULL, 0},

938

{NULL, 0},

939

};

939

};

940

941

static struct pinmux_config uart1_wl12xx_pin_mux[] = {

941

static struct pinmux_config uart1_wl12xx_pin_mux[] = {

942

{"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

942

{"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},

943

{"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},

943

{"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},

944

{"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

944

{"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},

945

{"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},

945

{"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},

946

{NULL, 0},

946

{NULL, 0},

947

};

947

};

948

949

static struct pinmux_config wl12xx_pin_mux[] = {

949

static struct pinmux_config wl12xx_pin_mux[] = {

950

{"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

950

{"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

951

{"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

951

{"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

952

{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT_PULLUP},

952

{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT_PULLUP},

953

{NULL, 0},

953

{NULL, 0},

954

};

954

};

955

956

static struct pinmux_config wl12xx_pin_mux_sk[] = {

956

static struct pinmux_config wl12xx_pin_mux_sk[] = {

957

{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

957

{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

958

{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

958

{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},

959

{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

959

{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},

960

{NULL, 0},

960

{NULL, 0},

961

};

961

};

962

963

static bool backlight_enable;

963

static bool backlight_enable;

964

965

static void enable_ecap0(int evm_id, int profile)

965

static void enable_ecap0(int evm_id, int profile)

966

{

966

{

967

backlight_enable = true;

967

backlight_enable = true;

968

setup_pin_mux(ecap0_pin_mux);

968

setup_pin_mux(ecap0_pin_mux);

969

}

969

}

970

971

static void enable_ecap2(int evm_id, int profile)

971

static void enable_ecap2(int evm_id, int profile)

972

{

972

{

973

backlight_enable = true;

973

backlight_enable = true;

974

setup_pin_mux(ecap2_pin_mux);

974

setup_pin_mux(ecap2_pin_mux);

975

}

975

}

976

977

/* Setup pwm-backlight */

977

/* Setup pwm-backlight */

978

static struct platform_device am335x_backlight = {

978

static struct platform_device am335x_backlight = {

979

.name = "pwm-backlight",

979

.name = "pwm-backlight",

980

.id = -1,

980

.id = -1,

981

.dev = {

981

.dev = {

982

.platform_data = &am335x_backlight_data0,

982

.platform_data = &am335x_backlight_data0,

983

},

983

},

984

};

984

};

985

986

static struct pwmss_platform_data pwm_pdata[3] = {

986

static struct pwmss_platform_data pwm_pdata[3] = {

987

{

987

{

988

.version = PWM_VERSION_1,

988

.version = PWM_VERSION_1,

989

},

989

},

990

{

990

{

991

.version = PWM_VERSION_1,

991

.version = PWM_VERSION_1,

992

},

992

},

993

{

993

{

994

.version = PWM_VERSION_1,

994

.version = PWM_VERSION_1,

995

},

995

},

996

};

996

};

997

998

static int __init backlight_init(void)

998

static int __init backlight_init(void)

999

{

999

{

1000

int status = 0;

1000

int status = 0;

1001

1002

if (backlight_enable) {

1002

if (backlight_enable) {

1003

int ecap_index = 0;

1003

int ecap_index = 0;

1004

1005

switch (am335x_evm_get_id()) {

1005

switch (am335x_evm_get_id()) {

1006

case GEN_PURP_EVM:

1006

case GEN_PURP_EVM:

1007

case GEN_PURP_DDR3_EVM:

1007

case GEN_PURP_DDR3_EVM:

1008

ecap_index = 0;

1008

ecap_index = 0;

1009

break;

1009

break;

1010

case EVM_SK:

1010

case EVM_SK:

1011

/*

1011

/*

1012

* Invert polarity of PWM wave from ECAP to handle

1012

* Invert polarity of PWM wave from ECAP to handle

1013

* backlight intensity to pwm brightness

1013

* backlight intensity to pwm brightness

1014

*/

1014

*/

1015

ecap_index = 2;

1015

ecap_index = 2;

1016

pwm_pdata[ecap_index].chan_attrib[0].inverse_pol = true;

1016

pwm_pdata[ecap_index].chan_attrib[0].inverse_pol = true;

1017

am335x_backlight.dev.platform_data =

1017

am335x_backlight.dev.platform_data =

1018

&am335x_backlight_data2;

1018

&am335x_backlight_data2;

1019

break;

1019

break;

1020

default:

1020

default:

1021

pr_err("%s: Error on attempting to enable backlight,"

1021

pr_err("%s: Error on attempting to enable backlight,"

1022

" not supported\n", __func__);

1022

" not supported\n", __func__);

1023

return -EINVAL;

1023

return -EINVAL;

1024

}

1024

}

1025

1026

am33xx_register_ecap(ecap_index, &pwm_pdata[ecap_index]);

1026

am33xx_register_ecap(ecap_index, &pwm_pdata[ecap_index]);

1027

platform_device_register(&am335x_backlight);

1027

platform_device_register(&am335x_backlight);

1028

}

1028

}

1029

return status;

1029

return status;

1030

}

1030

}

1031

late_initcall(backlight_init);

1031

late_initcall(backlight_init);

1032

1033

static int __init conf_disp_pll(int rate)

1033

static int __init conf_disp_pll(int rate)

1034

{

1034

{

1035

struct clk *disp_pll;

1035

struct clk *disp_pll;

1036

int ret = -EINVAL;

1036

int ret = -EINVAL;

1037

1038

disp_pll = clk_get(NULL, "dpll_disp_ck");

1038

disp_pll = clk_get(NULL, "dpll_disp_ck");

1039

if (IS_ERR(disp_pll)) {

1039

if (IS_ERR(disp_pll)) {

1040

pr_err("Cannot clk_get disp_pll\n");

1040

pr_err("Cannot clk_get disp_pll\n");

1041

goto out;

1041

goto out;

1042

}

1042

}

1043

1044

ret = clk_set_rate(disp_pll, rate);

1044

ret = clk_set_rate(disp_pll, rate);

1045

clk_put(disp_pll);

1045

clk_put(disp_pll);

1046

out:

1046

out:

1047

return ret;

1047

return ret;

1048

}

1048

}

1049

1050

static void lcdc_init(int evm_id, int profile)

1050

static void lcdc_init(int evm_id, int profile)

1051

{

1051

{

1052

struct da8xx_lcdc_platform_data *lcdc_pdata;

1052

struct da8xx_lcdc_platform_data *lcdc_pdata;

1053

setup_pin_mux(lcdc_pin_mux);

1053

setup_pin_mux(lcdc_pin_mux);

1054

1055

if (conf_disp_pll(300000000)) {

1055

if (conf_disp_pll(300000000)) {

1056

pr_info("Failed configure display PLL, not attempting to"

1056

pr_info("Failed configure display PLL, not attempting to"

1057

"register LCDC\n");

1057

"register LCDC\n");

1058

return;

1058

return;

1059

}

1059

}

1060

switch (evm_id) {

1060

switch (evm_id) {

1061

case GEN_PURP_EVM:

1061

case GEN_PURP_EVM:

1062

case GEN_PURP_DDR3_EVM:

1062

case GEN_PURP_DDR3_EVM:

1063

lcdc_pdata = &TFC_S9700RTWV35TR_01B_pdata;

1063

lcdc_pdata = &TFC_S9700RTWV35TR_01B_pdata;

1064

break;

1064

break;

1065

case EVM_SK:

1065

case EVM_SK:

1066

lcdc_pdata = &NHD_480272MF_ATXI_pdata;

1066

lcdc_pdata = &NHD_480272MF_ATXI_pdata;

1067

break;

1067

break;

1068

default:

1068

default:

1069

pr_err("LCDC not supported on this evm (%d)\n",evm_id);

1069

pr_err("LCDC not supported on this evm (%d)\n",evm_id);

1070

return;

1070

return;

1071

}

1071

}

1072

1073

lcdc_pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;

1073

lcdc_pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;

1074

1075

if (am33xx_register_lcdc(lcdc_pdata))

1075

if (am33xx_register_lcdc(lcdc_pdata))

1076

pr_info("Failed to register LCDC device\n");

1076

pr_info("Failed to register LCDC device\n");

1077

1078

return;

1078

return;

1079

}

1079

}

1080

1081

static void mfd_tscadc_init(int evm_id, int profile)

1081

static void mfd_tscadc_init(int evm_id, int profile)

1082

{

1082

{

1083

int err;

1083

int err;

1084

1085

err = am33xx_register_mfd_tscadc(&tscadc);

1085

err = am33xx_register_mfd_tscadc(&tscadc);

1086

if (err)

1086

if (err)

1087

pr_err("failed to register touchscreen device\n");

1087

pr_err("failed to register touchscreen device\n");

1088

}

1088

}

1089

1090

static void rgmii1_init(int evm_id, int profile)

1090

static void rgmii1_init(int evm_id, int profile)

1091

{

1091

{

1092

setup_pin_mux(rgmii1_pin_mux);

1092

setup_pin_mux(rgmii1_pin_mux);

1093

return;

1093

return;

1094

}

1094

}

1095

1096

static void rgmii2_init(int evm_id, int profile)

1096

static void rgmii2_init(int evm_id, int profile)

1097

{

1097

{

1098

setup_pin_mux(rgmii2_pin_mux);

1098

setup_pin_mux(rgmii2_pin_mux);

1099

return;

1099

return;

1100

}

1100

}

1101

1102

static void mii1_init(int evm_id, int profile)

1102

static void mii1_init(int evm_id, int profile)

1103

{

1103

{

1104

setup_pin_mux(mii1_pin_mux);

1104

setup_pin_mux(mii1_pin_mux);

1105

return;

1105

return;

1106

}

1106

}

1107

1108

static void rmii1_init(int evm_id, int profile)

1108

static void rmii1_init(int evm_id, int profile)

1109

{

1109

{

1110

setup_pin_mux(rmii1_pin_mux);

1110

setup_pin_mux(rmii1_pin_mux);

1111

return;

1111

return;

1112

}

1112

}

1113

1114

static void usb0_init(int evm_id, int profile)

1114

static void usb0_init(int evm_id, int profile)

1115

{

1115

{

1116

setup_pin_mux(usb0_pin_mux);

1116

setup_pin_mux(usb0_pin_mux);

1117

return;

1117

return;

1118

}

1118

}

1119

1120

static void usb1_init(int evm_id, int profile)

1120

static void usb1_init(int evm_id, int profile)

1121

{

1121

{

1122

setup_pin_mux(usb1_pin_mux);

1122

setup_pin_mux(usb1_pin_mux);

1123

return;

1123

return;

1124

}

1124

}

1125

1126

/* setup uart3 */

1126

/* setup uart3 */

1127

static void uart3_init(int evm_id, int profile)

1127

static void uart3_init(int evm_id, int profile)

1128

{

1128

{

1129

setup_pin_mux(uart3_pin_mux);

1129

setup_pin_mux(uart3_pin_mux);

1130

return;

1130

return;

1131

}

1131

}

1132

1133

/* setup uart2 */

1133

/* setup uart2 */

1134

static void uart2_init(int evm_id, int profile)

1134

static void uart2_init(int evm_id, int profile)

1135

{

1135

{

1136

setup_pin_mux(uart2_pin_mux);

1136

setup_pin_mux(uart2_pin_mux);

1137

return;

1137

return;

1138

}

1138

}

1139

1140

/*

1140

/*

1141

* gpio0_7 was driven HIGH in u-boot before DDR configuration

1141

* gpio0_7 was driven HIGH in u-boot before DDR configuration

1142

*

1142

*

1143

* setup gpio0_7 for EVM-SK 1.2

1143

* setup gpio0_7 for EVM-SK 1.2

1144

*/

1144

*/

1145

static void gpio_ddr_vtt_enb_init(int evm_id, int profile)

1145

static void gpio_ddr_vtt_enb_init(int evm_id, int profile)

1146

{

1146

{

1147

setup_pin_mux(gpio_ddr_vtt_enb_pin_mux);

1147

setup_pin_mux(gpio_ddr_vtt_enb_pin_mux);

1148

return;

1148

return;

1149

}

1149

}

1150

1151

/* setup haptics */

1151

/* setup haptics */

1152

#define HAPTICS_MAX_FREQ 250

1152

#define HAPTICS_MAX_FREQ 250

1153

static void haptics_init(int evm_id, int profile)

1153

static void haptics_init(int evm_id, int profile)

1154

{

1154

{

1155

setup_pin_mux(haptics_pin_mux);

1155

setup_pin_mux(haptics_pin_mux);

1156

pwm_pdata[2].chan_attrib[1].max_freq = HAPTICS_MAX_FREQ;

1156

pwm_pdata[2].chan_attrib[1].max_freq = HAPTICS_MAX_FREQ;

1157

am33xx_register_ehrpwm(2, &pwm_pdata[2]);

1157

am33xx_register_ehrpwm(2, &pwm_pdata[2]);

1158

}

1158

}

1159

1160

/* NAND partition information */

1160

/* NAND partition information */

1161

static struct mtd_partition am335x_nand_partitions[] = {

1161

static struct mtd_partition am335x_nand_partitions[] = {

1162

/* All the partition sizes are listed in terms of NAND block size */

1162

/* All the partition sizes are listed in terms of NAND block size */

1163

{

1163

{

1164

.name = "SPL",

1164

.name = "SPL",

1165

.offset = 0, /* Offset = 0x0 */

1165

.offset = 0, /* Offset = 0x0 */

1166

.size = SZ_128K,

1166

.size = SZ_128K,

1167

},

1167

},

1168

{

1168

{

1169

.name = "SPL.backup1",

1169

.name = "SPL.backup1",

1170

.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */

1170

.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */

1171

.size = SZ_128K,

1171

.size = SZ_128K,

1172

},

1172

},

1173

{

1173

{

1174

.name = "SPL.backup2",

1174

.name = "SPL.backup2",

1175

.offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */

1175

.offset = MTDPART_OFS_APPEND, /* Offset = 0x40000 */

1176

.size = SZ_128K,

1176

.size = SZ_128K,

1177

},

1177

},

1178

{

1178

{

1179

.name = "SPL.backup3",

1179

.name = "SPL.backup3",

1180

.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */

1180

.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */

1181

.size = SZ_128K,

1181

.size = SZ_128K,

1182

},

1182

},

1183

{

1183

{

1184

.name = "U-Boot",

1184

.name = "U-Boot",

1185

.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */

1185

.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */

1186

.size = 15 * SZ_128K,

1186

.size = 15 * SZ_128K,

1187

},

1187

},

1188

{

1188

{

1189

.name = "U-Boot Env",

1189

.name = "U-Boot Env",

1190

.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */

1190

.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */

1191

.size = 1 * SZ_128K,

1191

.size = 1 * SZ_128K,

1192

},

1192

},

1193

{

1193

{

1194

.name = "Kernel",

1194

.name = "Kernel",

1195

.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */

1195

.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */

1196

.size = 40 * SZ_128K,

1196

.size = 40 * SZ_128K,

1197

},

1197

},

1198

{

1198

{

1199

.name = "File System",

1199

.name = "File System",

1200

.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */

1200

.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */

1201

.size = MTDPART_SIZ_FULL,

1201

.size = MTDPART_SIZ_FULL,

1202

},

1202

},

1203

};

1203

};

1204

1205

/* SPI 0/1 Platform Data */

1205

/* SPI 0/1 Platform Data */

1206

/* SPI flash information */

1206

/* SPI flash information */

1207

static struct mtd_partition am335x_spi_partitions[] = {

1207

static struct mtd_partition am335x_spi_partitions[] = {

1208

/* All the partition sizes are listed in terms of erase size */

1208

/* All the partition sizes are listed in terms of erase size */

1209

{

1209

{

1210

.name = "SPL",

1210

.name = "SPL",

1211

.offset = 0, /* Offset = 0x0 */

1211

.offset = 0, /* Offset = 0x0 */

1212

.size = SZ_128K,

1212

.size = SZ_128K,

1213

},

1213

},

1214

{

1214

{

1215

.name = "U-Boot",

1215

.name = "U-Boot",

1216

.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */

1216

.offset = MTDPART_OFS_APPEND, /* Offset = 0x20000 */

1217

.size = 2 * SZ_128K,

1217

.size = 2 * SZ_128K,

1218

},

1218

},

1219

{

1219

{

1220

.name = "U-Boot Env",

1220

.name = "U-Boot Env",

1221

.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */

1221

.offset = MTDPART_OFS_APPEND, /* Offset = 0x60000 */

1222

.size = 2 * SZ_4K,

1222

.size = 2 * SZ_4K,

1223

},

1223

},

1224

{

1224

{

1225

.name = "Kernel",

1225

.name = "Kernel",

1226

.offset = MTDPART_OFS_APPEND, /* Offset = 0x62000 */

1226

.offset = MTDPART_OFS_APPEND, /* Offset = 0x62000 */

1227

.size = 28 * SZ_128K,

1227

.size = 28 * SZ_128K,

1228

},

1228

},

1229

{

1229

{

1230

.name = "File System",

1230

.name = "File System",

1231

.offset = MTDPART_OFS_APPEND, /* Offset = 0x3E2000 */

1231

.offset = MTDPART_OFS_APPEND, /* Offset = 0x3E2000 */

1232

.size = MTDPART_SIZ_FULL, /* size ~= 4.1 MiB */

1232

.size = MTDPART_SIZ_FULL, /* size ~= 4.1 MiB */

1233

}

1233

}

1234

};

1234

};

1235

1236

static const struct flash_platform_data am335x_spi_flash = {

1236

static const struct flash_platform_data am335x_spi_flash = {

1237

.type = "w25q64",

1237

.type = "w25q64",

1238

.name = "spi_flash",

1238

.name = "spi_flash",

1239

.parts = am335x_spi_partitions,

1239

.parts = am335x_spi_partitions,

1240

.nr_parts = ARRAY_SIZE(am335x_spi_partitions),

1240

.nr_parts = ARRAY_SIZE(am335x_spi_partitions),

1241

};

1241

};

1242

1243

/*

1243

/*

1244

* SPI Flash works at 80Mhz however SPI Controller works at 48MHz.

1244

* SPI Flash works at 80Mhz however SPI Controller works at 48MHz.

1245

* So setup Max speed to be less than that of Controller speed

1245

* So setup Max speed to be less than that of Controller speed

1246

*/

1246

*/

1247

static struct spi_board_info am335x_spi0_slave_info[] = {

1247

static struct spi_board_info am335x_spi0_slave_info[] = {

1248

{

1248

{

1249

.modalias = "m25p80",

1249

.modalias = "m25p80",

1250

.platform_data = &am335x_spi_flash,

1250

.platform_data = &am335x_spi_flash,

1251

.irq = -1,

1251

.irq = -1,

1252

.max_speed_hz = 24000000,

1252

.max_speed_hz = 24000000,

1253

.bus_num = 1,

1253

.bus_num = 1,

1254

.chip_select = 0,

1254

.chip_select = 0,

1255

},

1255

},

1256

};

1256

};

1257

1258

static struct spi_board_info am335x_spi1_slave_info[] = {

1258

static struct spi_board_info am335x_spi1_slave_info[] = {

1259

{

1259

{

1260

.modalias = "m25p80",

1260

.modalias = "m25p80",

1261

.platform_data = &am335x_spi_flash,

1261

.platform_data = &am335x_spi_flash,

1262

.irq = -1,

1262

.irq = -1,

1263

.max_speed_hz = 12000000,

1263

.max_speed_hz = 12000000,

1264

.bus_num = 2,

1264

.bus_num = 2,

1265

.chip_select = 0,

1265

.chip_select = 0,

1266

},

1266

},

1267

};

1267

};

1268

1269

static struct gpmc_timings am335x_nand_timings = {

1269

static struct gpmc_timings am335x_nand_timings = {

1270

.sync_clk = 0,

1270

.sync_clk = 0,

1271

1272

.cs_on = 0,

1272

.cs_on = 0,

1273

.cs_rd_off = 44,

1273

.cs_rd_off = 44,

1274

.cs_wr_off = 44,

1274

.cs_wr_off = 44,

1275

1276

.adv_on = 6,

1276

.adv_on = 6,

1277

.adv_rd_off = 34,

1277

.adv_rd_off = 34,

1278

.adv_wr_off = 44,

1278

.adv_wr_off = 44,

1279

.we_off = 40,

1279

.we_off = 40,

1280

.oe_off = 54,

1280

.oe_off = 54,

1281

1282

.access = 64,

1282

.access = 64,

1283

.rd_cycle = 82,

1283

.rd_cycle = 82,

1284

.wr_cycle = 82,

1284

.wr_cycle = 82,

1285

1286

.wr_access = 40,

1286

.wr_access = 40,

1287

.wr_data_mux_bus = 0,

1287

.wr_data_mux_bus = 0,

1288

};

1288

};

1289

1290

static void evm_nand_init(int evm_id, int profile)

1290

static void evm_nand_init(int evm_id, int profile)

1291

{

1291

{

1292

struct omap_nand_platform_data *pdata;

1292

struct omap_nand_platform_data *pdata;

1293

struct gpmc_devices_info gpmc_device[2] = {

1293

struct gpmc_devices_info gpmc_device[2] = {

1294

{ NULL, 0 },

1294

{ NULL, 0 },

1295

{ NULL, 0 },

1295

{ NULL, 0 },

1296

};

1296

};

1297

1298

setup_pin_mux(nand_pin_mux);

1298

setup_pin_mux(nand_pin_mux);

1299

pdata = omap_nand_init(am335x_nand_partitions,

1299

pdata = omap_nand_init(am335x_nand_partitions,

1300

ARRAY_SIZE(am335x_nand_partitions), 0, 0,

1300

ARRAY_SIZE(am335x_nand_partitions), 0, 0,

1301

&am335x_nand_timings);

1301

&am335x_nand_timings);

1302

if (!pdata)

1302

if (!pdata)

1303

return;

1303

return;

1304

pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW;

1304

pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW;

1305

pdata->elm_used = true;

1305

pdata->elm_used = true;

1306

gpmc_device[0].pdata = pdata;

1306

gpmc_device[0].pdata = pdata;

1307

gpmc_device[0].flag = GPMC_DEVICE_NAND;

1307

gpmc_device[0].flag = GPMC_DEVICE_NAND;

1308

1309

omap_init_gpmc(gpmc_device, sizeof(gpmc_device));

1309

omap_init_gpmc(gpmc_device, sizeof(gpmc_device));

1310

omap_init_elm();

1310

omap_init_elm();

1311

}

1311

}

1312

1313

/* TPS65217 voltage regulator support */

1313

/* TPS65217 voltage regulator support */

1314

1315

/* 1.8V */

1315

/* 1.8V */

1316

static struct regulator_consumer_supply tps65217_dcdc1_consumers[] = {

1316

static struct regulator_consumer_supply tps65217_dcdc1_consumers[] = {

1317

{

1317

{

1318

.supply = "vdds_osc",

1318

.supply = "vdds_osc",

1319

},

1319

},

1320

{

1320

{

1321

.supply = "vdds_pll_ddr",

1321

.supply = "vdds_pll_ddr",

1322

},

1322

},

1323

{

1323

{

1324

.supply = "vdds_pll_mpu",

1324

.supply = "vdds_pll_mpu",

1325

},

1325

},

1326

{

1326

{

1327

.supply = "vdds_pll_core_lcd",

1327

.supply = "vdds_pll_core_lcd",

1328

},

1328

},

1329

{

1329

{

1330

.supply = "vdds_sram_mpu_bb",

1330

.supply = "vdds_sram_mpu_bb",

1331

},

1331

},

1332

{

1332

{

1333

.supply = "vdds_sram_core_bg",

1333

.supply = "vdds_sram_core_bg",

1334

},

1334

},

1335

{

1335

{

1336

.supply = "vdda_usb0_1p8v",

1336

.supply = "vdda_usb0_1p8v",

1337

},

1337

},

1338

{

1338

{

1339

.supply = "vdds_ddr",

1339

.supply = "vdds_ddr",

1340

},

1340

},

1341

{

1341

{

1342

.supply = "vdds",

1342

.supply = "vdds",

1343

},

1343

},

1344

{

1344

{

1345

.supply = "vdds_hvx_1p8v",

1345

.supply = "vdds_hvx_1p8v",

1346

},

1346

},

1347

{

1347

{

1348

.supply = "vdda_adc",

1348

.supply = "vdda_adc",

1349

},

1349

},

1350

{

1350

{

1351

.supply = "ddr2",

1351

.supply = "ddr2",

1352

},

1352

},

1353

};

1353

};

1354

1355

/* 1.1V */

1355

/* 1.1V */

1356

static struct regulator_consumer_supply tps65217_dcdc2_consumers[] = {

1356

static struct regulator_consumer_supply tps65217_dcdc2_consumers[] = {

1357

{

1357

{

1358

.supply = "vdd_mpu",

1358

.supply = "vdd_mpu",

1359

},

1359

},

1360

};

1360

};

1361

1362

/* 1.1V */

1362

/* 1.1V */

1363

static struct regulator_consumer_supply tps65217_dcdc3_consumers[] = {

1363

static struct regulator_consumer_supply tps65217_dcdc3_consumers[] = {

1364

{

1364

{

1365

.supply = "vdd_core",

1365

.supply = "vdd_core",

1366

},

1366

},

1367

};

1367

};

1368

1369

/* 1.8V LDO */

1369

/* 1.8V LDO */

1370

static struct regulator_consumer_supply tps65217_ldo1_consumers[] = {

1370

static struct regulator_consumer_supply tps65217_ldo1_consumers[] = {

1371

{

1371

{

1372

.supply = "vdds_rtc",

1372

.supply = "vdds_rtc",

1373

},

1373

},

1374

};

1374

};

1375

1376

/* 3.3V LDO */

1376

/* 3.3V LDO */

1377

static struct regulator_consumer_supply tps65217_ldo2_consumers[] = {

1377

static struct regulator_consumer_supply tps65217_ldo2_consumers[] = {

1378

{

1378

{

1379

.supply = "vdds_any_pn",

1379

.supply = "vdds_any_pn",

1380

},

1380

},

1381

};

1381

};

1382

1383

/* 3.3V LDO */

1383

/* 3.3V LDO */

1384

static struct regulator_consumer_supply tps65217_ldo3_consumers[] = {

1384

static struct regulator_consumer_supply tps65217_ldo3_consumers[] = {

1385

{

1385

{

1386

.supply = "vdds_hvx_ldo3_3p3v",

1386

.supply = "vdds_hvx_ldo3_3p3v",

1387

},

1387

},

1388

{

1388

{

1389

.supply = "vdda_usb0_3p3v",

1389

.supply = "vdda_usb0_3p3v",

1390

},

1390

},

1391

};

1391

};

1392

1393

/* 3.3V LDO */

1393

/* 3.3V LDO */

1394

static struct regulator_consumer_supply tps65217_ldo4_consumers[] = {

1394

static struct regulator_consumer_supply tps65217_ldo4_consumers[] = {

1395

{

1395

{

1396

.supply = "vdds_hvx_ldo4_3p3v",

1396

.supply = "vdds_hvx_ldo4_3p3v",

1397

},

1397

},

1398

};

1398

};

1399

1400

/*

1400

/*

1401

* FIXME: Some BeagleBones reuire a ramp_delay to settle down the set

1401

* FIXME: Some BeagleBones reuire a ramp_delay to settle down the set

1402

* voltage from 0.95v to 1.25v. By default a minimum of 70msec is set

1402

* voltage from 0.95v to 1.25v. By default a minimum of 70msec is set

1403

* based on experimentation. This will be removed/modified to exact

1403

* based on experimentation. This will be removed/modified to exact

1404

* value, once the root cause is known.

1404

* value, once the root cause is known.

1405

*

1405

*

1406

* The reason for extended ramp time requirement on BeagleBone is not

1406

* The reason for extended ramp time requirement on BeagleBone is not

1407

* known and the delay varies from board - board, if the board hangs

1407

* known and the delay varies from board - board, if the board hangs

1408

* with this 70msec delay then try to increase the value.

1408

* with this 70msec delay then try to increase the value.

1409

*/

1409

*/

1410

static struct tps65217_rdelay dcdc2_ramp_delay = {

1410

static struct tps65217_rdelay dcdc2_ramp_delay = {

1411

.ramp_delay = 70000,

1411

.ramp_delay = 70000,

1412

};

1412

};

1413

1414

static struct regulator_init_data tps65217_regulator_data[] = {

1414

static struct regulator_init_data tps65217_regulator_data[] = {

1415

/* dcdc1 */

1415

/* dcdc1 */

1416

{

1416

{

1417

.constraints = {

1417

.constraints = {

1418

.min_uV = 900000,

1418

.min_uV = 900000,

1419

.max_uV = 1800000,

1419

.max_uV = 1800000,

1420

.boot_on = 1,

1420

.boot_on = 1,

1421

.always_on = 1,

1421

.always_on = 1,

1422

},

1422

},

1423

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc1_consumers),

1423

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc1_consumers),

1424

.consumer_supplies = tps65217_dcdc1_consumers,

1424

.consumer_supplies = tps65217_dcdc1_consumers,

1425

},

1425

},

1426

1427

/* dcdc2 */

1427

/* dcdc2 */

1428

{

1428

{

1429

.constraints = {

1429

.constraints = {

1430

.min_uV = 900000,

1430

.min_uV = 900000,

1431

.max_uV = 3300000,

1431

.max_uV = 3300000,

1432

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1432

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1433

REGULATOR_CHANGE_STATUS),

1433

REGULATOR_CHANGE_STATUS),

1434

.boot_on = 1,

1434

.boot_on = 1,

1435

.always_on = 1,

1435

.always_on = 1,

1436

},

1436

},

1437

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc2_consumers),

1437

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc2_consumers),

1438

.consumer_supplies = tps65217_dcdc2_consumers,

1438

.consumer_supplies = tps65217_dcdc2_consumers,

1439

.driver_data = &dcdc2_ramp_delay,

1439

.driver_data = &dcdc2_ramp_delay,

1440

},

1440

},

1441

1442

/* dcdc3 */

1442

/* dcdc3 */

1443

{

1443

{

1444

.constraints = {

1444

.constraints = {

1445

.min_uV = 900000,

1445

.min_uV = 900000,

1446

.max_uV = 1500000,

1446

.max_uV = 1500000,

1447

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1447

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1448

REGULATOR_CHANGE_STATUS),

1448

REGULATOR_CHANGE_STATUS),

1449

.boot_on = 1,

1449

.boot_on = 1,

1450

.always_on = 1,

1450

.always_on = 1,

1451

},

1451

},

1452

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc3_consumers),

1452

.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc3_consumers),

1453

.consumer_supplies = tps65217_dcdc3_consumers,

1453

.consumer_supplies = tps65217_dcdc3_consumers,

1454

},

1454

},

1455

1456

/* ldo1 */

1456

/* ldo1 */

1457

{

1457

{

1458

.constraints = {

1458

.constraints = {

1459

.min_uV = 1000000,

1459

.min_uV = 1000000,

1460

.max_uV = 3300000,

1460

.max_uV = 3300000,

1461

.valid_ops_mask = REGULATOR_CHANGE_STATUS,

1461

.valid_ops_mask = REGULATOR_CHANGE_STATUS,

1462

.boot_on = 1,

1462

.boot_on = 1,

1463

.always_on = 1,

1463

.always_on = 1,

1464

},

1464

},

1465

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo1_consumers),

1465

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo1_consumers),

1466

.consumer_supplies = tps65217_ldo1_consumers,

1466

.consumer_supplies = tps65217_ldo1_consumers,

1467

},

1467

},

1468

1469

/* ldo2 */

1469

/* ldo2 */

1470

{

1470

{

1471

.constraints = {

1471

.constraints = {

1472

.min_uV = 900000,

1472

.min_uV = 900000,

1473

.max_uV = 3300000,

1473

.max_uV = 3300000,

1474

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1474

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1475

REGULATOR_CHANGE_STATUS),

1475

REGULATOR_CHANGE_STATUS),

1476

.boot_on = 1,

1476

.boot_on = 1,

1477

.always_on = 1,

1477

.always_on = 1,

1478

},

1478

},

1479

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo2_consumers),

1479

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo2_consumers),

1480

.consumer_supplies = tps65217_ldo2_consumers,

1480

.consumer_supplies = tps65217_ldo2_consumers,

1481

},

1481

},

1482

1483

/* ldo3 */

1483

/* ldo3 */

1484

{

1484

{

1485

.constraints = {

1485

.constraints = {

1486

.min_uV = 1800000,

1486

.min_uV = 1800000,

1487

.max_uV = 3300000,

1487

.max_uV = 3300000,

1488

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1488

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1489

REGULATOR_CHANGE_STATUS),

1489

REGULATOR_CHANGE_STATUS),

1490

.boot_on = 1,

1490

.boot_on = 1,

1491

.always_on = 1,

1491

.always_on = 1,

1492

},

1492

},

1493

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo3_consumers),

1493

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo3_consumers),

1494

.consumer_supplies = tps65217_ldo3_consumers,

1494

.consumer_supplies = tps65217_ldo3_consumers,

1495

},

1495

},

1496

1497

/* ldo4 */

1497

/* ldo4 */

1498

{

1498

{

1499

.constraints = {

1499

.constraints = {

1500

.min_uV = 1800000,

1500

.min_uV = 1800000,

1501

.max_uV = 3300000,

1501

.max_uV = 3300000,

1502

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1502

.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |

1503

REGULATOR_CHANGE_STATUS),

1503

REGULATOR_CHANGE_STATUS),

1504

.boot_on = 1,

1504

.boot_on = 1,

1505

.always_on = 1,

1505

.always_on = 1,

1506

},

1506

},

1507

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo4_consumers),

1507

.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo4_consumers),

1508

.consumer_supplies = tps65217_ldo4_consumers,

1508

.consumer_supplies = tps65217_ldo4_consumers,

1509

},

1509

},

1510

};

1510

};

1511

1512

static struct tps65217_board beaglebone_tps65217_info = {

1512

static struct tps65217_board beaglebone_tps65217_info = {

1513

.tps65217_init_data = &tps65217_regulator_data[0],

1513

.tps65217_init_data = &tps65217_regulator_data[0],

1514

.status_off = true,

1514

.status_off = true,

1515

};

1515

};

1516

1517

static struct lis3lv02d_platform_data lis331dlh_pdata = {

1517

static struct lis3lv02d_platform_data lis331dlh_pdata = {

1518

.click_flags = LIS3_CLICK_SINGLE_X |

1518

.click_flags = LIS3_CLICK_SINGLE_X |

1519

LIS3_CLICK_SINGLE_Y |

1519

LIS3_CLICK_SINGLE_Y |

1520

LIS3_CLICK_SINGLE_Z,

1520

LIS3_CLICK_SINGLE_Z,

1521

.wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |

1521

.wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |

1522

LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |

1522

LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |

1523

LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,

1523

LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,

1524

.irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,

1524

.irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,

1525

.wakeup_thresh = 10,

1525

.wakeup_thresh = 10,

1526

.click_thresh_x = 10,

1526

.click_thresh_x = 10,

1527

.click_thresh_y = 10,

1527

.click_thresh_y = 10,

1528

.click_thresh_z = 10,

1528

.click_thresh_z = 10,

1529

.g_range = 2,

1529

.g_range = 2,

1530

.st_min_limits[0] = 120,

1530

.st_min_limits[0] = 120,

1531

.st_min_limits[1] = 120,

1531

.st_min_limits[1] = 120,

1532

.st_min_limits[2] = 140,

1532

.st_min_limits[2] = 140,

1533

.st_max_limits[0] = 550,

1533

.st_max_limits[0] = 550,

1534

.st_max_limits[1] = 550,

1534

.st_max_limits[1] = 550,

1535

.st_max_limits[2] = 750,

1535

.st_max_limits[2] = 750,

1536

};

1536

};

1537

1538

static struct i2c_board_info lis331dlh_i2c_boardinfo[] = {

1538

static struct i2c_board_info lis331dlh_i2c_boardinfo[] = {

1539

{

1539

{

1540

I2C_BOARD_INFO("lis331dlh", 0x18),

1540

I2C_BOARD_INFO("lis331dlh", 0x18),

1541

.platform_data = &lis331dlh_pdata,

1541

.platform_data = &lis331dlh_pdata,

1542

},

1542

},

1543

};

1543

};

1544

1545

static void lis331dlh_init(int evm_id, int profile)

1545

static void lis331dlh_init(int evm_id, int profile)

1546

{

1546

{

1547

struct i2c_adapter *adapter;

1547

struct i2c_adapter *adapter;

1548

struct i2c_client *client;

1548

struct i2c_client *client;

1549

unsigned int i2c_instance;

1549

unsigned int i2c_instance;

1550

1551

switch (evm_id) {

1551

switch (evm_id) {

1552

case GEN_PURP_EVM:

1552

case GEN_PURP_EVM:

1553

case GEN_PURP_DDR3_EVM:

1553

case GEN_PURP_DDR3_EVM:

1554

i2c_instance = 2;

1554

i2c_instance = 2;

1555

break;

1555

break;

1556

case EVM_SK:

1556

case EVM_SK:

1557

i2c_instance = 1;

1557

i2c_instance = 1;

1558

break;

1558

break;

1559

default:

1559

default:

1560

pr_err("lis331dlh is not supported on this evm (%d)\n", evm_id);

1560

pr_err("lis331dlh is not supported on this evm (%d)\n", evm_id);

1561

return;

1561

return;

1562

}

1562

}

1563

1564

/* I2C adapter request */

1564

/* I2C adapter request */

1565

adapter = i2c_get_adapter(i2c_instance);

1565

adapter = i2c_get_adapter(i2c_instance);

1566

if (!adapter) {

1566

if (!adapter) {

1567

pr_err("failed to get adapter i2c%u\n", i2c_instance);

1567

pr_err("failed to get adapter i2c%u\n", i2c_instance);

1568

return;

1568

return;

1569

}

1569

}

1570

1571

client = i2c_new_device(adapter, lis331dlh_i2c_boardinfo);

1571

client = i2c_new_device(adapter, lis331dlh_i2c_boardinfo);

1572

if (!client)

1572

if (!client)

1573

pr_err("failed to register lis331dlh to i2c%u\n", i2c_instance);

1573

pr_err("failed to register lis331dlh to i2c%u\n", i2c_instance);

1574

1575

i2c_put_adapter(adapter);

1575

i2c_put_adapter(adapter);

1576

}

1576

}

1577

1578

static struct i2c_board_info am335x_i2c1_boardinfo[] = {

1578

static struct i2c_board_info am335x_i2c1_boardinfo[] = {

1579

{

1579

{

1580

I2C_BOARD_INFO("tlv320aic3x", 0x1b),

1580

I2C_BOARD_INFO("tlv320aic3x", 0x1b),

1581

},

1581

},

1582

{

1582

{

1583

I2C_BOARD_INFO("tsl2550", 0x39),

1583

I2C_BOARD_INFO("tsl2550", 0x39),

1584

},

1584

},

1585

{

1585

{

1586

I2C_BOARD_INFO("tmp275", 0x48),

1586

I2C_BOARD_INFO("tmp275", 0x48),

1587

},

1587

},

1588

};

1588

};

1589

1590

static void i2c1_init(int evm_id, int profile)

1590

static void i2c1_init(int evm_id, int profile)

1591

{

1591

{

1592

setup_pin_mux(i2c1_pin_mux);

1592

setup_pin_mux(i2c1_pin_mux);

1593

omap_register_i2c_bus(2, 100, am335x_i2c1_boardinfo,

1593

omap_register_i2c_bus(2, 100, am335x_i2c1_boardinfo,

1594

ARRAY_SIZE(am335x_i2c1_boardinfo));

1594

ARRAY_SIZE(am335x_i2c1_boardinfo));

1595

return;

1595

return;

1596

}

1596

}

1597

1598

static struct i2c_board_info am335x_i2c2_boardinfo[] = {

1598

static struct i2c_board_info am335x_i2c2_boardinfo[] = {

1599

};

1599

};

1600

1601

static void i2c2_init(int evm_id, int profile)

1601

static void i2c2_init(int evm_id, int profile)

1602

{

1602

{

1603

setup_pin_mux(i2c2_pin_mux);

1603

setup_pin_mux(i2c2_pin_mux);

1604

omap_register_i2c_bus(3, 100, am335x_i2c2_boardinfo,

1604

omap_register_i2c_bus(3, 100, am335x_i2c2_boardinfo,

1605

ARRAY_SIZE(am335x_i2c2_boardinfo));

1605

ARRAY_SIZE(am335x_i2c2_boardinfo));

1606

return;

1606

return;

1607

}

1607

}

1608

1609

/* Setup McASP 1 */

1609

/* Setup McASP 1 */

1610

static void mcasp1_init(int evm_id, int profile)

1610

static void mcasp1_init(int evm_id, int profile)

1611

{

1611

{

1612

/* Configure McASP */

1612

/* Configure McASP */

1613

setup_pin_mux(mcasp1_pin_mux);

1613

setup_pin_mux(mcasp1_pin_mux);

1614

switch (evm_id) {

1614

switch (evm_id) {

1615

case EVM_SK:

1615

case EVM_SK:

1616

am335x_register_mcasp(&am335x_evm_sk_snd_data1, 1);

1616

am335x_register_mcasp(&am335x_evm_sk_snd_data1, 1);

1617

break;

1617

break;

1618

default:

1618

default:

1619

am335x_register_mcasp(&am335x_evm_snd_data1, 1);

1619

am335x_register_mcasp(&am335x_evm_snd_data1, 1);

1620

}

1620

}

1621

1622

return;

1622

return;

1623

}

1623

}

1624

1625

static void mmc1_init(int evm_id, int profile)

1625

static void mmc1_init(int evm_id, int profile)

1626

{

1626

{

1627

setup_pin_mux(mmc1_common_pin_mux);

1627

setup_pin_mux(mmc1_common_pin_mux);

1628

setup_pin_mux(mmc1_dat4_7_pin_mux);

1628

setup_pin_mux(mmc1_dat4_7_pin_mux);

1629

setup_pin_mux(mmc1_wp_only_pin_mux);

1629

setup_pin_mux(mmc1_wp_only_pin_mux);

1630

setup_pin_mux(mmc1_cd_only_pin_mux);

1630

setup_pin_mux(mmc1_cd_only_pin_mux);

1631

1632

am335x_mmc[1].mmc = 2;

1632

am335x_mmc[1].mmc = 2;

1633

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;

1633

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;

1634

am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);

1634

am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);

1635

am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);

1635

am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);

1636

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1636

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1637

1638

/* mmc will be initialized when mmc0_init is called */

1638

/* mmc will be initialized when mmc0_init is called */

1639

return;

1639

return;

1640

}

1640

}

1641

1642

static void mmc1_wl12xx_init(int evm_id, int profile)

1642

static void mmc1_wl12xx_init(int evm_id, int profile)

1643

{

1643

{

1644

setup_pin_mux(mmc1_common_pin_mux);

1644

setup_pin_mux(mmc1_common_pin_mux);

1645

am335x_mmc[1].mmc = 2;

1645

am335x_mmc[1].mmc = 2;

1646

am335x_mmc[1].name = "wl1271";

1646

am335x_mmc[1].name = "wl1271";

1647

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;

1647

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;

1648

am335x_mmc[1].nonremovable = true;

1648

am335x_mmc[1].nonremovable = true;

1649

am335x_mmc[1].gpio_cd = -EINVAL;

1649

am335x_mmc[1].gpio_cd = -EINVAL;

1650

am335x_mmc[1].gpio_wp = -EINVAL;

1650

am335x_mmc[1].gpio_wp = -EINVAL;

1651

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1651

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1652

}

1652

}

1653

1654

static void mmc2_wl12xx_init(int evm_id, int profile)

1654

static void mmc2_wl12xx_init(int evm_id, int profile)

1655

{

1655

{

1656

setup_pin_mux(mmc2_wl12xx_pin_mux);

1656

setup_pin_mux(mmc2_wl12xx_pin_mux);

1657

1658

am335x_mmc[1].mmc = 3;

1658

am335x_mmc[1].mmc = 3;

1659

am335x_mmc[1].name = "wl1271";

1659

am335x_mmc[1].name = "wl1271";

1660

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;

1660

am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;

1661

am335x_mmc[1].nonremovable = true;

1661

am335x_mmc[1].nonremovable = true;

1662

am335x_mmc[1].gpio_cd = -EINVAL;

1662

am335x_mmc[1].gpio_cd = -EINVAL;

1663

am335x_mmc[1].gpio_wp = -EINVAL;

1663

am335x_mmc[1].gpio_wp = -EINVAL;

1664

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1664

am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */

1665

1666

/* mmc will be initialized when mmc0_init is called */

1666

/* mmc will be initialized when mmc0_init is called */

1667

return;

1667

return;

1668

}

1668

}

1669

1670

static void uart1_wl12xx_init(int evm_id, int profile)

1670

static void uart1_wl12xx_init(int evm_id, int profile)

1671

{

1671

{

1672

setup_pin_mux(uart1_wl12xx_pin_mux);

1672

setup_pin_mux(uart1_wl12xx_pin_mux);

1673

}

1673

}

1674

1675

static void wl12xx_bluetooth_enable(void)

1675

static void wl12xx_bluetooth_enable(void)

1676

{

1676

{

1677

int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,

1677

int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,

1678

"bt_en\n");

1678

"bt_en\n");

1679

if (status < 0)

1679

if (status < 0)

1680

pr_err("Failed to request gpio for bt_enable");

1680

pr_err("Failed to request gpio for bt_enable");

1681

1682

pr_info("Configure Bluetooth Enable pin...\n");

1682

pr_info("Configure Bluetooth Enable pin...\n");

1683

gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);

1683

gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);

1684

}

1684

}

1685

1686

static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)

1686

static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)

1687

{

1687

{

1688

if (on) {

1688

if (on) {

1689

gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 1);

1689

gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 1);

1690

mdelay(70);

1690

mdelay(70);

1691

} else {

1691

} else {

1692

gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 0);

1692

gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 0);

1693

}

1693

}

1694

1695

return 0;

1695

return 0;

1696

}

1696

}

1697

1698

static void wl12xx_init(int evm_id, int profile)

1698

static void wl12xx_init(int evm_id, int profile)

1699

{

1699

{

1700

struct device *dev;

1700

struct device *dev;

1701

struct omap_mmc_platform_data *pdata;

1701

struct omap_mmc_platform_data *pdata;

1702

int ret;

1702

int ret;

1703

1704

if (evm_id == EVM_SK) {

1704

if (evm_id == EVM_SK) {

1705

am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(0, 31);

1705

am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(0, 31);

1706

am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);

1706

am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);

1707

am335xevm_wlan_data.irq =

1707

am335xevm_wlan_data.irq =

1708

OMAP_GPIO_IRQ(AM335XEVM_SK_WLAN_IRQ_GPIO);

1708

OMAP_GPIO_IRQ(AM335XEVM_SK_WLAN_IRQ_GPIO);

1709

setup_pin_mux(wl12xx_pin_mux_sk);

1709

setup_pin_mux(wl12xx_pin_mux_sk);

1710

} else {

1710

} else {

1711

setup_pin_mux(wl12xx_pin_mux);

1711

setup_pin_mux(wl12xx_pin_mux);

1712

}

1712

}

1713

wl12xx_bluetooth_enable();

1713

wl12xx_bluetooth_enable();

1714

1715

if (wl12xx_set_platform_data(&am335xevm_wlan_data))

1715

if (wl12xx_set_platform_data(&am335xevm_wlan_data))

1716

pr_err("error setting wl12xx data\n");

1716

pr_err("error setting wl12xx data\n");

1717

1718

dev = am335x_mmc[1].dev;

1718

dev = am335x_mmc[1].dev;

1719

if (!dev) {

1719

if (!dev) {

1720

pr_err("wl12xx mmc device initialization failed\n");

1720

pr_err("wl12xx mmc device initialization failed\n");

1721

goto out;

1721

goto out;

1722

}

1722

}

1723

1724

pdata = dev->platform_data;

1724

pdata = dev->platform_data;

1725

if (!pdata) {

1725

if (!pdata) {

1726

pr_err("Platfrom data of wl12xx device not set\n");

1726

pr_err("Platfrom data of wl12xx device not set\n");

1727

goto out;

1727

goto out;

1728

}

1728

}

1729

1730

ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,

1730

ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,

1731

GPIOF_OUT_INIT_LOW, "wlan_en");

1731

GPIOF_OUT_INIT_LOW, "wlan_en");

1732

if (ret) {

1732

if (ret) {

1733

pr_err("Error requesting wlan enable gpio: %d\n", ret);

1733

pr_err("Error requesting wlan enable gpio: %d\n", ret);

1734

goto out;

1734

goto out;

1735

}

1735

}

1736

1737

1738

pdata->slots[0].set_power = wl12xx_set_power;

1738

pdata->slots[0].set_power = wl12xx_set_power;

1739

out:

1739

out:

1740

return;

1740

return;

1741

}

1741

}

1742

1743

static void d_can_init(int evm_id, int profile)

1743

static void d_can_init(int evm_id, int profile)

1744

{

1744

{

1745

switch (evm_id) {

1745

switch (evm_id) {

1746

case IND_AUT_MTR_EVM:

1746

case IND_AUT_MTR_EVM:

1747

if ((profile == PROFILE_0) || (profile == PROFILE_1)) {

1747

if ((profile == PROFILE_0) || (profile == PROFILE_1)) {

1748

setup_pin_mux(d_can_ia_pin_mux);

1748

setup_pin_mux(d_can_ia_pin_mux);

1749

/* Instance Zero */

1749

/* Instance Zero */

1750

am33xx_d_can_init(0);

1750

am33xx_d_can_init(0);

1751

}

1751

}

1752

break;

1752

break;

1753

case GEN_PURP_EVM:

1753

case GEN_PURP_EVM:

1754

case GEN_PURP_DDR3_EVM:

1754

case GEN_PURP_DDR3_EVM:

1755

if (profile == PROFILE_1) {

1755

if (profile == PROFILE_1) {

1756

setup_pin_mux(d_can_gp_pin_mux);

1756

setup_pin_mux(d_can_gp_pin_mux);

1757

/* Instance One */

1757

/* Instance One */

1758

am33xx_d_can_init(1);

1758

am33xx_d_can_init(1);

1759

}

1759

}

1760

break;

1760

break;

1761

default:

1761

default:

1762

break;

1762

break;

1763

}

1763

}

1764

}

1764

}

1765

1766

static void mmc0_init(int evm_id, int profile)

1766

static void mmc0_init(int evm_id, int profile)

1767

{

1767

{

1768

switch (evm_id) {

1768

switch (evm_id) {

1769

case BEAGLE_BONE_A3:

1769

case BEAGLE_BONE_A3:

1770

case BEAGLE_BONE_OLD:

1770

case BEAGLE_BONE_OLD:

1771

case EVM_SK:

1771

case EVM_SK:

1772

setup_pin_mux(mmc0_common_pin_mux);

1772

setup_pin_mux(mmc0_common_pin_mux);

1773

setup_pin_mux(mmc0_cd_only_pin_mux);

1773

setup_pin_mux(mmc0_cd_only_pin_mux);

1774

break;

1774

break;

1775

default:

1775

default:

1776

setup_pin_mux(mmc0_common_pin_mux);

1776

setup_pin_mux(mmc0_common_pin_mux);

1777

setup_pin_mux(mmc0_cd_only_pin_mux);

1777

setup_pin_mux(mmc0_cd_only_pin_mux);

1778

setup_pin_mux(mmc0_wp_only_pin_mux);

1778

setup_pin_mux(mmc0_wp_only_pin_mux);

1779

break;

1779

break;

1780

}

1780

}

1781

1782

omap2_hsmmc_init(am335x_mmc);

1782

omap2_hsmmc_init(am335x_mmc);

1783

return;

1783

return;

1784

}

1784

}

1785

1786

static struct i2c_board_info tps65217_i2c_boardinfo[] = {

1786

static struct i2c_board_info tps65217_i2c_boardinfo[] = {

1787

{

1787

{

1788

I2C_BOARD_INFO("tps65217", TPS65217_I2C_ID),

1788

I2C_BOARD_INFO("tps65217", TPS65217_I2C_ID),

1789

.platform_data = &beaglebone_tps65217_info,

1789

.platform_data = &beaglebone_tps65217_info,

1790

},

1790

},

1791

};

1791

};

1792

1793

static void tps65217_init(int evm_id, int profile)

1793

static void tps65217_init(int evm_id, int profile)

1794

{

1794

{

1795

struct i2c_adapter *adapter;

1795

struct i2c_adapter *adapter;

1796

struct i2c_client *client;

1796

struct i2c_client *client;

1797

struct device *mpu_dev;

1797

struct device *mpu_dev;

1798

struct tps65217 *tps;

1798

struct tps65217 *tps;

1799

unsigned int val;

1799

unsigned int val;

1800

int ret;

1800

int ret;

1801

1802

mpu_dev = omap_device_get_by_hwmod_name("mpu");

1802

mpu_dev = omap_device_get_by_hwmod_name("mpu");

1803

if (!mpu_dev)

1803

if (!mpu_dev)

1804

pr_warning("%s: unable to get the mpu device\n", __func__);

1804

pr_warning("%s: unable to get the mpu device\n", __func__);

1805

1806

/* I2C1 adapter request */

1806

/* I2C1 adapter request */

1807

adapter = i2c_get_adapter(1);

1807

adapter = i2c_get_adapter(1);

1808

if (!adapter) {

1808

if (!adapter) {

1809

pr_err("failed to get adapter i2c1\n");

1809

pr_err("failed to get adapter i2c1\n");

1810

return;

1810

return;

1811

}

1811

}

1812

1813

client = i2c_new_device(adapter, tps65217_i2c_boardinfo);

1813

client = i2c_new_device(adapter, tps65217_i2c_boardinfo);

1814

if (!client)

1814

if (!client)

1815

pr_err("failed to register tps65217 to i2c1\n");

1815

pr_err("failed to register tps65217 to i2c1\n");

1816

1817

i2c_put_adapter(adapter);

1817

i2c_put_adapter(adapter);

1818

1819

tps = (struct tps65217 *)i2c_get_clientdata(client);

1819

tps = (struct tps65217 *)i2c_get_clientdata(client);

1820

1821

ret = tps65217_reg_read(tps, TPS65217_REG_STATUS, &val);

1821

ret = tps65217_reg_read(tps, TPS65217_REG_STATUS, &val);

1822

if (ret) {

1822

if (ret) {

1823

pr_err("failed to read tps65217 status reg\n");

1823

pr_err("failed to read tps65217 status reg\n");

1824

return;

1824

return;

1825

}

1825

}

1826

1827

if (!(val & TPS65217_STATUS_ACPWR)) {

1827

if (!(val & TPS65217_STATUS_ACPWR)) {

1828

/* If powered by USB then disable OPP120 and OPPTURBO */

1828

/* If powered by USB then disable OPP120 and OPPTURBO */

1829

pr_info("Maximum current provided by the USB port is 500mA"

1829

pr_info("Maximum current provided by the USB port is 500mA"

1830

" which is not sufficient\nwhen operating @OPP120 and"

1830

" which is not sufficient\nwhen operating @OPP120 and"

1831

" OPPTURBO. The current requirement for some\nuse-cases"

1831

" OPPTURBO. The current requirement for some\nuse-cases"

1832

" using OPP100 might also exceed the maximum current"

1832

" using OPP100 might also exceed the maximum current"

1833

" that the\nUSB port can provide. Unless you are fully"

1833

" that the\nUSB port can provide. Unless you are fully"

1834

" confident that the current\nrequirements for OPP100"

1834

" confident that the current\nrequirements for OPP100"

1835

" use-case don't exceed the USB limits, switching\nto"

1835

" use-case don't exceed the USB limits, switching\nto"

1836

" AC power is recommended.\n");

1836

" AC power is recommended.\n");

1837

opp_disable(mpu_dev, 600000000);

1837

opp_disable(mpu_dev, 600000000);

1838

opp_disable(mpu_dev, 720000000);

1838

opp_disable(mpu_dev, 720000000);

1839

}

1839

}

1840

}

1840

}

1841

1842

static void mmc0_no_cd_init(int evm_id, int profile)

1842

static void mmc0_no_cd_init(int evm_id, int profile)

1843

{

1843

{

1844

setup_pin_mux(mmc0_common_pin_mux);

1844

setup_pin_mux(mmc0_common_pin_mux);

1845

setup_pin_mux(mmc0_wp_only_pin_mux);

1845

setup_pin_mux(mmc0_wp_only_pin_mux);

1846

1847

omap2_hsmmc_init(am335x_mmc);

1847

omap2_hsmmc_init(am335x_mmc);

1848

return;

1848

return;

1849

}

1849

}

1850

1851

/* Configure GPIOs for GPIO Keys */

1851

/* Configure GPIOs for GPIO Keys */

1852

static struct gpio_keys_button am335x_evm_gpio_buttons[] = {

1852

static struct gpio_keys_button am335x_evm_gpio_buttons[] = {

1853

{

1853

{

1854

.code = BTN_0,

1854

.code = BTN_0,

1855

.gpio = GPIO_TO_PIN(2, 3),

1855

.gpio = GPIO_TO_PIN(2, 3),

1856

.desc = "SW1",

1856

.desc = "SW1",

1857

},

1857

},

1858

{

1858

{

1859

.code = BTN_1,

1859

.code = BTN_1,

1860

.gpio = GPIO_TO_PIN(2, 2),

1860

.gpio = GPIO_TO_PIN(2, 2),

1861

.desc = "SW2",

1861

.desc = "SW2",

1862

},

1862

},

1863

{

1863

{

1864

.code = BTN_2,

1864

.code = BTN_2,

1865

.gpio = GPIO_TO_PIN(0, 30),

1865

.gpio = GPIO_TO_PIN(0, 30),

1866

.desc = "SW3",

1866

.desc = "SW3",

1867

.wakeup = 1,

1867

.wakeup = 1,

1868

},

1868

},

1869

{

1869

{

1870

.code = BTN_3,

1870

.code = BTN_3,

1871

.gpio = GPIO_TO_PIN(2, 5),

1871

.gpio = GPIO_TO_PIN(2, 5),

1872

.desc = "SW4",

1872

.desc = "SW4",

1873

},

1873

},

1874

};

1874

};

1875

1876

static struct gpio_keys_platform_data am335x_evm_gpio_key_info = {

1876

static struct gpio_keys_platform_data am335x_evm_gpio_key_info = {

1877

.buttons = am335x_evm_gpio_buttons,

1877

.buttons = am335x_evm_gpio_buttons,

1878

.nbuttons = ARRAY_SIZE(am335x_evm_gpio_buttons),

1878

.nbuttons = ARRAY_SIZE(am335x_evm_gpio_buttons),

1879

};

1879

};

1880

1881

static struct platform_device am335x_evm_gpio_keys = {

1881

static struct platform_device am335x_evm_gpio_keys = {

1882

.name = "gpio-keys",

1882

.name = "gpio-keys",

1883

.id = -1,

1883

.id = -1,

1884

.dev = {

1884

.dev = {

1885

.platform_data = &am335x_evm_gpio_key_info,

1885

.platform_data = &am335x_evm_gpio_key_info,

1886

},

1886

},

1887

};

1887

};

1888

1889

static void gpio_keys_init(int evm_id, int profile)

1889

static void gpio_keys_init(int evm_id, int profile)

1890

{

1890

{

1891

int err;

1891

int err;

1892

1893

setup_pin_mux(gpio_keys_pin_mux);

1893

setup_pin_mux(gpio_keys_pin_mux);

1894

err = platform_device_register(&am335x_evm_gpio_keys);

1894

err = platform_device_register(&am335x_evm_gpio_keys);

1895

if (err)

1895

if (err)

1896

pr_err("failed to register gpio key device\n");

1896

pr_err("failed to register gpio key device\n");

1897

}

1897

}

1898

1899

static struct gpio_led gpio_leds[] = {

1899

static struct gpio_led gpio_leds[] = {

1900

{

1900

{

1901

.name = "am335x:EVM_SK:usr0",

1901

.name = "am335x:EVM_SK:usr0",

1902

.gpio = GPIO_TO_PIN(1, 4), /* D1 */

1902

.gpio = GPIO_TO_PIN(1, 4), /* D1 */

1903

},

1903

},

1904

{

1904

{

1905

.name = "am335x:EVM_SK:usr1",

1905

.name = "am335x:EVM_SK:usr1",

1906

.gpio = GPIO_TO_PIN(1, 5), /* D2 */

1906

.gpio = GPIO_TO_PIN(1, 5), /* D2 */

1907

},

1907

},

1908

{

1908

{

1909

.name = "am335x:EVM_SK:mmc0",

1909

.name = "am335x:EVM_SK:mmc0",

1910

.gpio = GPIO_TO_PIN(1, 7), /* D3 */

1910

.gpio = GPIO_TO_PIN(1, 7), /* D3 */

1911

.default_trigger = "mmc0",

1911

.default_trigger = "mmc0",

1912

},

1912

},

1913

{

1913

{

1914

.name = "am335x:EVM_SK:heartbeat",

1914

.name = "am335x:EVM_SK:heartbeat",

1915

.gpio = GPIO_TO_PIN(1, 6), /* D4 */

1915

.gpio = GPIO_TO_PIN(1, 6), /* D4 */

1916

.default_trigger = "heartbeat",

1916

.default_trigger = "heartbeat",

1917

},

1917

},

1918

};

1918

};

1919

1920

static struct gpio_led_platform_data gpio_led_info = {

1920

static struct gpio_led_platform_data gpio_led_info = {

1921

.leds = gpio_leds,

1921

.leds = gpio_leds,

1922

.num_leds = ARRAY_SIZE(gpio_leds),

1922

.num_leds = ARRAY_SIZE(gpio_leds),

1923

};

1923

};

1924

1925

static struct platform_device leds_gpio = {

1925

static struct platform_device leds_gpio = {

1926

.name = "leds-gpio",

1926

.name = "leds-gpio",

1927

.id = -1,

1927

.id = -1,

1928

.dev = {

1928

.dev = {

1929

.platform_data = &gpio_led_info,

1929

.platform_data = &gpio_led_info,

1930

},

1930

},

1931

};

1931

};

1932

1933

static void gpio_led_init(int evm_id, int profile)

1933

static void gpio_led_init(int evm_id, int profile)

1934

{

1934

{

1935

int err;

1935

int err;

1936

1937

setup_pin_mux(gpio_led_mux);

1937

setup_pin_mux(gpio_led_mux);

1938

err = platform_device_register(&leds_gpio);

1938

err = platform_device_register(&leds_gpio);

1939

if (err)

1939

if (err)

1940

pr_err("failed to register gpio led device\n");

1940

pr_err("failed to register gpio led device\n");

1941

}

1941

}

1942

1943

/* setup spi0 */

1943

/* setup spi0 */

1944

static void spi0_init(int evm_id, int profile)

1944

static void spi0_init(int evm_id, int profile)

1945

{

1945

{

1946

setup_pin_mux(spi0_pin_mux);

1946

setup_pin_mux(spi0_pin_mux);

1947

spi_register_board_info(am335x_spi0_slave_info,

1947

spi_register_board_info(am335x_spi0_slave_info,

1948

ARRAY_SIZE(am335x_spi0_slave_info));

1948

ARRAY_SIZE(am335x_spi0_slave_info));

1949

return;

1949

return;

1950

}

1950

}

1951

1952

/* setup spi1 */

1952

/* setup spi1 */

1953

static void spi1_init(int evm_id, int profile)

1953

static void spi1_init(int evm_id, int profile)

1954

{

1954

{

1955

setup_pin_mux(spi1_pin_mux);

1955

setup_pin_mux(spi1_pin_mux);

1956

spi_register_board_info(am335x_spi1_slave_info,

1956

spi_register_board_info(am335x_spi1_slave_info,

1957

ARRAY_SIZE(am335x_spi1_slave_info));

1957

ARRAY_SIZE(am335x_spi1_slave_info));

1958

return;

1958

return;

1959

}

1959

}

1960

1961

1962

static int beaglebone_phy_fixup(struct phy_device *phydev)

1962

static int beaglebone_phy_fixup(struct phy_device *phydev)

1963

{

1963

{

1964

phydev->supported &= ~(SUPPORTED_100baseT_Half |

1964

phydev->supported &= ~(SUPPORTED_100baseT_Half |

1965

SUPPORTED_100baseT_Full);

1965

SUPPORTED_100baseT_Full);

1966

1967

return 0;

1967

return 0;

1968

}

1968

}

1969

1970

static void profibus_init(int evm_id, int profile)

1970

static void profibus_init(int evm_id, int profile)

1971

{

1971

{

1972

setup_pin_mux(profibus_pin_mux);

1972

setup_pin_mux(profibus_pin_mux);

1973

return;

1973

return;

1974

}

1974

}

1975

1976

static struct omap_rtc_pdata am335x_rtc_info = {

1976

static struct omap_rtc_pdata am335x_rtc_info = {

1977

.pm_off = false,

1977

.pm_off = false,

1978

.wakeup_capable = 0,

1978

.wakeup_capable = 0,

1979

};

1979

};

1980

1981

static void am335x_rtc_init(int evm_id, int profile)

1981

static void am335x_rtc_init(int evm_id, int profile)

1982

{

1982

{

1983

void __iomem *base;

1983

void __iomem *base;

1984

struct clk *clk;

1984

struct clk *clk;

1985

struct omap_hwmod *oh;

1985

struct omap_hwmod *oh;

1986

struct platform_device *pdev;

1986

struct platform_device *pdev;

1987

char *dev_name = "am33xx-rtc";

1987

char *dev_name = "am33xx-rtc";

1988

1989

clk = clk_get(NULL, "rtc_fck");

1989

clk = clk_get(NULL, "rtc_fck");

1990

if (IS_ERR(clk)) {

1990

if (IS_ERR(clk)) {

1991

pr_err("rtc : Failed to get RTC clock\n");

1991

pr_err("rtc : Failed to get RTC clock\n");

1992

return;

1992

return;

1993

}

1993

}

1994

1995

if (clk_enable(clk)) {

1995

if (clk_enable(clk)) {

1996

pr_err("rtc: Clock Enable Failed\n");

1996

pr_err("rtc: Clock Enable Failed\n");

1997

return;

1997

return;

1998

}

1998

}

1999

2000

base = ioremap(AM33XX_RTC_BASE, SZ_4K);

2000

base = ioremap(AM33XX_RTC_BASE, SZ_4K);

2001

2002

if (WARN_ON(!base))

2002

if (WARN_ON(!base))

2003

return;

2003

return;

2004

2005

/* Unlock the rtc's registers */

2005

/* Unlock the rtc's registers */

2006

writel(0x83e70b13, base + 0x6c);

2006

writel(0x83e70b13, base + 0x6c);

2007

writel(0x95a4f1e0, base + 0x70);

2007

writel(0x95a4f1e0, base + 0x70);

2008

2009

/*

2009

/*

2010

* Enable the 32K OSc

2010

* Enable the 32K OSc

2011

* TODO: Need a better way to handle this

2011

* TODO: Need a better way to handle this

2012

* Since we want the clock to be running before mmc init

2012

* Since we want the clock to be running before mmc init

2013

* we need to do it before the rtc probe happens

2013

* we need to do it before the rtc probe happens

2014

*/

2014

*/

2015

writel(0x48, base + 0x54);

2015

writel(0x48, base + 0x54);

2016

2017

iounmap(base);

2017

iounmap(base);

2018

2019

switch (evm_id) {

2019

switch (evm_id) {

2020

case BEAGLE_BONE_A3:

2020

case BEAGLE_BONE_A3:

2021

case BEAGLE_BONE_OLD:

2021

case BEAGLE_BONE_OLD:

2022

am335x_rtc_info.pm_off = true;

2022

am335x_rtc_info.pm_off = true;

2023

break;

2023

break;

2024

default:

2024

default:

2025

break;

2025

break;

2026

}

2026

}

2027

2028

clk_disable(clk);

2028

clk_disable(clk);

2029

clk_put(clk);

2029

clk_put(clk);

2030

2031

if (omap_rev() >= AM335X_REV_ES2_0)

2031

if (omap_rev() >= AM335X_REV_ES2_0)

2032

am335x_rtc_info.wakeup_capable = 1;

2032

am335x_rtc_info.wakeup_capable = 1;

2033

2034

oh = omap_hwmod_lookup("rtc");

2034

oh = omap_hwmod_lookup("rtc");

2035

if (!oh) {

2035

if (!oh) {

2036

pr_err("could not look up %s\n", "rtc");

2036

pr_err("could not look up %s\n", "rtc");

2037

return;

2037

return;

2038

}

2038

}

2039

2040

pdev = omap_device_build(dev_name, -1, oh, &am335x_rtc_info,

2040

pdev = omap_device_build(dev_name, -1, oh, &am335x_rtc_info,

2041

sizeof(struct omap_rtc_pdata), NULL, 0, 0);

2041

sizeof(struct omap_rtc_pdata), NULL, 0, 0);

2042

WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",

2042

WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",

2043

dev_name, oh->name);

2043

dev_name, oh->name);

2044

}

2044

}

2045

2046

/* Enable clkout2 */

2046

/* Enable clkout2 */

2047

static struct pinmux_config clkout2_pin_mux[] = {

2047

static struct pinmux_config clkout2_pin_mux[] = {

2048

{"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},

2048

{"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},

2049

{NULL, 0},

2049

{NULL, 0},

2050

};

2050

};

2051

2052

static void clkout2_enable(int evm_id, int profile)

2052

static void clkout2_enable(int evm_id, int profile)

2053

{

2053

{

2054

struct clk *ck_32;

2054

struct clk *ck_32;

2055

2056

ck_32 = clk_get(NULL, "clkout2_ck");

2056

ck_32 = clk_get(NULL, "clkout2_ck");

2057

if (IS_ERR(ck_32)) {

2057

if (IS_ERR(ck_32)) {

2058

pr_err("Cannot clk_get ck_32\n");

2058

pr_err("Cannot clk_get ck_32\n");

2059

return;

2059

return;

2060

}

2060

}

2061

2062

clk_enable(ck_32);

2062

clk_enable(ck_32);

2063

2064

setup_pin_mux(clkout2_pin_mux);

2064

setup_pin_mux(clkout2_pin_mux);

2065

}

2065

}

2066

2067

static void sgx_init(int evm_id, int profile)

2067

static void sgx_init(int evm_id, int profile)

2068

{

2068

{

2069

if (omap3_has_sgx()) {

2069

if (omap3_has_sgx()) {

2070

am33xx_gpu_init();

2070

am33xx_gpu_init();

2071

}

2071

}

2072

}

2072

}

2073

/* General Purpose EVM */

2073

/* General Purpose EVM */

2074

static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {

2074

static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {

2075

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2075

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2076

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},

2076

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},

2077

{enable_ecap0, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2077

{enable_ecap0, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2078

PROFILE_2 | PROFILE_7) },

2078

PROFILE_2 | PROFILE_7) },

2079

{lcdc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2079

{lcdc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2080

PROFILE_2 | PROFILE_7) },

2080

PROFILE_2 | PROFILE_7) },

2081

{mfd_tscadc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2081

{mfd_tscadc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |

2082

PROFILE_2 | PROFILE_7) },

2082

PROFILE_2 | PROFILE_7) },

2083

{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2083

{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2084

{rgmii2_init, DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |

2084

{rgmii2_init, DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |

2085

PROFILE_4 | PROFILE_6) },

2085

PROFILE_4 | PROFILE_6) },

2086

{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2086

{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2087

{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2087

{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2088

{evm_nand_init, DEV_ON_DGHTR_BRD,

2088

{evm_nand_init, DEV_ON_DGHTR_BRD,

2089

(PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},

2089

(PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},

2090

{i2c1_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},

2090

{i2c1_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},

2091

{lis331dlh_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},

2091

{lis331dlh_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},

2092

{mcasp1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},

2092

{mcasp1_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},

2093

{mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},

2093

{mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},

2094

{mmc2_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |

2094

{mmc2_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |

2095

PROFILE_5)},

2095

PROFILE_5)},

2096

{mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},

2096

{mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},

2097

{mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},

2097

{mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_5},

2098

{spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},

2098

{spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},

2099

{uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |

2099

{uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |

2100

PROFILE_5)},

2100

PROFILE_5)},

2101

{wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},

2101

{wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},

2102

{d_can_init, DEV_ON_DGHTR_BRD, PROFILE_1},

2102

{d_can_init, DEV_ON_DGHTR_BRD, PROFILE_1},

2103

{matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},

2103

{matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},

2104

{volume_keys_init, DEV_ON_DGHTR_BRD, PROFILE_0},

2104

{volume_keys_init, DEV_ON_DGHTR_BRD, PROFILE_0},

2105

{uart2_init, DEV_ON_DGHTR_BRD, PROFILE_3},

2105

{uart2_init, DEV_ON_DGHTR_BRD, PROFILE_3},

2106

{haptics_init, DEV_ON_DGHTR_BRD, (PROFILE_4)},

2106

{haptics_init, DEV_ON_DGHTR_BRD, (PROFILE_4)},

2107

{sgx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2107

{sgx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2108

{NULL, 0, 0},

2108

{NULL, 0, 0},

2109

};

2109

};

2110

2111

/* Industrial Auto Motor Control EVM */

2111

/* Industrial Auto Motor Control EVM */

2112

static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {

2112

static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {

2113

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2113

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2114

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},

2114

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},

2115

{mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2115

{mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2116

{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2116

{usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2117

{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2117

{usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2118

{profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2118

{profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2119

{evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2119

{evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2120

{spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2120

{spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2121

{uart3_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2121

{uart3_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},

2122

{i2c1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2122

{i2c1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2123

{mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2123

{mmc0_no_cd_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2124

{NULL, 0, 0},

2124

{NULL, 0, 0},

2125

};

2125

};

2126

2127

/* Beaglebone < Rev A3 */

2127

/* Beaglebone < Rev A3 */

2128

static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {

2128

static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {

2129

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2129

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2130

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},

2130

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},

2131

{rmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2131

{rmii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2132

{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2132

{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2133

{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2133

{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2134

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2134

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2135

{i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2135

{i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2136

{sgx_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2136

{sgx_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2137

{NULL, 0, 0},

2137

{NULL, 0, 0},

2138

};

2138

};

2139

2140

/* Beaglebone Rev A3 and after */

2140

/* Beaglebone Rev A3 and after */

2141

static struct evm_dev_cfg beaglebone_dev_cfg[] = {

2141

static struct evm_dev_cfg beaglebone_dev_cfg[] = {

2142

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2142

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2143

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},

2143

{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},

2144

{tps65217_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2144

{tps65217_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2145

{mii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2145

{mii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2146

{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2146

{usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2147

{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2147

{usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2148

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2148

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2149

{i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2149

{i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2150

{sgx_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2150

{sgx_init, DEV_ON_BASEBOARD, PROFILE_NONE},

2151

{NULL, 0, 0},

2151

{NULL, 0, 0},

2152

};

2152

};

2153

2154

/* EVM - Starter Kit */

2154

/* EVM - Starter Kit */

2155

static struct evm_dev_cfg evm_sk_dev_cfg[] = {

2155

static struct evm_dev_cfg evm_sk_dev_cfg[] = {

2156

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2156

{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2157

{mmc1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2157

{mmc1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2158

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2158

{mmc0_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2159

{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2159

{rgmii1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2160

{rgmii2_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2160

{rgmii2_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2161

{lcdc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2161

{lcdc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2162

{enable_ecap2, DEV_ON_BASEBOARD, PROFILE_ALL},

2162

{enable_ecap2, DEV_ON_BASEBOARD, PROFILE_ALL},

2163

{mfd_tscadc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2163

{mfd_tscadc_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2164

{gpio_keys_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2164

{gpio_keys_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2165

{gpio_led_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2165

{gpio_led_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2166

{lis331dlh_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2166

{lis331dlh_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2167

{mcasp1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2167

{mcasp1_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2168

{uart1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2168

{uart1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2169

{wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2169

{wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2170

{gpio_ddr_vtt_enb_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2170

{gpio_ddr_vtt_enb_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2171

{sgx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2171

{sgx_init, DEV_ON_BASEBOARD, PROFILE_ALL},

2172

{NULL, 0, 0},

2172

{NULL, 0, 0},

2173

};

2173

};

2174

2175

static int am33xx_evm_tx_clk_dly_phy_fixup(struct phy_device *phydev)

2175

static int am33xx_evm_tx_clk_dly_phy_fixup(struct phy_device *phydev)

2176

{

2176

{

2177

phy_write(phydev, AR8051_PHY_DEBUG_ADDR_REG,

2177

phy_write(phydev, AR8051_PHY_DEBUG_ADDR_REG,

2178

AR8051_DEBUG_RGMII_CLK_DLY_REG);

2178

AR8051_DEBUG_RGMII_CLK_DLY_REG);

2179

phy_write(phydev, AR8051_PHY_DEBUG_DATA_REG, AR8051_RGMII_TX_CLK_DLY);

2179

phy_write(phydev, AR8051_PHY_DEBUG_DATA_REG, AR8051_RGMII_TX_CLK_DLY);

2180

2181

return 0;

2181

return 0;

2182

}

2182

}

2183

2184

#define AM33XX_VDD_MPU_OPP50_UV 1100000

2184

#define AM33XX_VDD_CORE_OPP50_UV 1100000

2185

#define AM33XX_OPP120_FREQ 600000000

2185

#define AM33XX_OPP120_FREQ 600000000

2186

#define AM33XX_OPPTURBO_FREQ 720000000

2186

#define AM33XX_OPPTURBO_FREQ 720000000

2187

2188

#define AM33XX_ES2_0_VDD_MPU_OPP50_UV 950000

2188

#define AM33XX_ES2_0_VDD_CORE_OPP50_UV 950000

2189

#define AM33XX_ES2_0_OPP120_FREQ 720000000

2189

#define AM33XX_ES2_0_OPPTURBO_FREQ 800000000

2190

#define AM33XX_ES2_0_OPPTURBO_FREQ 800000000

2190

#define AM33XX_ES2_0_OPPNITRO_FREQ 1000000000

2191

#define AM33XX_ES2_0_OPPNITRO_FREQ 1000000000

2191

2192

#define AM33XX_ES2_1_VDD_MPU_OPP50_UV 950000

2193

#define AM33XX_ES2_1_VDD_CORE_OPP50_UV 950000

2194

#define AM33XX_ES2_1_OPP120_FREQ 720000000

2193

#define AM33XX_ES2_1_OPPTURBO_FREQ 800000000

2195

#define AM33XX_ES2_1_OPPTURBO_FREQ 800000000

2194

#define AM33XX_ES2_1_OPPNITRO_FREQ 1000000000

2196

#define AM33XX_ES2_1_OPPNITRO_FREQ 1000000000

2195

2197

2196

static void am335x_opp_update(void)

2198

static void am335x_opp_update(void)

2197

{

2199

{

2198

u32 rev;

2200

u32 rev;

2199

int voltage_uv = 0;

2201

int voltage_uv = 0;

2200

struct device *core_dev, *mpu_dev;

2202

struct device *core_dev, *mpu_dev;

2201

struct regulator *core_reg;

2203

struct regulator *core_reg;

2202

2204

2203

core_dev = omap_device_get_by_hwmod_name("l3_main");

2205

core_dev = omap_device_get_by_hwmod_name("l3_main");

2204

mpu_dev = omap_device_get_by_hwmod_name("mpu");

2206

mpu_dev = omap_device_get_by_hwmod_name("mpu");

2205

2207

2206

if (!mpu_dev || !core_dev) {

2208

if (!mpu_dev || !core_dev) {

2207

pr_err("%s: Aiee.. no mpu/core devices? %p %p\n", __func__,

2209

pr_err("%s: Aiee.. no mpu/core devices? %p %p\n", __func__,

2208

mpu_dev, core_dev);

2210

mpu_dev, core_dev);

2209

return;

2211

return;

2210

}

2212

}

2211

2213

2212

core_reg = regulator_get(core_dev, "vdd_core");

2214

core_reg = regulator_get(core_dev, "vdd_core");

2213

if (IS_ERR(core_reg)) {

2215

if (IS_ERR(core_reg)) {

2214

pr_err("%s: unable to get core regulator\n", __func__);

2216

pr_err("%s: unable to get core regulator\n", __func__);

2215

return;

2217

return;

2216

}

2218

}

2217

2219

2218

/*

2220

/*

2219

* Ensure physical regulator is present.

2221

* Ensure physical regulator is present.

2220

* (e.g. could be dummy regulator.)

2222

* (e.g. could be dummy regulator.)

2221

*/

2223

*/

2222

voltage_uv = regulator_get_voltage(core_reg);

2224

voltage_uv = regulator_get_voltage(core_reg);

2223

if (voltage_uv < 0) {

2225

if (voltage_uv < 0) {

2224

pr_err("%s: physical regulator not present for core" \

2226

pr_err("%s: physical regulator not present for core" \

2225

"(%d)\n", __func__, voltage_uv);

2227

"(%d)\n", __func__, voltage_uv);

2226

regulator_put(core_reg);

2228

regulator_put(core_reg);

2227

return;

2229

return;

2228

}

2230

}

2229

2231

2230

pr_debug("%s: core regulator value %d\n", __func__, voltage_uv);

2232

pr_debug("%s: core regulator value %d\n", __func__, voltage_uv);

2231

if (voltage_uv > 0) {

2233

if (voltage_uv > 0) {

2232

rev = omap_rev();

2234

rev = omap_rev();

2233

switch (rev) {

2235

switch (rev) {

2234

case AM335X_REV_ES1_0:

2236

case AM335X_REV_ES1_0:

2235

if (voltage_uv <= AM33XX_VDD_MPU_OPP50_UV) {

2237

if (voltage_uv <= AM33XX_VDD_CORE_OPP50_UV) {

2236

/*

2238

/*

2237

* disable the higher freqs - we dont care about

2239

* disable the higher freqs - we dont care about

2238

* the results

2240

* the results

2239

*/

2241

*/

2240

opp_disable(mpu_dev, AM33XX_OPP120_FREQ);

2242

opp_disable(mpu_dev, AM33XX_OPP120_FREQ);

2241

opp_disable(mpu_dev, AM33XX_OPPTURBO_FREQ);

2243

opp_disable(mpu_dev, AM33XX_OPPTURBO_FREQ);

2242

}

2244

}

2243

break;

2245

break;

2244

case AM335X_REV_ES2_0:

2246

case AM335X_REV_ES2_0:

2245

if (voltage_uv <= AM33XX_ES2_0_VDD_MPU_OPP50_UV) {

2247

if (voltage_uv <= AM33XX_ES2_0_VDD_CORE_OPP50_UV) {

2246

/*

2248

/*

2247

* disable the higher freqs - we dont care about

2249

* disable the higher freqs - we dont care about

2248

* the results

2250

* the results

2249

*/

2251

*/

2250

opp_disable(mpu_dev,

2252

opp_disable(mpu_dev,

2253

AM33XX_ES2_0_OPP120_FREQ);

2254

opp_disable(mpu_dev,

2251

AM33XX_ES2_0_OPPTURBO_FREQ);

2255

AM33XX_ES2_0_OPPTURBO_FREQ);

2252

opp_disable(mpu_dev,

2256

opp_disable(mpu_dev,

2253

AM33XX_ES2_0_OPPNITRO_FREQ);

2257

AM33XX_ES2_0_OPPNITRO_FREQ);

2254

}

2258

}

2255

break;

2259

break;

2256

case AM335X_REV_ES2_1:

2260

case AM335X_REV_ES2_1:

2257

/* FALLTHROUGH */

2261

/* FALLTHROUGH */

2258

default:

2262

default:

2259

if (voltage_uv <= AM33XX_ES2_1_VDD_MPU_OPP50_UV) {

2263

if (voltage_uv <= AM33XX_ES2_1_VDD_CORE_OPP50_UV) {

2260

/*

2264

/*

2261

* disable the higher freqs - we dont care about

2265

* disable the higher freqs - we dont care about

2262

* the results

2266

* the results

2263

*/

2267

*/

2268

opp_disable(mpu_dev,

2269

AM33XX_ES2_1_OPP120_FREQ);

2264

opp_disable(mpu_dev,

2270

opp_disable(mpu_dev,

2265

AM33XX_ES2_1_OPPTURBO_FREQ);

2271

AM33XX_ES2_1_OPPTURBO_FREQ);

2266

opp_disable(mpu_dev,

2272

opp_disable(mpu_dev,

2267

AM33XX_ES2_1_OPPNITRO_FREQ);

2273

AM33XX_ES2_1_OPPNITRO_FREQ);

2268

}

2274

}

2269

break;

2275

break;

2270

}

2276

}

2271

}

2277

}

2272

}

2278

}

2273

2279

2274

static void setup_general_purpose_evm(void)

2280

static void setup_general_purpose_evm(void)

2275

{

2281

{

2276

u32 prof_sel = am335x_get_profile_selection();

2282

u32 prof_sel = am335x_get_profile_selection();

2277

u32 boardid = GEN_PURP_EVM;

2283

u32 boardid = GEN_PURP_EVM;

2278

2284

2279

if (!strncmp("1.5A", config.version, 4))

2285

if (!strncmp("1.5A", config.version, 4))

2280

boardid = GEN_PURP_DDR3_EVM;

2286

boardid = GEN_PURP_DDR3_EVM;

2281

2287

2282

pr_info("The board is general purpose EVM %sin profile %d\n",

2288

pr_info("The board is general purpose EVM %sin profile %d\n",

2283

((boardid == GEN_PURP_DDR3_EVM) ? "with DDR3 " : ""),

2289

((boardid == GEN_PURP_DDR3_EVM) ? "with DDR3 " : ""),

2284

prof_sel);

2290

prof_sel);

2285

2291

2286

_configure_device(boardid, gen_purp_evm_dev_cfg, (1L << prof_sel));

2292

_configure_device(boardid, gen_purp_evm_dev_cfg, (1L << prof_sel));

2287

2293

2288

am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);

2294

am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);

2289

/* Atheros Tx Clk delay Phy fixup */

2295

/* Atheros Tx Clk delay Phy fixup */

2290

phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,

2296

phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,

2291

am33xx_evm_tx_clk_dly_phy_fixup);

2297

am33xx_evm_tx_clk_dly_phy_fixup);

2292

}

2298

}

2293

2299

2294

static void setup_ind_auto_motor_ctrl_evm(void)

2300

static void setup_ind_auto_motor_ctrl_evm(void)

2295

{

2301

{

2296

u32 prof_sel = am335x_get_profile_selection();

2302

u32 prof_sel = am335x_get_profile_selection();

2297

2303

2298

pr_info("The board is an industrial automation EVM in profile %d\n",

2304

pr_info("The board is an industrial automation EVM in profile %d\n",

2299

prof_sel);

2305

prof_sel);

2300

2306

2301

/* Only Profile 0 is supported */

2307

/* Only Profile 0 is supported */

2302

if ((1L << prof_sel) != PROFILE_0) {

2308

if ((1L << prof_sel) != PROFILE_0) {

2303

pr_err("AM335X: Only Profile 0 is supported\n");

2309

pr_err("AM335X: Only Profile 0 is supported\n");

2304

pr_err("Assuming profile 0 & continuing\n");

2310

pr_err("Assuming profile 0 & continuing\n");

2305

prof_sel = PROFILE_0;

2311

prof_sel = PROFILE_0;

2306

}

2312

}

2307

2313

2308

_configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,

2314

_configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,

2309

PROFILE_0);

2315

PROFILE_0);

2310

2316

2311

am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, "0:1e", "0:00");

2317

am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, "0:1e", "0:00");

2312

}

2318

}

2313

2319

2314

/* BeagleBone < Rev A3 */

2320

/* BeagleBone < Rev A3 */

2315

static void setup_beaglebone_old(void)

2321

static void setup_beaglebone_old(void)

2316

{

2322

{

2317

pr_info("The board is a AM335x Beaglebone < Rev A3.\n");

2323

pr_info("The board is a AM335x Beaglebone < Rev A3.\n");

2318

2324

2319

/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */

2325

/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */

2320

am335x_mmc[0].gpio_wp = -EINVAL;

2326

am335x_mmc[0].gpio_wp = -EINVAL;

2321

2327

2322

_configure_device(BEAGLE_BONE_OLD, beaglebone_old_dev_cfg,

2328

_configure_device(BEAGLE_BONE_OLD, beaglebone_old_dev_cfg,

2323

PROFILE_NONE);

2329

PROFILE_NONE);

2324

2330

2325

phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,

2331

phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,

2326

beaglebone_phy_fixup);

2332

beaglebone_phy_fixup);

2327

2333

2328

am33xx_cpsw_init(AM33XX_CPSW_MODE_RMII, NULL, NULL);

2334

am33xx_cpsw_init(AM33XX_CPSW_MODE_RMII, NULL, NULL);

2329

}

2335

}

2330

2336

2331

/* BeagleBone after Rev A3 */

2337

/* BeagleBone after Rev A3 */

2332

static void setup_beaglebone(void)

2338

static void setup_beaglebone(void)

2333

{

2339

{

2334

pr_info("The board is a AM335x Beaglebone.\n");

2340

pr_info("The board is a AM335x Beaglebone.\n");

2335

2341

2336

/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */

2342

/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */

2337

am335x_mmc[0].gpio_wp = -EINVAL;

2343

am335x_mmc[0].gpio_wp = -EINVAL;

2338

2344

2339

_configure_device(BEAGLE_BONE_A3, beaglebone_dev_cfg, PROFILE_NONE);

2345

_configure_device(BEAGLE_BONE_A3, beaglebone_dev_cfg, PROFILE_NONE);

2340

2346

2341

/* TPS65217 regulator has full constraints */

2347

/* TPS65217 regulator has full constraints */

2342

regulator_has_full_constraints();

2348

regulator_has_full_constraints();

2343

2349

2344

am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, NULL, NULL);

2350

am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, NULL, NULL);

2345

}

2351

}

2346

2352

2347

/* EVM - Starter Kit */

2353

/* EVM - Starter Kit */

2348

static void setup_starterkit(void)

2354

static void setup_starterkit(void)

2349

{

2355

{

2350

pr_info("The board is a AM335x Starter Kit.\n");

2356

pr_info("The board is a AM335x Starter Kit.\n");

2351

2357

2352

/* Starter Kit has Micro-SD slot which doesn't have Write Protect pin */

2358

/* Starter Kit has Micro-SD slot which doesn't have Write Protect pin */

2353

am335x_mmc[0].gpio_wp = -EINVAL;

2359

am335x_mmc[0].gpio_wp = -EINVAL;

2354

2360

2355

_configure_device(EVM_SK, evm_sk_dev_cfg, PROFILE_NONE);

2361

_configure_device(EVM_SK, evm_sk_dev_cfg, PROFILE_NONE);

2356

2362

2357

am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);

2363

am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);

2358

/* Atheros Tx Clk delay Phy fixup */

2364

/* Atheros Tx Clk delay Phy fixup */

2359

phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,

2365

phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,

2360

am33xx_evm_tx_clk_dly_phy_fixup);

2366

am33xx_evm_tx_clk_dly_phy_fixup);

2361

}

2367

}

2362

2368

2363

static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)

2369

static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)

2364

{

2370

{

2365

int ret;

2371

int ret;

2366

2372

2367

/*

2373

/*

2368

* Read from the EEPROM to see the presence of daughter board.

2374

* Read from the EEPROM to see the presence of daughter board.

2369

* If present, print the cpld version.

2375

* If present, print the cpld version.

2370

*/

2376

*/

2371

2377

2372

ret = m->read(m, (char *)&config1, 0, sizeof(config1));

2378

ret = m->read(m, (char *)&config1, 0, sizeof(config1));

2373

if (ret == sizeof(config1)) {

2379

if (ret == sizeof(config1)) {

2374

pr_info("Detected a daughter card on AM335x EVM..");

2380

pr_info("Detected a daughter card on AM335x EVM..");

2375

daughter_brd_detected = true;

2381

daughter_brd_detected = true;

2376

}

2382

}

2377

else {

2383

else {

2378

pr_info("No daughter card found\n");

2384

pr_info("No daughter card found\n");

2379

daughter_brd_detected = false;

2385

daughter_brd_detected = false;

2380

return;

2386

return;

2381

}

2387

}

2382

2388

2383

if (!strncmp("CPLD", config1.cpld_ver, 4))

2389

if (!strncmp("CPLD", config1.cpld_ver, 4))

2384

pr_info("CPLD version: %s\n", config1.cpld_ver);

2390

pr_info("CPLD version: %s\n", config1.cpld_ver);

2385

else

2391

else

2386

pr_err("Unknown CPLD version found\n");

2392

pr_err("Unknown CPLD version found\n");

2387

}

2393

}

2388

2394

2389

static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)

2395

static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)

2390

{

2396

{

2391

int ret;

2397

int ret;

2392

char tmp[10];

2398

char tmp[10];

2393

2399

2394

/* 1st get the MAC address from EEPROM */

2400

/* 1st get the MAC address from EEPROM */

2395

ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,

2401

ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,

2396

EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));

2402

EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));

2397

2403

2398

if (ret != sizeof(am335x_mac_addr)) {

2404

if (ret != sizeof(am335x_mac_addr)) {

2399

pr_warning("AM335X: EVM Config read fail: %d\n", ret);

2405

pr_warning("AM335X: EVM Config read fail: %d\n", ret);

2400

return;

2406

return;

2401

}

2407

}

2402

2408

2403

/* Fillup global mac id */

2409

/* Fillup global mac id */

2404

am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],

2410

am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],

2405

&am335x_mac_addr[1][0]);

2411

&am335x_mac_addr[1][0]);

2406

2412

2407

/* get board specific data */

2413

/* get board specific data */

2408

ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));

2414

ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));

2409

if (ret != sizeof(config)) {

2415

if (ret != sizeof(config)) {

2410

pr_err("AM335X EVM config read fail, read %d bytes\n", ret);

2416

pr_err("AM335X EVM config read fail, read %d bytes\n", ret);

2411

pr_err("This likely means that there either is no/or a failed EEPROM\n");

2417

pr_err("This likely means that there either is no/or a failed EEPROM\n");

2412

goto out;

2418

goto out;

2413

}

2419

}

2414

2420

2415

if (config.header != AM335X_EEPROM_HEADER) {

2421

if (config.header != AM335X_EEPROM_HEADER) {

2416

pr_err("AM335X: wrong header 0x%x, expected 0x%x\n",

2422

pr_err("AM335X: wrong header 0x%x, expected 0x%x\n",

2417

config.header, AM335X_EEPROM_HEADER);

2423

config.header, AM335X_EEPROM_HEADER);

2418

goto out;

2424

goto out;

2419

}

2425

}

2420

2426

2421

if (strncmp("A335", config.name, 4)) {

2427

if (strncmp("A335", config.name, 4)) {

2422

pr_err("Board %s\ndoesn't look like an AM335x board\n",

2428

pr_err("Board %s\ndoesn't look like an AM335x board\n",

2423

config.name);

2429

config.name);

2424

goto out;

2430

goto out;

2425

}

2431

}

2426

2432

2427

snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);

2433

snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);

2428

pr_info("Board name: %s\n", tmp);

2434

pr_info("Board name: %s\n", tmp);

2429

snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);

2435

snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);

2430

pr_info("Board version: %s\n", tmp);

2436

pr_info("Board version: %s\n", tmp);

2431

2437

2432

if (!strncmp("A335BONE", config.name, 8)) {

2438

if (!strncmp("A335BONE", config.name, 8)) {

2433

daughter_brd_detected = false;

2439

daughter_brd_detected = false;

2434

if(!strncmp("00A1", config.version, 4) ||

2440

if(!strncmp("00A1", config.version, 4) ||

2435

!strncmp("00A2", config.version, 4))

2441

!strncmp("00A2", config.version, 4))

2436

setup_beaglebone_old();

2442

setup_beaglebone_old();

2437

else

2443

else

2438

setup_beaglebone();

2444

setup_beaglebone();

2439

} else if (!strncmp("A335X_SK", config.name, 8)) {

2445

} else if (!strncmp("A335X_SK", config.name, 8)) {

2440

daughter_brd_detected = false;

2446

daughter_brd_detected = false;

2441

setup_starterkit();

2447

setup_starterkit();

2442

} else {

2448

} else {

2443

/* only 6 characters of options string used for now */

2449

/* only 6 characters of options string used for now */

2444

snprintf(tmp, 7, "%s", config.opt);

2450

snprintf(tmp, 7, "%s", config.opt);

2445

pr_info("SKU: %s\n", tmp);

2451

pr_info("SKU: %s\n", tmp);

2446

2452

2447

if (!strncmp("SKU#01", config.opt, 6))

2453

if (!strncmp("SKU#01", config.opt, 6))

2448

setup_general_purpose_evm();

2454

setup_general_purpose_evm();

2449

else if (!strncmp("SKU#02", config.opt, 6))

2455

else if (!strncmp("SKU#02", config.opt, 6))

2450

setup_ind_auto_motor_ctrl_evm();

2456

setup_ind_auto_motor_ctrl_evm();

2451

else

2457

else

2452

goto out;

2458

goto out;

2453

}

2459

}

2454

2460

2455

am335x_opp_update();

2461

am335x_opp_update();

2456

2462

2457

return;

2463

return;

2458

2464

2459

out:

2465

out:

2460

/*

2466

/*

2461

* If the EEPROM hasn't been programed or an incorrect header

2467

* If the EEPROM hasn't been programed or an incorrect header

2462

* or board name are read then the hardware details are unknown.

2468

* or board name are read then the hardware details are unknown.

2463

* Notify the user and call machine_halt to stop the boot process.

2469

* Notify the user and call machine_halt to stop the boot process.

2464

*/

2470

*/

2465

pr_err("The error message above indicates that there is an issue with\n"

2471

pr_err("The error message above indicates that there is an issue with\n"

2466

"the EEPROM or the EEPROM contents. After verifying the EEPROM\n"

2472

"the EEPROM or the EEPROM contents. After verifying the EEPROM\n"

2467

"contents, if any, refer to the %s function in the\n"

2473

"contents, if any, refer to the %s function in the\n"

2468

"%s file to modify the board\n"

2474

"%s file to modify the board\n"

2469

"initialization code to match the hardware configuration\n",

2475

"initialization code to match the hardware configuration\n",

2470

__func__ , __FILE__);

2476

__func__ , __FILE__);

2471

machine_halt();

2477

machine_halt();

2472

}

2478

}

2473

2479

2474

static struct at24_platform_data am335x_daughter_board_eeprom_info = {

2480

static struct at24_platform_data am335x_daughter_board_eeprom_info = {

2475

.byte_len = (256*1024) / 8,

2481

.byte_len = (256*1024) / 8,

2476

.page_size = 64,

2482

.page_size = 64,

2477

.flags = AT24_FLAG_ADDR16,

2483

.flags = AT24_FLAG_ADDR16,

2478

.setup = am335x_setup_daughter_board,

2484

.setup = am335x_setup_daughter_board,

2479

.context = (void *)NULL,

2485

.context = (void *)NULL,

2480

};

2486

};

2481

2487

2482

static struct at24_platform_data am335x_baseboard_eeprom_info = {

2488

static struct at24_platform_data am335x_baseboard_eeprom_info = {

2483

.byte_len = (256*1024) / 8,

2489

.byte_len = (256*1024) / 8,

2484

.page_size = 64,

2490

.page_size = 64,

2485

.flags = AT24_FLAG_ADDR16,

2491

.flags = AT24_FLAG_ADDR16,

2486

.setup = am335x_evm_setup,

2492

.setup = am335x_evm_setup,

2487

.context = (void *)NULL,

2493

.context = (void *)NULL,

2488

};

2494

};

2489

2495

2490

static struct regulator_init_data am335x_dummy = {

2496

static struct regulator_init_data am335x_dummy = {

2491

.constraints.always_on = true,

2497

.constraints.always_on = true,

2492

};

2498

};

2493

2499

2494

static struct regulator_consumer_supply am335x_vdd1_supply[] = {

2500

static struct regulator_consumer_supply am335x_vdd1_supply[] = {

2495

REGULATOR_SUPPLY("vdd_mpu", NULL),

2501

REGULATOR_SUPPLY("vdd_mpu", NULL),

2496

};

2502

};

2497

2503

2498

static struct regulator_init_data am335x_vdd1 = {

2504

static struct regulator_init_data am335x_vdd1 = {

2499

.constraints = {

2505

.constraints = {

2500

.min_uV = 600000,

2506

.min_uV = 600000,

2501

.max_uV = 1500000,

2507

.max_uV = 1500000,

2502

.valid_modes_mask = REGULATOR_MODE_NORMAL,

2508

.valid_modes_mask = REGULATOR_MODE_NORMAL,

2503

.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,

2509

.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,

2504

.always_on = 1,

2510

.always_on = 1,

2505

},

2511

},

2506

.num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),

2512

.num_consumer_supplies = ARRAY_SIZE(am335x_vdd1_supply),

2507

.consumer_supplies = am335x_vdd1_supply,

2513

.consumer_supplies = am335x_vdd1_supply,

2508

};

2514

};

2509

2515

2510

static struct regulator_consumer_supply am335x_vdd2_supply[] = {

2516

static struct regulator_consumer_supply am335x_vdd2_supply[] = {

2511

REGULATOR_SUPPLY("vdd_core", NULL),

2517

REGULATOR_SUPPLY("vdd_core", NULL),

2512

};

2518

};

2513

2519

2514

static struct regulator_init_data am335x_vdd2 = {

2520

static struct regulator_init_data am335x_vdd2 = {

2515

.constraints = {

2521

.constraints = {

2516

.min_uV = 600000,

2522

.min_uV = 600000,

2517

.max_uV = 1500000,

2523

.max_uV = 1500000,

2518

.valid_modes_mask = REGULATOR_MODE_NORMAL,

2524

.valid_modes_mask = REGULATOR_MODE_NORMAL,

2519

.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,

2525

.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,

2520

.always_on = 1,

2526

.always_on = 1,

2521

},

2527

},

2522

.num_consumer_supplies = ARRAY_SIZE(am335x_vdd2_supply),

2528

.num_consumer_supplies = ARRAY_SIZE(am335x_vdd2_supply),

2523

.consumer_supplies = am335x_vdd2_supply,

2529

.consumer_supplies = am335x_vdd2_supply,

2524

};

2530

};

2525

2531

2526

static struct tps65910_board am335x_tps65910_info = {

2532

static struct tps65910_board am335x_tps65910_info = {

2527

.tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,

2533

.tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,

2528

.tps65910_pmic_init_data[TPS65910_REG_VIO] = &am335x_dummy,

2534

.tps65910_pmic_init_data[TPS65910_REG_VIO] = &am335x_dummy,

2529

.tps65910_pmic_init_data[TPS65910_REG_VDD1] = &am335x_vdd1,

2535

.tps65910_pmic_init_data[TPS65910_REG_VDD1] = &am335x_vdd1,

2530

.tps65910_pmic_init_data[TPS65910_REG_VDD2] = &am335x_vdd2,

2536

.tps65910_pmic_init_data[TPS65910_REG_VDD2] = &am335x_vdd2,

2531

.tps65910_pmic_init_data[TPS65910_REG_VDD3] = &am335x_dummy,

2537

.tps65910_pmic_init_data[TPS65910_REG_VDD3] = &am335x_dummy,

2532

.tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &am335x_dummy,

2538

.tps65910_pmic_init_data[TPS65910_REG_VDIG1] = &am335x_dummy,

2533

.tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &am335x_dummy,

2539

.tps65910_pmic_init_data[TPS65910_REG_VDIG2] = &am335x_dummy,

2534

.tps65910_pmic_init_data[TPS65910_REG_VPLL] = &am335x_dummy,

2540

.tps65910_pmic_init_data[TPS65910_REG_VPLL] = &am335x_dummy,

2535

.tps65910_pmic_init_data[TPS65910_REG_VDAC] = &am335x_dummy,

2541

.tps65910_pmic_init_data[TPS65910_REG_VDAC] = &am335x_dummy,

2536

.tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &am335x_dummy,

2542

.tps65910_pmic_init_data[TPS65910_REG_VAUX1] = &am335x_dummy,

2537

.tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &am335x_dummy,

2543

.tps65910_pmic_init_data[TPS65910_REG_VAUX2] = &am335x_dummy,

2538

.tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &am335x_dummy,

2544

.tps65910_pmic_init_data[TPS65910_REG_VAUX33] = &am335x_dummy,

2539

.tps65910_pmic_init_data[TPS65910_REG_VMMC] = &am335x_dummy,

2545

.tps65910_pmic_init_data[TPS65910_REG_VMMC] = &am335x_dummy,

2540

};

2546

};

2541

2547

2542

/*

2548

/*

2543

* Daughter board Detection.

2549

* Daughter board Detection.

2544

* Every board has a ID memory (EEPROM) on board. We probe these devices at

2550

* Every board has a ID memory (EEPROM) on board. We probe these devices at

2545

* machine init, starting from daughter board and ending with baseboard.

2551

* machine init, starting from daughter board and ending with baseboard.

2546

* Assumptions :

2552

* Assumptions :

2547

* 1. probe for i2c devices are called in the order they are included in

2553

* 1. probe for i2c devices are called in the order they are included in

2548

* the below struct. Daughter boards eeprom are probed 1st. Baseboard

2554

* the below struct. Daughter boards eeprom are probed 1st. Baseboard

2549

* eeprom probe is called last.

2555

* eeprom probe is called last.

2550

*/

2556

*/

2551

static struct i2c_board_info __initdata am335x_i2c0_boardinfo[] = {

2557

static struct i2c_board_info __initdata am335x_i2c0_boardinfo[] = {

2552

{

2558

{

2553

/* Daughter Board EEPROM */

2559

/* Daughter Board EEPROM */

2554

I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),

2560

I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),

2555

.platform_data = &am335x_daughter_board_eeprom_info,

2561

.platform_data = &am335x_daughter_board_eeprom_info,

2556

},

2562

},

2557

{

2563

{

2558

/* Baseboard board EEPROM */

2564

/* Baseboard board EEPROM */

2559

I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),

2565

I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),

2560

.platform_data = &am335x_baseboard_eeprom_info,

2566

.platform_data = &am335x_baseboard_eeprom_info,

2561

},

2567

},

2562

{

2568

{

2563

I2C_BOARD_INFO("cpld_reg", 0x35),

2569

I2C_BOARD_INFO("cpld_reg", 0x35),

2564

},

2570

},

2565

{

2571

{

2566

I2C_BOARD_INFO("tlc59108", 0x40),

2572

I2C_BOARD_INFO("tlc59108", 0x40),

2567

},

2573

},

2568

{

2574

{

2569

I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),

2575

I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),

2570

.platform_data = &am335x_tps65910_info,

2576

.platform_data = &am335x_tps65910_info,

2571

},

2577

},

2572

{

2578

{

2573

I2C_BOARD_INFO("tlv320aic3x", 0x1b),

2579

I2C_BOARD_INFO("tlv320aic3x", 0x1b),

2574

},

2580

},

2575

};

2581

};

2576

2582

2577

static struct omap_musb_board_data musb_board_data = {

2583

static struct omap_musb_board_data musb_board_data = {

2578

.interface_type = MUSB_INTERFACE_ULPI,

2584

.interface_type = MUSB_INTERFACE_ULPI,

2579

/*

2585

/*

2580

* mode[0:3] = USB0PORT's mode

2586

* mode[0:3] = USB0PORT's mode

2581

* mode[4:7] = USB1PORT's mode

2587

* mode[4:7] = USB1PORT's mode

2582

* AM335X beta EVM has USB0 in OTG mode and USB1 in host mode.

2588

* AM335X beta EVM has USB0 in OTG mode and USB1 in host mode.

2583

*/

2589

*/

2584

.mode = (MUSB_HOST << 4) | MUSB_OTG,

2590

.mode = (MUSB_HOST << 4) | MUSB_OTG,

2585

.power = 500,

2591

.power = 500,

2586

.instances = 1,

2592

.instances = 1,

2587

};

2593

};

2588

2594

2589

static int cpld_reg_probe(struct i2c_client *client,

2595

static int cpld_reg_probe(struct i2c_client *client,

2590

const struct i2c_device_id *id)

2596

const struct i2c_device_id *id)

2591

{

2597

{

2592

cpld_client = client;

2598

cpld_client = client;

2593

return 0;

2599

return 0;

2594

}

2600

}

2595

2601

2596

static int __devexit cpld_reg_remove(struct i2c_client *client)

2602

static int __devexit cpld_reg_remove(struct i2c_client *client)

2597

{

2603

{

2598

cpld_client = NULL;

2604

cpld_client = NULL;

2599

return 0;

2605

return 0;

2600

}

2606

}

2601

2607

2602

static const struct i2c_device_id cpld_reg_id[] = {

2608

static const struct i2c_device_id cpld_reg_id[] = {

2603

{ "cpld_reg", 0 },

2609

{ "cpld_reg", 0 },

2604

{ }

2610

{ }

2605

};

2611

};

2606

2612

2607

static struct i2c_driver cpld_reg_driver = {

2613

static struct i2c_driver cpld_reg_driver = {

2608

.driver = {

2614

.driver = {

2609

.name = "cpld_reg",

2615

.name = "cpld_reg",

2610

},

2616

},

2611

.probe = cpld_reg_probe,

2617

.probe = cpld_reg_probe,

2612

.remove = cpld_reg_remove,

2618

.remove = cpld_reg_remove,

2613

.id_table = cpld_reg_id,

2619

.id_table = cpld_reg_id,

2614

};

2620

};

2615

2621

2616

static void evm_init_cpld(void)

2622

static void evm_init_cpld(void)

2617

{

2623

{

2618

i2c_add_driver(&cpld_reg_driver);

2624

i2c_add_driver(&cpld_reg_driver);

2619

}

2625

}

2620

2626

2621

static void __init am335x_evm_i2c_init(void)

2627

static void __init am335x_evm_i2c_init(void)

2622

{

2628

{

2623

/* Initially assume General Purpose EVM Config */

2629

/* Initially assume General Purpose EVM Config */

2624

am335x_evm_id = GEN_PURP_EVM;

2630

am335x_evm_id = GEN_PURP_EVM;

2625

2631

2626

evm_init_cpld();

2632

evm_init_cpld();

2627

2633

2628

omap_register_i2c_bus(1, 100, am335x_i2c0_boardinfo,

2634

omap_register_i2c_bus(1, 100, am335x_i2c0_boardinfo,

2629

ARRAY_SIZE(am335x_i2c0_boardinfo));

2635

ARRAY_SIZE(am335x_i2c0_boardinfo));

2630

}

2636

}

2631

2637

2632

void __iomem *am33xx_emif_base;

2638

void __iomem *am33xx_emif_base;

2633

2639

2634

void __iomem * __init am33xx_get_mem_ctlr(void)

2640

void __iomem * __init am33xx_get_mem_ctlr(void)

2635

{

2641

{

2636

2642

2637

am33xx_emif_base = ioremap(AM33XX_EMIF0_BASE, SZ_32K);

2643

am33xx_emif_base = ioremap(AM33XX_EMIF0_BASE, SZ_32K);

2638

2644

2639

if (!am33xx_emif_base)

2645

if (!am33xx_emif_base)

2640

pr_warning("%s: Unable to map DDR2 controller", __func__);

2646

pr_warning("%s: Unable to map DDR2 controller", __func__);

2641

2647

2642

return am33xx_emif_base;

2648

return am33xx_emif_base;

2643

}

2649

}

2644

2650

2645

void __iomem *am33xx_get_ram_base(void)

2651

void __iomem *am33xx_get_ram_base(void)

2646

{

2652

{

2647

return am33xx_emif_base;

2653

return am33xx_emif_base;

2648

}

2654

}

2649

2655

2650

void __iomem *am33xx_gpio0_base;

2656

void __iomem *am33xx_gpio0_base;

2651

2657

2652

void __iomem *am33xx_get_gpio0_base(void)

2658

void __iomem *am33xx_get_gpio0_base(void)

2653

{

2659

{

2654

am33xx_gpio0_base = ioremap(AM33XX_GPIO0_BASE, SZ_4K);

2660

am33xx_gpio0_base = ioremap(AM33XX_GPIO0_BASE, SZ_4K);

2655

2661

2656

return am33xx_gpio0_base;

2662

return am33xx_gpio0_base;

2657

}

2663

}

2658

2664

2659

static struct resource am33xx_cpuidle_resources[] = {

2665

static struct resource am33xx_cpuidle_resources[] = {

2660

{

2666

{

2661

.start = AM33XX_EMIF0_BASE,

2667

.start = AM33XX_EMIF0_BASE,

2662

.end = AM33XX_EMIF0_BASE + SZ_32K - 1,

2668

.end = AM33XX_EMIF0_BASE + SZ_32K - 1,

2663

.flags = IORESOURCE_MEM,

2669

.flags = IORESOURCE_MEM,

2664

},

2670

},

2665

};

2671

};

2666

2672

2667

/* AM33XX devices support DDR2 power down */

2673

/* AM33XX devices support DDR2 power down */

2668

static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {

2674

static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {

2669

.ddr2_pdown = 1,

2675

.ddr2_pdown = 1,

2670

};

2676

};

2671

2677

2672

static struct platform_device am33xx_cpuidle_device = {

2678

static struct platform_device am33xx_cpuidle_device = {

2673

.name = "cpuidle-am33xx",

2679

.name = "cpuidle-am33xx",

2674

.num_resources = ARRAY_SIZE(am33xx_cpuidle_resources),

2680

.num_resources = ARRAY_SIZE(am33xx_cpuidle_resources),

2675

.resource = am33xx_cpuidle_resources,

2681

.resource = am33xx_cpuidle_resources,

2676

.dev = {

2682

.dev = {

2677

.platform_data = &am33xx_cpuidle_pdata,

2683

.platform_data = &am33xx_cpuidle_pdata,

2678

},

2684

},

2679

};

2685

};

2680

2686

2681

static void __init am33xx_cpuidle_init(void)

2687

static void __init am33xx_cpuidle_init(void)

2682

{

2688

{

2683

int ret;

2689

int ret;

2684

2690

2685

am33xx_cpuidle_pdata.emif_base = am33xx_get_mem_ctlr();

2691

am33xx_cpuidle_pdata.emif_base = am33xx_get_mem_ctlr();

2686

2692

2687

ret = platform_device_register(&am33xx_cpuidle_device);

2693

ret = platform_device_register(&am33xx_cpuidle_device);

2688

2694

2689

if (ret)

2695

if (ret)

2690

pr_warning("AM33XX cpuidle registration failed\n");

2696

pr_warning("AM33XX cpuidle registration failed\n");

2691

2697

2692

}

2698

}

2693

2699

2694

static void __init am335x_evm_init(void)

2700

static void __init am335x_evm_init(void)

2695

{

2701

{

2696

am33xx_cpuidle_init();

2702

am33xx_cpuidle_init();

2697

am33xx_mux_init(board_mux);

2703

am33xx_mux_init(board_mux);

2698

omap_serial_init();

2704

omap_serial_init();

2699

am335x_evm_i2c_init();

2705

am335x_evm_i2c_init();

2700

omap_sdrc_init(NULL, NULL);

2706

omap_sdrc_init(NULL, NULL);

2701

usb_musb_init(&musb_board_data);

2707

usb_musb_init(&musb_board_data);

2702

omap_board_config = am335x_evm_config;

2708

omap_board_config = am335x_evm_config;

2703

omap_board_config_size = ARRAY_SIZE(am335x_evm_config);

2709

omap_board_config_size = ARRAY_SIZE(am335x_evm_config);

2704

/* Create an alias for icss clock */

2710

/* Create an alias for icss clock */

2705

if (clk_add_alias("pruss", NULL, "pruss_uart_gclk", NULL))

2711

if (clk_add_alias("pruss", NULL, "pruss_uart_gclk", NULL))

2706

pr_warn("failed to create an alias: icss_uart_gclk --> pruss\n");

2712

pr_warn("failed to create an alias: icss_uart_gclk --> pruss\n");

2707

/* Create an alias for gfx/sgx clock */

2713

/* Create an alias for gfx/sgx clock */

2708

if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))

2714

if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))

2709

pr_warn("failed to create an alias: gfx_fclk --> sgx_ck\n");

2715

pr_warn("failed to create an alias: gfx_fclk --> sgx_ck\n");

2710

}

2716

}

2711

2717

2712

static void __init am335x_evm_map_io(void)

2718

static void __init am335x_evm_map_io(void)

2713

{

2719

{

2714

omap2_set_globals_am33xx();

2720

omap2_set_globals_am33xx();

2715

omapam33xx_map_common_io();

2721

omapam33xx_map_common_io();

2716

}

2722

}

2717

2723

2718

MACHINE_START(AM335XEVM, "am335xevm")

2724

MACHINE_START(AM335XEVM, "am335xevm")

2719

/* Maintainer: Texas Instruments */

2725

/* Maintainer: Texas Instruments */

2720

.atag_offset = 0x100,

2726

.atag_offset = 0x100,

2721

.map_io = am335x_evm_map_io,

2727

.map_io = am335x_evm_map_io,

2722

.init_early = am33xx_init_early,

2728

.init_early = am33xx_init_early,

2723

.init_irq = ti81xx_init_irq,

2729

.init_irq = ti81xx_init_irq,

2724

.handle_irq = omap3_intc_handle_irq,

2730

.handle_irq = omap3_intc_handle_irq,

2725

.timer = &omap3_am33xx_timer,

2731

.timer = &omap3_am33xx_timer,

2726

.init_machine = am335x_evm_init,

2732

.init_machine = am335x_evm_init,

2727

MACHINE_END

2733

MACHINE_END

2728

2734

2729

MACHINE_START(AM335XIAEVM, "am335xiaevm")

2735

MACHINE_START(AM335XIAEVM, "am335xiaevm")

2730

/* Maintainer: Texas Instruments */

2736

/* Maintainer: Texas Instruments */

2731

.atag_offset = 0x100,

2737

.atag_offset = 0x100,

2732

.map_io = am335x_evm_map_io,

2738

.map_io = am335x_evm_map_io,

2733

.init_irq = ti81xx_init_irq,

2739

.init_irq = ti81xx_init_irq,

2734

.init_early = am33xx_init_early,

2740

.init_early = am33xx_init_early,

2735

.timer = &omap3_am33xx_timer,

2741

.timer = &omap3_am33xx_timer,

2736

.init_machine = am335x_evm_init,

2742

.init_machine = am335x_evm_init,

2737

MACHINE_END

2743

MACHINE_END

2738

2744

GITLAB

Eric Lee / linux-smarc-t335x-v3.2

ARM: OMAP2+: AM335x: update OPP50 handling

 /*
  * Code for AM335X EVM.
  *
  * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
  * published by the Free Software Foundation version 2.
  *
  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  * kind, whether express or implied; without even the implied warranty
  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
 #include <linux/i2c/at24.h>
 #include <linux/phy.h>
 #include <linux/gpio.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/gpio_keys.h>
 #include <linux/input.h>
 #include <linux/input/matrix_keypad.h>
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/nand.h>
 #include <linux/mtd/partitions.h>
 #include <linux/platform_device.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/export.h>
 #include <linux/wl12xx.h>
 #include <linux/ethtool.h>
 #include <linux/mfd/tps65910.h>
 #include <linux/mfd/tps65217.h>
 #include <linux/pwm_backlight.h>
 #include <linux/input/ti_tsc.h>
 #include <linux/platform_data/ti_adc.h>
 #include <linux/mfd/ti_tscadc.h>
 #include <linux/reboot.h>
 #include <linux/pwm/pwm.h>
 #include <linux/rtc/rtc-omap.h>
 #include <linux/opp.h>
 /* LCD controller is similar to DA850 */
 #include <video/da8xx-fb.h>
 #include <mach/hardware.h>
 #include <mach/board-am335xevm.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/hardware/asp.h>
 #include <plat/omap_device.h>
 #include <plat/omap-pm.h>
 #include <plat/irqs.h>
 #include <plat/board.h>
 #include <plat/common.h>
 #include <plat/lcdc.h>
 #include <plat/usb.h>
 #include <plat/mmc.h>
 #include <plat/emif.h>
 #include <plat/nand.h>
 #include "board-flash.h"
 #include "cpuidle33xx.h"
 #include "mux.h"
 #include "devices.h"
 #include "hsmmc.h"
 /* Convert GPIO signal to GPIO pin number */
 #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
 /* BBB PHY IDs */
 #define BBB_PHY_ID		0x7c0f1
 #define BBB_PHY_MASK		0xfffffffe
 /* AM335X EVM Phy ID and Debug Registers */
 #define AM335X_EVM_PHY_ID		0x4dd074
 #define AM335X_EVM_PHY_MASK		0xfffffffe
 #define AR8051_PHY_DEBUG_ADDR_REG	0x1d
 #define AR8051_PHY_DEBUG_DATA_REG	0x1e
 #define AR8051_DEBUG_RGMII_CLK_DLY_REG	0x5
 #define AR8051_RGMII_TX_CLK_DLY		BIT(8)
 static const struct display_panel disp_panel = {
 	WVGA,
 	32,
 	32,
 	COLOR_ACTIVE,
 };
 /* LCD backlight platform Data */
 #define AM335X_BACKLIGHT_MAX_BRIGHTNESS        100
 #define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS    100
 #define AM335X_PWM_PERIOD_NANO_SECONDS        (5000 * 10)
 static struct platform_pwm_backlight_data am335x_backlight_data0 = {
 	.pwm_id         = "ecap.0",
 	.ch             = -1,
 	.lth_brightness	= 21,
 	.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
 	.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
 	.pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
 };
 static struct platform_pwm_backlight_data am335x_backlight_data2 = {
 	.pwm_id         = "ecap.2",
 	.ch             = -1,
 	.lth_brightness	= 21,
 	.max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
 	.dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
 	.pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
 };
 static struct lcd_ctrl_config lcd_cfg = {
 	&disp_panel,
 	.ac_bias		= 255,
 	.ac_bias_intrpt		= 0,
 	.dma_burst_sz		= 16,
 	.bpp			= 32,
 	.fdd			= 0x80,
 	.tft_alt_mode		= 0,
 	.stn_565_mode		= 0,
 	.mono_8bit_mode		= 0,
 	.invert_line_clock	= 1,
 	.invert_frm_clock	= 1,
 	.sync_edge		= 0,
 	.sync_ctrl		= 1,
 	.raster_order		= 0,
 };
 struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
 	.manu_name		= "ThreeFive",
 	.controller_data	= &lcd_cfg,
 	.type			= "TFC_S9700RTWV35TR_01B",
 };
 struct da8xx_lcdc_platform_data  NHD_480272MF_ATXI_pdata = {
 	.manu_name              = "NHD",
 	.controller_data        = &lcd_cfg,
 	.type                   = "NHD-4.3-ATXI#-T-1",
 };
 #include "common.h"
 #include <linux/lis3lv02d.h>
 /* TSc controller */
 static struct tsc_data am335x_touchscreen_data  = {
 	.wires  = 4,
 	.x_plate_resistance = 200,
 	.steps_to_configure = 5,
 };
 static struct adc_data am335x_adc_data = {
 	.adc_channels = 4,
 };
 static struct mfd_tscadc_board tscadc = {
 	.tsc_init = &am335x_touchscreen_data,
 	.adc_init = &am335x_adc_data,
 };
 static u8 am335x_iis_serializer_direction1[] = {
 	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,	RX_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 };
 static struct snd_platform_data am335x_evm_snd_data1 = {
 	.tx_dma_offset	= 0x46400000,	/* McASP1 */
 	.rx_dma_offset	= 0x46400000,
 	.op_mode	= DAVINCI_MCASP_IIS_MODE,
 	.num_serializer	= ARRAY_SIZE(am335x_iis_serializer_direction1),
 	.tdm_slots	= 2,
 	.serial_dir	= am335x_iis_serializer_direction1,
 	.asp_chan_q	= EVENTQ_2,
 	.version	= MCASP_VERSION_3,
 	.txnumevt	= 32,
 	.rxnumevt	= 32,
 	.get_context_loss_count	=
 			omap_pm_get_dev_context_loss_count,
 };
 static u8 am335x_evm_sk_iis_serializer_direction1[] = {
 	INACTIVE_MODE,	INACTIVE_MODE,	TX_MODE,	INACTIVE_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,	INACTIVE_MODE,
 };
 static struct snd_platform_data am335x_evm_sk_snd_data1 = {
 	.tx_dma_offset	= 0x46400000,	/* McASP1 */
 	/*.rx_dma_offset	= 0x46400000,*/
 	.op_mode	= DAVINCI_MCASP_IIS_MODE,
 	.num_serializer	= ARRAY_SIZE(am335x_evm_sk_iis_serializer_direction1),
 	.tdm_slots	= 2,
 	.serial_dir	= am335x_evm_sk_iis_serializer_direction1,
 	.asp_chan_q	= EVENTQ_2,
 	.version	= MCASP_VERSION_3,
 	.txnumevt	= 32,
 	.get_context_loss_count	=
 			omap_pm_get_dev_context_loss_count,
 };
 static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
 	{
 		.mmc            = 1,
 		.caps           = MMC_CAP_4_BIT_DATA,
 		.gpio_cd        = GPIO_TO_PIN(0, 6),
 		.gpio_wp        = GPIO_TO_PIN(3, 18),
 		.ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
 	},
 	{
 		.mmc            = 0,	/* will be set at runtime */
 	},
 	{
 		.mmc            = 0,	/* will be set at runtime */
 	},
 	{}      /* Terminator */
 };
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
 	/*
 	 * Setting SYSBOOT[5] should set xdma_event_intr0 pin to mode 3 thereby
 	 * allowing clkout1 to be available on xdma_event_intr0.
 	 * However, on some boards (like EVM-SK), SYSBOOT[5] isn't properly
 	 * latched.
 	 * To be extra cautious, setup the pin-mux manually.
 	 * If any modules/usecase requries it in different mode, then subsequent
 	 * module init call will change the mux accordingly.
 	 */
 	AM33XX_MUX(XDMA_EVENT_INTR0, OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT),
 	AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
 			AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
 	AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
 			AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #else
 #define	board_mux	NULL
 #endif
 /* module pin mux structure */
 struct pinmux_config {
 	const char *string_name; /* signal name format */
 	int val; /* Options for the mux register value */
 };
 struct evm_dev_cfg {
 	void (*device_init)(int evm_id, int profile);
 /*
 * If the device is required on both baseboard & daughter board (ex i2c),
 * specify DEV_ON_BASEBOARD
 */
 #define DEV_ON_BASEBOARD	0
 #define DEV_ON_DGHTR_BRD	1
 	u32 device_on;
 	u32 profile;	/* Profiles (0-7) in which the module is present */
 };
 /* AM335X - CPLD Register Offsets */
 #define	CPLD_DEVICE_HDR	0x00 /* CPLD Header */
 #define	CPLD_DEVICE_ID	0x04 /* CPLD identification */
 #define	CPLD_DEVICE_REV	0x0C /* Revision of the CPLD code */
 #define	CPLD_CFG_REG	0x10 /* Configuration Register */
 static struct i2c_client *cpld_client;
 static u32 am335x_evm_id;
 static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
 };
 /*
 * EVM Config held in On-Board eeprom device.
 *
 * Header Format
 *
 *  Name			Size	Contents
 *			(Bytes)
 *-------------------------------------------------------------
 *  Header		4	0xAA, 0x55, 0x33, 0xEE
 *
 *  Board Name		8	Name for board in ASCII.
 *				Example "A33515BB" = "AM335x 15x15 Base Board"
 *
 *  Version		4	Hardware version code for board	in ASCII.
 *				"1.0A" = rev.01.0A
 *
 *  Serial Number	12	Serial number of the board. This is a 12
 *				character string which is WWYY4P16nnnn, where
 *				WW = 2 digit week of the year of production
 *				YY = 2 digit year of production
 *				nnnn = incrementing board number
 *
 *  Configuration option	32	Codes(TBD) to show the configuration
 *				setup on this board.
 *
 *  Available		32720	Available space for other non-volatile data.
 */
 struct am335x_evm_eeprom_config {
 	u32	header;
 	u8	name[8];
 	char	version[4];
 	u8	serial[12];
 	u8	opt[32];
 };
 /*
 * EVM Config held in daughter board eeprom device.
 *
 * Header Format
 *
 *  Name			Size		Contents
 *			(Bytes)
 *-------------------------------------------------------------
 *  Header		4	0xAA, 0x55, 0x33, 0xEE
 *
 *  Board Name		8	Name for board in ASCII.
 *				example "A335GPBD" = "AM335x
 *				General Purpose Daughterboard"
 *
 *  Version		4	Hardware version code for board in
 *				in ASCII. "1.0A" = rev.01.0A
 *  Serial Number	12	Serial number of the board. This is a 12
 *				character string which is: WWYY4P13nnnn, where
 *				WW = 2 digit week of the year of production
 *				YY = 2 digit year of production
 *				nnnn = incrementing board number
 *  Configuration Option	32	Codes to show the configuration
 *				setup on this board.
 *  CPLD Version	8		CPLD code version for board in ASCII
 *				"CPLD1.0A" = rev. 01.0A of the CPLD
 *  Available	32700		Available space for other non-volatile
 *				codes/data
 */
 struct am335x_eeprom_config1 {
 	u32	header;
 	u8	name[8];
 	char	version[4];
 	u8	serial[12];
 	u8	opt[32];
 	u8	cpld_ver[8];
 };
 static struct am335x_evm_eeprom_config config;
 static struct am335x_eeprom_config1 config1;
 static bool daughter_brd_detected;
 #define EEPROM_MAC_ADDRESS_OFFSET	60 /* 4+8+4+12+32 */
 #define EEPROM_NO_OF_MAC_ADDR		3
 static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];
 #define AM335X_EEPROM_HEADER		0xEE3355AA
 static int am33xx_evmid = -EINVAL;
 /*
 * am335x_evm_set_id - set up board evmid
 * @evmid - evm id which needs to be configured
 *
 * This function is called to configure board evm id.
 */
 void am335x_evm_set_id(unsigned int evmid)
 {
 	am33xx_evmid = evmid;
 	return;
 }
 /*
 * am335x_evm_get_id - returns Board Type (EVM/BB/EVM-SK ...)
 *
 * Note:
 *	returns -EINVAL if Board detection hasn't happened yet.
 */
 int am335x_evm_get_id(void)
 {
 	return am33xx_evmid;
 }
 EXPORT_SYMBOL(am335x_evm_get_id);
 /* current profile if exists else PROFILE_0 on error */
 static u32 am335x_get_profile_selection(void)
 {
 	int val = 0;
 	if (!cpld_client)
 		/* error checking is not done in func's calling this routine.
 		so return profile 0 on error */
 		return 0;
 	val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
 	if (val < 0)
 		return 0;	/* default to Profile 0 on Error */
 	else
 		return val & 0x7;
 }
 static struct pinmux_config haptics_pin_mux[] = {
 	{"gpmc_ad9.ehrpwm2B",		OMAP_MUX_MODE4 |
 		AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* Module pin mux for LCDC */
 static struct pinmux_config lcdc_pin_mux[] = {
 	{"lcd_data0.lcd_data0",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data1.lcd_data1",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data2.lcd_data2",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data3.lcd_data3",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data4.lcd_data4",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data5.lcd_data5",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data6.lcd_data6",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data7.lcd_data7",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data8.lcd_data8",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data9.lcd_data9",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data10.lcd_data10",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data11.lcd_data11",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data12.lcd_data12",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data13.lcd_data13",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data14.lcd_data14",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"lcd_data15.lcd_data15",	OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
 						       | AM33XX_PULL_DISA},
 	{"gpmc_ad8.lcd_data16",		OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad9.lcd_data17",		OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad10.lcd_data18",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad11.lcd_data19",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad12.lcd_data20",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad13.lcd_data21",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad14.lcd_data22",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"gpmc_ad15.lcd_data23",	OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"lcd_vsync.lcd_vsync",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"lcd_hsync.lcd_hsync",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"lcd_pclk.lcd_pclk",		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* Pin mux for nand flash module */
 static struct pinmux_config nand_pin_mux[] = {
 	{"gpmc_ad0.gpmc_ad0",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad1.gpmc_ad1",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad2.gpmc_ad2",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad3.gpmc_ad3",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad4.gpmc_ad4",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad5.gpmc_ad5",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad6.gpmc_ad6",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad7.gpmc_ad7",	  OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_wpn.gpmc_wpn",	  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_csn0.gpmc_csn0",	  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
 	{"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
 	{"gpmc_oen_ren.gpmc_oen_ren",	 OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
 	{"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
 	{"gpmc_ben0_cle.gpmc_ben0_cle",	 OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
 	{NULL, 0},
 };
 /* Module pin mux for SPI fash */
 static struct pinmux_config spi0_pin_mux[] = {
 	{"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
 							| AM33XX_INPUT_EN},
 	{"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
 							| AM33XX_INPUT_EN},
 	{"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
 							| AM33XX_INPUT_EN},
 	{"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
 							| AM33XX_INPUT_EN},
 	{NULL, 0},
 };
 /* Module pin mux for SPI flash */
 static struct pinmux_config spi1_pin_mux[] = {
 	{"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
 		| AM33XX_INPUT_EN},
 	{"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
 		| AM33XX_PULL_UP | AM33XX_INPUT_EN},
 	{"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
 		| AM33XX_INPUT_EN},
 	{"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
 		| AM33XX_PULL_UP | AM33XX_INPUT_EN},
 	{NULL, 0},
 };
 /* Module pin mux for rgmii1 */
 static struct pinmux_config rgmii1_pin_mux[] = {
 	{"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for rgmii2 */
 static struct pinmux_config rgmii2_pin_mux[] = {
 	{"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for mii1 */
 static struct pinmux_config mii1_pin_mux[] = {
 	{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for rmii1 */
 static struct pinmux_config rmii1_pin_mux[] = {
 	{"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
 	{"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config i2c1_pin_mux[] = {
 	{"spi0_d1.i2c1_sda",    OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
 					AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
 	{"spi0_cs0.i2c1_scl",   OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
 					AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
 	{NULL, 0},
 };
 static struct pinmux_config i2c2_pin_mux[] = {
 	{"uart1_ctsn.i2c2_sda",    OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |
 					AM33XX_PULL_UP | AM33XX_INPUT_EN},
 	{"uart1_rtsn.i2c2_scl",   OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |
 					AM33XX_PULL_UP | AM33XX_INPUT_EN},
 	{NULL, 0},
 };
 /* Module pin mux for mcasp1 */
 static struct pinmux_config mcasp1_pin_mux[] = {
 	{"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
 	{"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 |
 						AM33XX_PIN_INPUT_PULLDOWN},
 	{NULL, 0},
 };
 /* Module pin mux for mmc0 */
 static struct pinmux_config mmc0_common_pin_mux[] = {
 	{"mmc0_dat3.mmc0_dat3",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_dat2.mmc0_dat2",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_dat1.mmc0_dat1",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_dat0.mmc0_dat0",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_clk.mmc0_clk",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"mmc0_cmd.mmc0_cmd",	OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config mmc0_wp_only_pin_mux[] = {
 	{"mcasp0_aclkr.gpio3_18", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config mmc0_cd_only_pin_mux[] = {
 	{"spi0_cs1.gpio0_6",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for mmc1 */
 static struct pinmux_config mmc1_common_pin_mux[] = {
 	{"gpmc_ad3.mmc1_dat3",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad2.mmc1_dat2",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad1.mmc1_dat1",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad0.mmc1_dat0",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_csn1.mmc1_clk",	OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_csn2.mmc1_cmd",	OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config mmc1_dat4_7_pin_mux[] = {
 	{"gpmc_ad7.mmc1_dat7",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad6.mmc1_dat6",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad5.mmc1_dat5",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ad4.mmc1_dat4",	OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config mmc1_wp_only_pin_mux[] = {
 	{"gpmc_csn0.gpio1_29",	OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config mmc1_cd_only_pin_mux[] = {
 	{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for uart3 */
 static struct pinmux_config uart3_pin_mux[] = {
 	{"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},
 	{"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},
 	{NULL, 0},
 };
 static struct pinmux_config d_can_gp_pin_mux[] = {
 	{"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
 	{"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config d_can_ia_pin_mux[] = {
 	{"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
 	{"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 /* Module pin mux for uart2 */
 static struct pinmux_config uart2_pin_mux[] = {
 	{"spi0_sclk.uart2_rxd", OMAP_MUX_MODE1 | AM33XX_SLEWCTRL_SLOW |
 						AM33XX_PIN_INPUT_PULLUP},
 	{"spi0_d0.uart2_txd", OMAP_MUX_MODE1 | AM33XX_PULL_UP |
 						AM33XX_PULL_DISA |
 						AM33XX_SLEWCTRL_SLOW},
 	{NULL, 0},
 };
 /* pinmux for gpio based key */
 static struct pinmux_config gpio_keys_pin_mux[] = {
 	{"gpmc_wait0.gpio0_30", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_oen_ren.gpio2_3", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_advn_ale.gpio2_2", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_ben0_cle.gpio2_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{NULL, 0},
 };
 /* pinmux for led device */
 static struct pinmux_config gpio_led_mux[] = {
 	{"gpmc_ad4.gpio1_4", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_ad5.gpio1_5", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_ad6.gpio1_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_ad7.gpio1_7", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{NULL, 0},
 };
 static struct pinmux_config gpio_ddr_vtt_enb_pin_mux[] = {
 	{"ecap0_in_pwm0_out.gpio0_7", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /*
 * @pin_mux - single module pin-mux structure which defines pin-mux
 *			details for all its pins.
 */
 static void setup_pin_mux(struct pinmux_config *pin_mux)
 {
 	int i;
 	for (i = 0; pin_mux->string_name != NULL; pin_mux++)
 		omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
 }
 /* Matrix GPIO Keypad Support for profile-0 only: TODO */
 /* pinmux for keypad device */
 static struct pinmux_config matrix_keypad_pin_mux[] = {
 	{"gpmc_a5.gpio1_21",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a6.gpio1_22",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{"gpmc_a9.gpio1_25",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{NULL, 0},
 };
 /* Keys mapping */
 static const uint32_t am335x_evm_matrix_keys[] = {
 	KEY(0, 0, KEY_MENU),
 	KEY(1, 0, KEY_BACK),
 	KEY(2, 0, KEY_LEFT),
 	KEY(0, 1, KEY_RIGHT),
 	KEY(1, 1, KEY_ENTER),
 	KEY(2, 1, KEY_DOWN),
 };
 const struct matrix_keymap_data am335x_evm_keymap_data = {
 	.keymap      = am335x_evm_matrix_keys,
 	.keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),
 };
 static const unsigned int am335x_evm_keypad_row_gpios[] = {
 	GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)
 };
 static const unsigned int am335x_evm_keypad_col_gpios[] = {
 	GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)
 };
 static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {
 	.keymap_data       = &am335x_evm_keymap_data,
 	.row_gpios         = am335x_evm_keypad_row_gpios,
 	.num_row_gpios     = ARRAY_SIZE(am335x_evm_keypad_row_gpios),
 	.col_gpios         = am335x_evm_keypad_col_gpios,
 	.num_col_gpios     = ARRAY_SIZE(am335x_evm_keypad_col_gpios),
 	.active_low        = false,
 	.debounce_ms       = 5,
 	.col_scan_delay_us = 2,
 };
 static struct platform_device am335x_evm_keyboard = {
 	.name  = "matrix-keypad",
 	.id    = -1,
 	.dev   = {
 		.platform_data = &am335x_evm_keypad_platform_data,
 	},
 };
 static void matrix_keypad_init(int evm_id, int profile)
 {
 	int err;
 	setup_pin_mux(matrix_keypad_pin_mux);
 	err = platform_device_register(&am335x_evm_keyboard);
 	if (err) {
 		pr_err("failed to register matrix keypad (2x3) device\n");
 	}
 }
 /* pinmux for keypad device */
 static struct pinmux_config volume_keys_pin_mux[] = {
 	{"spi0_sclk.gpio0_2",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"spi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{NULL, 0},
 };
 /* Configure GPIOs for Volume Keys */
 static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {
 	{
 		.code                   = KEY_VOLUMEUP,
 		.gpio                   = GPIO_TO_PIN(0, 2),
 		.active_low             = true,
 		.desc                   = "volume-up",
 		.type                   = EV_KEY,
 		.wakeup                 = 1,
 	},
 	{
 		.code                   = KEY_VOLUMEDOWN,
 		.gpio                   = GPIO_TO_PIN(0, 3),
 		.active_low             = true,
 		.desc                   = "volume-down",
 		.type                   = EV_KEY,
 		.wakeup                 = 1,
 	},
 };
 static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {
 	.buttons        = am335x_evm_volume_gpio_buttons,
 	.nbuttons       = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),
 };
 static struct platform_device am335x_evm_volume_keys = {
 	.name   = "gpio-keys",
 	.id     = -1,
 	.dev    = {
 		.platform_data  = &am335x_evm_volume_gpio_key_info,
 	},
 };
 static void volume_keys_init(int evm_id, int profile)
 {
 	int err;
 	setup_pin_mux(volume_keys_pin_mux);
 	err = platform_device_register(&am335x_evm_volume_keys);
 	if (err)
 		pr_err("failed to register matrix keypad (2x3) device\n");
 }
 /*
 * @evm_id - evm id which needs to be configured
 * @dev_cfg - single evm structure which includes
 *				all module inits, pin-mux defines
 * @profile - if present, else PROFILE_NONE
 * @dghtr_brd_flg - Whether Daughter board is present or not
 */
 static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
 	int profile)
 {
 	int i;
 	am335x_evm_set_id(evm_id);
 	/*
 	* Only General Purpose & Industrial Auto Motro Control
 	* EVM has profiles. So check if this evm has profile.
 	* If not, ignore the profile comparison
 	*/
 	/*
 	* If the device is on baseboard, directly configure it. Else (device on
 	* Daughter board), check if the daughter card is detected.
 	*/
 	if (profile == PROFILE_NONE) {
 		for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
 			if (dev_cfg->device_on == DEV_ON_BASEBOARD)
 				dev_cfg->device_init(evm_id, profile);
 			else if (daughter_brd_detected == true)
 				dev_cfg->device_init(evm_id, profile);
 		}
 	} else {
 		for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
 			if (dev_cfg->profile & profile) {
 				if (dev_cfg->device_on == DEV_ON_BASEBOARD)
 					dev_cfg->device_init(evm_id, profile);
 				else if (daughter_brd_detected == true)
 					dev_cfg->device_init(evm_id, profile);
 			}
 		}
 	}
 }
 /* pinmux for usb0 drvvbus */
 static struct pinmux_config usb0_pin_mux[] = {
 	{"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* pinmux for usb1 drvvbus */
 static struct pinmux_config usb1_pin_mux[] = {
 	{"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* pinmux for profibus */
 static struct pinmux_config profibus_pin_mux[] = {
 	{"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},
 	{"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
 	{"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* Module pin mux for eCAP0 */
 static struct pinmux_config ecap0_pin_mux[] = {
 	{"ecap0_in_pwm0_out.ecap0_in_pwm0_out",
 		OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 /* Module pin mux for eCAP */
 static struct pinmux_config ecap2_pin_mux[] = {
 	{"mcasp0_ahclkr.ecap2_in_pwm2_out", AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 #define AM335XEVM_WLAN_PMENA_GPIO	GPIO_TO_PIN(1, 30)
 #define AM335XEVM_WLAN_IRQ_GPIO		GPIO_TO_PIN(3, 17)
 #define AM335XEVM_SK_WLAN_IRQ_GPIO      GPIO_TO_PIN(1, 29)
 struct wl12xx_platform_data am335xevm_wlan_data = {
 	.irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
 	.board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
 	.bt_enable_gpio = GPIO_TO_PIN(3, 21),
 	.wlan_enable_gpio = GPIO_TO_PIN(1, 16),
 };
 /* Module pin mux for wlan and bluetooth */
 static struct pinmux_config mmc2_wl12xx_pin_mux[] = {
 	{"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
 	{NULL, 0},
 };
 static struct pinmux_config uart1_wl12xx_pin_mux[] = {
 	{"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
 	{"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
 	{"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
 	{"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
 	{NULL, 0},
 };
 static struct pinmux_config wl12xx_pin_mux[] = {
 	{"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT_PULLUP},
 	{NULL, 0},
  };
 static struct pinmux_config wl12xx_pin_mux_sk[] = {
 	{"gpmc_wpn.gpio0_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{"gpmc_csn0.gpio1_29", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
 	{"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 static bool backlight_enable;
 static void enable_ecap0(int evm_id, int profile)
 {
 	backlight_enable = true;
 	setup_pin_mux(ecap0_pin_mux);
 }
 static void enable_ecap2(int evm_id, int profile)
 {
 	backlight_enable = true;
 	setup_pin_mux(ecap2_pin_mux);
 }
 /* Setup pwm-backlight */
 static struct platform_device am335x_backlight = {
 	.name           = "pwm-backlight",
 	.id             = -1,
 	.dev		= {
 		.platform_data = &am335x_backlight_data0,
 	},
 };
 static struct pwmss_platform_data  pwm_pdata[3] = {
 	{
 		.version = PWM_VERSION_1,
 	},
 	{
 		.version = PWM_VERSION_1,
 	},
 	{
 		.version = PWM_VERSION_1,
 	},
 };
 static int __init backlight_init(void)
 {
 	int status = 0;
 	if (backlight_enable) {
 		int ecap_index = 0;
 		switch (am335x_evm_get_id()) {
 		case GEN_PURP_EVM:
 		case GEN_PURP_DDR3_EVM:
 			ecap_index = 0;
 			break;
 		case EVM_SK:
 			/*
 			 * Invert polarity of PWM wave from ECAP to handle
 			 * backlight intensity to pwm brightness
 			 */
 			ecap_index = 2;
 			pwm_pdata[ecap_index].chan_attrib[0].inverse_pol = true;
 			am335x_backlight.dev.platform_data =
 				&am335x_backlight_data2;
 			break;
 		default:
 			pr_err("%s: Error on attempting to enable backlight,"
 				" not supported\n", __func__);
 			return -EINVAL;
 		}
 		am33xx_register_ecap(ecap_index, &pwm_pdata[ecap_index]);
 		platform_device_register(&am335x_backlight);
 	}
 	return status;
 }
 late_initcall(backlight_init);
 static int __init conf_disp_pll(int rate)
 {
 	struct clk *disp_pll;
 	int ret = -EINVAL;
 	disp_pll = clk_get(NULL, "dpll_disp_ck");
 	if (IS_ERR(disp_pll)) {
 		pr_err("Cannot clk_get disp_pll\n");
 		goto out;
 	}
 	ret = clk_set_rate(disp_pll, rate);
 	clk_put(disp_pll);
 out:
 	return ret;
 }
 static void lcdc_init(int evm_id, int profile)
 {
 	struct da8xx_lcdc_platform_data *lcdc_pdata;
 	setup_pin_mux(lcdc_pin_mux);
 	if (conf_disp_pll(300000000)) {
 		pr_info("Failed configure display PLL, not attempting to"
 				"register LCDC\n");
 		return;
 	}
 	switch (evm_id) {
 	case GEN_PURP_EVM:
 	case GEN_PURP_DDR3_EVM:
 		lcdc_pdata = &TFC_S9700RTWV35TR_01B_pdata;
 		break;
 	case EVM_SK:
 		lcdc_pdata = &NHD_480272MF_ATXI_pdata;
 		break;
 	default:
 		pr_err("LCDC not supported on this evm (%d)\n",evm_id);
 		return;
 	}
 	lcdc_pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
 	if (am33xx_register_lcdc(lcdc_pdata))
 		pr_info("Failed to register LCDC device\n");
 	return;
 }
 static void mfd_tscadc_init(int evm_id, int profile)
 {
 	int err;
 	err = am33xx_register_mfd_tscadc(&tscadc);
 	if (err)
 		pr_err("failed to register touchscreen device\n");
 }
 static void rgmii1_init(int evm_id, int profile)
 {
 	setup_pin_mux(rgmii1_pin_mux);
 	return;
 }
 static void rgmii2_init(int evm_id, int profile)
 {
 	setup_pin_mux(rgmii2_pin_mux);
 	return;
 }
 static void mii1_init(int evm_id, int profile)
 {
 	setup_pin_mux(mii1_pin_mux);
 	return;
 }
 static void rmii1_init(int evm_id, int profile)
 {
 	setup_pin_mux(rmii1_pin_mux);
 	return;
 }
 static void usb0_init(int evm_id, int profile)
 {
 	setup_pin_mux(usb0_pin_mux);
 	return;
 }
 static void usb1_init(int evm_id, int profile)
 {
 	setup_pin_mux(usb1_pin_mux);
 	return;
 }
 /* setup uart3 */
 static void uart3_init(int evm_id, int profile)
 {
 	setup_pin_mux(uart3_pin_mux);
 	return;
 }
 /* setup uart2 */
 static void uart2_init(int evm_id, int profile)
 {
 	setup_pin_mux(uart2_pin_mux);
 	return;
 }
 /*
  * gpio0_7 was driven HIGH in u-boot before DDR configuration
  *
  * setup gpio0_7 for EVM-SK 1.2
  */
 static void gpio_ddr_vtt_enb_init(int evm_id, int profile)
 {
 	setup_pin_mux(gpio_ddr_vtt_enb_pin_mux);
 	return;
 }
 /* setup haptics */
 #define HAPTICS_MAX_FREQ 250
 static void haptics_init(int evm_id, int profile)
 {
 	setup_pin_mux(haptics_pin_mux);
 	pwm_pdata[2].chan_attrib[1].max_freq = HAPTICS_MAX_FREQ;
 	am33xx_register_ehrpwm(2, &pwm_pdata[2]);
 }
 /* NAND partition information */
 static struct mtd_partition am335x_nand_partitions[] = {
 /* All the partition sizes are listed in terms of NAND block size */
 	{
 		.name           = "SPL",
 		.offset         = 0,			/* Offset = 0x0 */
 		.size           = SZ_128K,
 	},
 	{
 		.name           = "SPL.backup1",
 		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x20000 */
 		.size           = SZ_128K,
 	},
 	{
 		.name           = "SPL.backup2",
 		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x40000 */
 		.size           = SZ_128K,
 	},
 	{
 		.name           = "SPL.backup3",
 		.offset         = MTDPART_OFS_APPEND,	/* Offset = 0x60000 */
 		.size           = SZ_128K,
 	},
 	{
 		.name           = "U-Boot",
 		.offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
 		.size           = 15 * SZ_128K,
 	},
 	{
 		.name           = "U-Boot Env",
 		.offset         = MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
 		.size           = 1 * SZ_128K,
 	},
 	{
 		.name           = "Kernel",
 		.offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
 		.size           = 40 * SZ_128K,
 	},
 	{
 		.name           = "File System",
 		.offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
 		.size           = MTDPART_SIZ_FULL,
 	},
 };
 /* SPI 0/1 Platform Data */
 /* SPI flash information */
 static struct mtd_partition am335x_spi_partitions[] = {
 	/* All the partition sizes are listed in terms of erase size */
 	{
 		.name       = "SPL",
 		.offset     = 0,			/* Offset = 0x0 */
 		.size       = SZ_128K,
 	},
 	{
 		.name       = "U-Boot",
 		.offset     = MTDPART_OFS_APPEND,	/* Offset = 0x20000 */
 		.size       = 2 * SZ_128K,
 	},
 	{
 		.name       = "U-Boot Env",
 		.offset     = MTDPART_OFS_APPEND,	/* Offset = 0x60000 */
 		.size       = 2 * SZ_4K,
 	},
 	{
 		.name       = "Kernel",
 		.offset     = MTDPART_OFS_APPEND,	/* Offset = 0x62000 */
 		.size       = 28 * SZ_128K,
 	},
 	{
 		.name       = "File System",
 		.offset     = MTDPART_OFS_APPEND,	/* Offset = 0x3E2000 */
 		.size       = MTDPART_SIZ_FULL,		/* size ~= 4.1 MiB */
 	}
 };
 static const struct flash_platform_data am335x_spi_flash = {
 	.type      = "w25q64",
 	.name      = "spi_flash",
 	.parts     = am335x_spi_partitions,
 	.nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
 };
 /*
  * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
  * So setup Max speed to be less than that of Controller speed
  */
 static struct spi_board_info am335x_spi0_slave_info[] = {
 	{
 		.modalias      = "m25p80",
 		.platform_data = &am335x_spi_flash,
 		.irq           = -1,
 		.max_speed_hz  = 24000000,
 		.bus_num       = 1,
 		.chip_select   = 0,
 	},
 };
 static struct spi_board_info am335x_spi1_slave_info[] = {
 	{
 		.modalias      = "m25p80",
 		.platform_data = &am335x_spi_flash,
 		.irq           = -1,
 		.max_speed_hz  = 12000000,
 		.bus_num       = 2,
 		.chip_select   = 0,
 	},
 };
 static struct gpmc_timings am335x_nand_timings = {
 	.sync_clk = 0,
 	.cs_on = 0,
 	.cs_rd_off = 44,
 	.cs_wr_off = 44,
 	.adv_on = 6,
 	.adv_rd_off = 34,
 	.adv_wr_off = 44,
 	.we_off = 40,
 	.oe_off = 54,
 	.access = 64,
 	.rd_cycle = 82,
 	.wr_cycle = 82,
 	.wr_access = 40,
 	.wr_data_mux_bus = 0,
 };
 static void evm_nand_init(int evm_id, int profile)
 {
 	struct omap_nand_platform_data *pdata;
 	struct gpmc_devices_info gpmc_device[2] = {
 		{ NULL, 0 },
 		{ NULL, 0 },
 	};
 	setup_pin_mux(nand_pin_mux);
 	pdata = omap_nand_init(am335x_nand_partitions,
 		ARRAY_SIZE(am335x_nand_partitions), 0, 0,
 		&am335x_nand_timings);
 	if (!pdata)
 		return;
 	pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW;
 	pdata->elm_used = true;
 	gpmc_device[0].pdata = pdata;
 	gpmc_device[0].flag = GPMC_DEVICE_NAND;
 	omap_init_gpmc(gpmc_device, sizeof(gpmc_device));
 	omap_init_elm();
 }
 /* TPS65217 voltage regulator support */
 /* 1.8V */
 static struct regulator_consumer_supply tps65217_dcdc1_consumers[] = {
 	{
 		.supply = "vdds_osc",
 	},
 	{
 		.supply = "vdds_pll_ddr",
 	},
 	{
 		.supply = "vdds_pll_mpu",
 	},
 	{
 		.supply = "vdds_pll_core_lcd",
 	},
 	{
 		.supply = "vdds_sram_mpu_bb",
 	},
 	{
 		.supply = "vdds_sram_core_bg",
 	},
 	{
 		.supply = "vdda_usb0_1p8v",
 	},
 	{
 		.supply = "vdds_ddr",
 	},
 	{
 		.supply = "vdds",
 	},
 	{
 		.supply = "vdds_hvx_1p8v",
 	},
 	{
 		.supply = "vdda_adc",
 	},
 	{
 		.supply = "ddr2",
 	},
 };
 /* 1.1V */
 static struct regulator_consumer_supply tps65217_dcdc2_consumers[] = {
 	{
 		.supply = "vdd_mpu",
 	},
 };
 /* 1.1V */
 static struct regulator_consumer_supply tps65217_dcdc3_consumers[] = {
 	{
 		.supply = "vdd_core",
 	},
 };
 /* 1.8V LDO */
 static struct regulator_consumer_supply tps65217_ldo1_consumers[] = {
 	{
 		.supply = "vdds_rtc",
 	},
 };
 /* 3.3V LDO */
 static struct regulator_consumer_supply tps65217_ldo2_consumers[] = {
 	{
 		.supply = "vdds_any_pn",
 	},
 };
 /* 3.3V LDO */
 static struct regulator_consumer_supply tps65217_ldo3_consumers[] = {
 	{
 		.supply = "vdds_hvx_ldo3_3p3v",
 	},
 	{
 		.supply = "vdda_usb0_3p3v",
 	},
 };
 /* 3.3V LDO */
 static struct regulator_consumer_supply tps65217_ldo4_consumers[] = {
 	{
 		.supply = "vdds_hvx_ldo4_3p3v",
 	},
 };
 /*
  * FIXME: Some BeagleBones reuire a ramp_delay to settle down the set
  * voltage from 0.95v to 1.25v. By default a minimum of 70msec is set
  * based on experimentation. This will be removed/modified to exact
  * value, once the root cause is known.
  *
  * The reason for extended ramp time requirement on BeagleBone is not
  * known and the delay varies from board - board, if the board hangs
  * with this 70msec delay then try to increase the value.
  */
 static struct tps65217_rdelay dcdc2_ramp_delay = {
 	.ramp_delay = 70000,
 };
 static struct regulator_init_data tps65217_regulator_data[] = {
 	/* dcdc1 */
 	{
 		.constraints = {
 			.min_uV = 900000,
 			.max_uV = 1800000,
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc1_consumers),
 		.consumer_supplies = tps65217_dcdc1_consumers,
 	},
 	/* dcdc2 */
 	{
 		.constraints = {
 			.min_uV = 900000,
 			.max_uV = 3300000,
 			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
 				REGULATOR_CHANGE_STATUS),
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc2_consumers),
 		.consumer_supplies = tps65217_dcdc2_consumers,
 		.driver_data = &dcdc2_ramp_delay,
 	},
 	/* dcdc3 */
 	{
 		.constraints = {
 			.min_uV = 900000,
 			.max_uV = 1500000,
 			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
 				REGULATOR_CHANGE_STATUS),
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc3_consumers),
 		.consumer_supplies = tps65217_dcdc3_consumers,
 	},
 	/* ldo1 */
 	{
 		.constraints = {
 			.min_uV = 1000000,
 			.max_uV = 3300000,
 			.valid_ops_mask = REGULATOR_CHANGE_STATUS,
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo1_consumers),
 		.consumer_supplies = tps65217_ldo1_consumers,
 	},
 	/* ldo2 */
 	{
 		.constraints = {
 			.min_uV = 900000,
 			.max_uV = 3300000,
 			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
 				REGULATOR_CHANGE_STATUS),
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo2_consumers),
 		.consumer_supplies = tps65217_ldo2_consumers,
 	},
 	/* ldo3 */
 	{
 		.constraints = {
 			.min_uV = 1800000,
 			.max_uV = 3300000,
 			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
 				REGULATOR_CHANGE_STATUS),
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo3_consumers),
 		.consumer_supplies = tps65217_ldo3_consumers,
 	},
 	/* ldo4 */
 	{
 		.constraints = {
 			.min_uV = 1800000,
 			.max_uV = 3300000,
 			.valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
 				REGULATOR_CHANGE_STATUS),
 			.boot_on = 1,
 			.always_on = 1,
 		},
 		.num_consumer_supplies = ARRAY_SIZE(tps65217_ldo4_consumers),
 		.consumer_supplies = tps65217_ldo4_consumers,
 	},
 };
 static struct tps65217_board beaglebone_tps65217_info = {
 	.tps65217_init_data = &tps65217_regulator_data[0],
 	.status_off = true,
 };
 static struct lis3lv02d_platform_data lis331dlh_pdata = {
 	.click_flags = LIS3_CLICK_SINGLE_X |
 			LIS3_CLICK_SINGLE_Y |
 			LIS3_CLICK_SINGLE_Z,
 	.wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
 			LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
 			LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
 	.irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
 	.wakeup_thresh	= 10,
 	.click_thresh_x = 10,
 	.click_thresh_y = 10,
 	.click_thresh_z = 10,
 	.g_range	= 2,
 	.st_min_limits[0] = 120,
 	.st_min_limits[1] = 120,
 	.st_min_limits[2] = 140,
 	.st_max_limits[0] = 550,
 	.st_max_limits[1] = 550,
 	.st_max_limits[2] = 750,
 };
 static struct i2c_board_info lis331dlh_i2c_boardinfo[] = {
 	{
 		I2C_BOARD_INFO("lis331dlh", 0x18),
 		.platform_data = &lis331dlh_pdata,
 	},
 };
 static void lis331dlh_init(int evm_id, int profile)
 {
 	struct i2c_adapter *adapter;
 	struct i2c_client *client;
 	unsigned int i2c_instance;
 	switch (evm_id) {
 	case GEN_PURP_EVM:
 	case GEN_PURP_DDR3_EVM:
 		i2c_instance = 2;
 		break;
 	case EVM_SK:
 		i2c_instance = 1;
 		break;
 	default:
 		pr_err("lis331dlh is not supported on this evm (%d)\n", evm_id);
 		return;
 	}
 	/* I2C adapter request */
 	adapter = i2c_get_adapter(i2c_instance);
 	if (!adapter) {
 		pr_err("failed to get adapter i2c%u\n", i2c_instance);
 		return;
 	}
 	client = i2c_new_device(adapter, lis331dlh_i2c_boardinfo);
 	if (!client)
 		pr_err("failed to register lis331dlh to i2c%u\n", i2c_instance);
 	i2c_put_adapter(adapter);
 }
 static struct i2c_board_info am335x_i2c1_boardinfo[] = {
 	{
 		I2C_BOARD_INFO("tlv320aic3x", 0x1b),
 	},
 	{
 		I2C_BOARD_INFO("tsl2550", 0x39),
 	},
 	{
 		I2C_BOARD_INFO("tmp275", 0x48),
 	},
 };
 static void i2c1_init(int evm_id, int profile)
 {
 	setup_pin_mux(i2c1_pin_mux);
 	omap_register_i2c_bus(2, 100, am335x_i2c1_boardinfo,
 			ARRAY_SIZE(am335x_i2c1_boardinfo));
 	return;
 }
 static struct i2c_board_info am335x_i2c2_boardinfo[] = {
 };
 static void i2c2_init(int evm_id, int profile)
 {
 	setup_pin_mux(i2c2_pin_mux);
 	omap_register_i2c_bus(3, 100, am335x_i2c2_boardinfo,
 			ARRAY_SIZE(am335x_i2c2_boardinfo));
 	return;
 }
 /* Setup McASP 1 */
 static void mcasp1_init(int evm_id, int profile)
 {
 	/* Configure McASP */
 	setup_pin_mux(mcasp1_pin_mux);
 	switch (evm_id) {
 	case EVM_SK:
 		am335x_register_mcasp(&am335x_evm_sk_snd_data1, 1);
 		break;
 	default:
 		am335x_register_mcasp(&am335x_evm_snd_data1, 1);
 	}
 	return;
 }
 static void mmc1_init(int evm_id, int profile)
 {
 	setup_pin_mux(mmc1_common_pin_mux);
 	setup_pin_mux(mmc1_dat4_7_pin_mux);
 	setup_pin_mux(mmc1_wp_only_pin_mux);
 	setup_pin_mux(mmc1_cd_only_pin_mux);
 	am335x_mmc[1].mmc = 2;
 	am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
 	am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
 	am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
 	am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
 	/* mmc will be initialized when mmc0_init is called */
 	return;
 }
 static void mmc1_wl12xx_init(int evm_id, int profile)
 {
 	setup_pin_mux(mmc1_common_pin_mux);
 	am335x_mmc[1].mmc = 2;
 	am335x_mmc[1].name = "wl1271";
 	am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;
 	am335x_mmc[1].nonremovable = true;
 	am335x_mmc[1].gpio_cd = -EINVAL;
 	am335x_mmc[1].gpio_wp = -EINVAL;
 	am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
 }
 static void mmc2_wl12xx_init(int evm_id, int profile)
 {
 	setup_pin_mux(mmc2_wl12xx_pin_mux);
 	am335x_mmc[1].mmc = 3;
 	am335x_mmc[1].name = "wl1271";
 	am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD;
 	am335x_mmc[1].nonremovable = true;
 	am335x_mmc[1].gpio_cd = -EINVAL;
 	am335x_mmc[1].gpio_wp = -EINVAL;
 	am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
 	/* mmc will be initialized when mmc0_init is called */
 	return;
 }
 static void uart1_wl12xx_init(int evm_id, int profile)
 {
 	setup_pin_mux(uart1_wl12xx_pin_mux);
 }
 static void wl12xx_bluetooth_enable(void)
 {
 	int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,
 		"bt_en\n");
 	if (status < 0)
 		pr_err("Failed to request gpio for bt_enable");
 	pr_info("Configure Bluetooth Enable pin...\n");
 	gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
 }
 static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
 {
 	if (on) {
 		gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 1);
 		mdelay(70);
 	} else {
 		gpio_direction_output(am335xevm_wlan_data.wlan_enable_gpio, 0);
 	}
 	return 0;
 }
 static void wl12xx_init(int evm_id, int profile)
 {
 	struct device *dev;
 	struct omap_mmc_platform_data *pdata;
 	int ret;
 	if (evm_id == EVM_SK) {
 		am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(0, 31);
 		am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
 		am335xevm_wlan_data.irq =
 				OMAP_GPIO_IRQ(AM335XEVM_SK_WLAN_IRQ_GPIO);
 		setup_pin_mux(wl12xx_pin_mux_sk);
 	} else {
 		setup_pin_mux(wl12xx_pin_mux);
 	}
 	wl12xx_bluetooth_enable();
 	if (wl12xx_set_platform_data(&am335xevm_wlan_data))
 		pr_err("error setting wl12xx data\n");
 	dev = am335x_mmc[1].dev;
 	if (!dev) {
 		pr_err("wl12xx mmc device initialization failed\n");
 		goto out;
 	}
 	pdata = dev->platform_data;
 	if (!pdata) {
 		pr_err("Platfrom data of wl12xx device not set\n");
 		goto out;
 	}
 	ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,
 		GPIOF_OUT_INIT_LOW, "wlan_en");
 	if (ret) {
 		pr_err("Error requesting wlan enable gpio: %d\n", ret);
 		goto out;
 	}
 	pdata->slots[0].set_power = wl12xx_set_power;
 out:
 	return;
 }
 static void d_can_init(int evm_id, int profile)
 {
 	switch (evm_id) {
 	case IND_AUT_MTR_EVM:
 		if ((profile == PROFILE_0) || (profile == PROFILE_1)) {
 			setup_pin_mux(d_can_ia_pin_mux);
 			/* Instance Zero */
 			am33xx_d_can_init(0);
 		}
 		break;
 	case GEN_PURP_EVM:
 	case GEN_PURP_DDR3_EVM:
 		if (profile == PROFILE_1) {
 			setup_pin_mux(d_can_gp_pin_mux);
 			/* Instance One */
 			am33xx_d_can_init(1);
 		}
 		break;
 	default:
 		break;
 	}
 }
 static void mmc0_init(int evm_id, int profile)
 {
 	switch (evm_id) {
 	case BEAGLE_BONE_A3:
 	case BEAGLE_BONE_OLD:
 	case EVM_SK:
 		setup_pin_mux(mmc0_common_pin_mux);
 		setup_pin_mux(mmc0_cd_only_pin_mux);
 		break;
 	default:
 		setup_pin_mux(mmc0_common_pin_mux);
 		setup_pin_mux(mmc0_cd_only_pin_mux);
 		setup_pin_mux(mmc0_wp_only_pin_mux);
 		break;
 	}
 	omap2_hsmmc_init(am335x_mmc);
 	return;
 }
 static struct i2c_board_info tps65217_i2c_boardinfo[] = {
 	{
 		I2C_BOARD_INFO("tps65217", TPS65217_I2C_ID),
 		.platform_data  = &beaglebone_tps65217_info,
 	},
 };
 static void tps65217_init(int evm_id, int profile)
 {
 	struct i2c_adapter *adapter;
 	struct i2c_client *client;
 	struct device *mpu_dev;
 	struct tps65217 *tps;
 	unsigned int val;
 	int ret;
 	mpu_dev = omap_device_get_by_hwmod_name("mpu");
 	if (!mpu_dev)
 		pr_warning("%s: unable to get the mpu device\n", __func__);
 	/* I2C1 adapter request */
 	adapter = i2c_get_adapter(1);
 	if (!adapter) {
 		pr_err("failed to get adapter i2c1\n");
 		return;
 	}
 	client = i2c_new_device(adapter, tps65217_i2c_boardinfo);
 	if (!client)
 		pr_err("failed to register tps65217 to i2c1\n");
 	i2c_put_adapter(adapter);
 	tps = (struct tps65217 *)i2c_get_clientdata(client);
 	ret = tps65217_reg_read(tps, TPS65217_REG_STATUS, &val);
 	if (ret) {
 		pr_err("failed to read tps65217 status reg\n");
 		return;
 	}
 	if (!(val & TPS65217_STATUS_ACPWR)) {
 		/* If powered by USB then disable OPP120 and OPPTURBO */
 		pr_info("Maximum current provided by the USB port is 500mA"
 			" which is not sufficient\nwhen operating @OPP120 and"
 			" OPPTURBO. The current requirement for some\nuse-cases"
 			" using OPP100 might also exceed the maximum current"
 			" that the\nUSB port can provide. Unless you are fully"
 			" confident that the current\nrequirements for OPP100"
 			" use-case don't exceed the USB limits, switching\nto"
 			" AC power is recommended.\n");
 		opp_disable(mpu_dev, 600000000);
 		opp_disable(mpu_dev, 720000000);
 	}
 }
 static void mmc0_no_cd_init(int evm_id, int profile)
 {
 	setup_pin_mux(mmc0_common_pin_mux);
 	setup_pin_mux(mmc0_wp_only_pin_mux);
 	omap2_hsmmc_init(am335x_mmc);
 	return;
 }
 /* Configure GPIOs for GPIO Keys */
 static struct gpio_keys_button am335x_evm_gpio_buttons[] = {
 	{
 		.code                   = BTN_0,
 		.gpio                   = GPIO_TO_PIN(2, 3),
 		.desc                   = "SW1",
 	},
 	{
 		.code                   = BTN_1,
 		.gpio                   = GPIO_TO_PIN(2, 2),
 		.desc                   = "SW2",
 	},
 	{
 		.code                   = BTN_2,
 		.gpio                   = GPIO_TO_PIN(0, 30),
 		.desc                   = "SW3",
 		.wakeup                 = 1,
 	},
 	{
 		.code                   = BTN_3,
 		.gpio                   = GPIO_TO_PIN(2, 5),
 		.desc                   = "SW4",
 	},
 };
 static struct gpio_keys_platform_data am335x_evm_gpio_key_info = {
 	.buttons        = am335x_evm_gpio_buttons,
 	.nbuttons       = ARRAY_SIZE(am335x_evm_gpio_buttons),
 };
 static struct platform_device am335x_evm_gpio_keys = {
 	.name   = "gpio-keys",
 	.id     = -1,
 	.dev    = {
 		.platform_data  = &am335x_evm_gpio_key_info,
 	},
 };
 static void gpio_keys_init(int evm_id, int profile)
 {
 	int err;
 	setup_pin_mux(gpio_keys_pin_mux);
 	err = platform_device_register(&am335x_evm_gpio_keys);
 	if (err)
 		pr_err("failed to register gpio key device\n");
 }
 static struct gpio_led gpio_leds[] = {
 	{
 		.name			= "am335x:EVM_SK:usr0",
 		.gpio			= GPIO_TO_PIN(1, 4),	/* D1 */
 	},
 	{
 		.name			= "am335x:EVM_SK:usr1",
 		.gpio			= GPIO_TO_PIN(1, 5),	/* D2 */
 	},
 	{
 		.name			= "am335x:EVM_SK:mmc0",
 		.gpio			= GPIO_TO_PIN(1, 7),	/* D3 */
 		.default_trigger	= "mmc0",
 	},
 	{
 		.name			= "am335x:EVM_SK:heartbeat",
 		.gpio			= GPIO_TO_PIN(1, 6),	/* D4 */
 		.default_trigger	= "heartbeat",
 	},
 };
 static struct gpio_led_platform_data gpio_led_info = {
 	.leds		= gpio_leds,
 	.num_leds	= ARRAY_SIZE(gpio_leds),
 };
 static struct platform_device leds_gpio = {
 	.name	= "leds-gpio",
 	.id	= -1,
 	.dev	= {
 		.platform_data	= &gpio_led_info,
 	},
 };
 static void gpio_led_init(int evm_id, int profile)
 {
 	int err;
 	setup_pin_mux(gpio_led_mux);
 	err = platform_device_register(&leds_gpio);
 	if (err)
 		pr_err("failed to register gpio led device\n");
 }
 /* setup spi0 */
 static void spi0_init(int evm_id, int profile)
 {
 	setup_pin_mux(spi0_pin_mux);
 	spi_register_board_info(am335x_spi0_slave_info,
 			ARRAY_SIZE(am335x_spi0_slave_info));
 	return;
 }
 /* setup spi1 */
 static void spi1_init(int evm_id, int profile)
 {
 	setup_pin_mux(spi1_pin_mux);
 	spi_register_board_info(am335x_spi1_slave_info,
 			ARRAY_SIZE(am335x_spi1_slave_info));
 	return;
 }
 static int beaglebone_phy_fixup(struct phy_device *phydev)
 {
 	phydev->supported &= ~(SUPPORTED_100baseT_Half |
 				SUPPORTED_100baseT_Full);
 	return 0;
 }
 static void profibus_init(int evm_id, int profile)
 {
 	setup_pin_mux(profibus_pin_mux);
 	return;
 }
 static struct omap_rtc_pdata am335x_rtc_info = {
 	.pm_off		= false,
 	.wakeup_capable	= 0,
 };
 static void am335x_rtc_init(int evm_id, int profile)
 {
 	void __iomem *base;
 	struct clk *clk;
 	struct omap_hwmod *oh;
 	struct platform_device *pdev;
 	char *dev_name = "am33xx-rtc";
 	clk = clk_get(NULL, "rtc_fck");
 	if (IS_ERR(clk)) {
 		pr_err("rtc : Failed to get RTC clock\n");
 		return;
 	}
 	if (clk_enable(clk)) {
 		pr_err("rtc: Clock Enable Failed\n");
 		return;
 	}
 	base = ioremap(AM33XX_RTC_BASE, SZ_4K);
 	if (WARN_ON(!base))
 		return;
 	/* Unlock the rtc's registers */
 	writel(0x83e70b13, base + 0x6c);
 	writel(0x95a4f1e0, base + 0x70);
 	/*
 	 * Enable the 32K OSc
 	 * TODO: Need a better way to handle this
 	 * Since we want the clock to be running before mmc init
 	 * we need to do it before the rtc probe happens
 	 */
 	writel(0x48, base + 0x54);
 	iounmap(base);
 	switch (evm_id) {
 	case BEAGLE_BONE_A3:
 	case BEAGLE_BONE_OLD:
 		am335x_rtc_info.pm_off = true;
 		break;
 	default:
 		break;
 	}
 	clk_disable(clk);
 	clk_put(clk);
 	if (omap_rev() >= AM335X_REV_ES2_0)
 		am335x_rtc_info.wakeup_capable = 1;
 	oh = omap_hwmod_lookup("rtc");
 	if (!oh) {
 		pr_err("could not look up %s\n", "rtc");
 		return;
 	}
 	pdev = omap_device_build(dev_name, -1, oh, &am335x_rtc_info,
 			sizeof(struct omap_rtc_pdata), NULL, 0, 0);
 	WARN(IS_ERR(pdev), "Can't build omap_device for %s:%s.\n",
 			dev_name, oh->name);
 }
 /* Enable clkout2 */
 static struct pinmux_config clkout2_pin_mux[] = {
 	{"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
 	{NULL, 0},
 };
 static void clkout2_enable(int evm_id, int profile)
 {
 	struct clk *ck_32;
 	ck_32 = clk_get(NULL, "clkout2_ck");
 	if (IS_ERR(ck_32)) {
 		pr_err("Cannot clk_get ck_32\n");
 		return;
 	}
 	clk_enable(ck_32);
 	setup_pin_mux(clkout2_pin_mux);
 }
 static void sgx_init(int evm_id, int profile)
 {
 	if (omap3_has_sgx()) {
 		am33xx_gpu_init();
 	}
 }
 /* General Purpose EVM */
 static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
 	{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{enable_ecap0,	DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
 						PROFILE_2 | PROFILE_7) },
 	{lcdc_init,	DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
 						PROFILE_2 | PROFILE_7) },
 	{mfd_tscadc_init,	DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
 						PROFILE_2 | PROFILE_7) },
 	{rgmii1_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{rgmii2_init,	DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
 						PROFILE_4 | PROFILE_6) },
 	{usb0_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{usb1_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{evm_nand_init, DEV_ON_DGHTR_BRD,
 		(PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
 	{i2c1_init,     DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
 	{lis331dlh_init, DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
 	{mcasp1_init,	DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
 	{mmc1_init,	DEV_ON_DGHTR_BRD, PROFILE_2},
 	{mmc2_wl12xx_init,	DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
 								PROFILE_5)},
 	{mmc0_init,	DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
 	{mmc0_no_cd_init,	DEV_ON_BASEBOARD, PROFILE_5},
 	{spi0_init,	DEV_ON_DGHTR_BRD, PROFILE_2},
 	{uart1_wl12xx_init,	DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
 								PROFILE_5)},
 	{wl12xx_init,	DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
 	{d_can_init,	DEV_ON_DGHTR_BRD, PROFILE_1},
 	{matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
 	{volume_keys_init,  DEV_ON_DGHTR_BRD, PROFILE_0},
 	{uart2_init,	DEV_ON_DGHTR_BRD, PROFILE_3},
 	{haptics_init,	DEV_ON_DGHTR_BRD, (PROFILE_4)},
 	{sgx_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{NULL, 0, 0},
 };
 /* Industrial Auto Motor Control EVM */
 static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
 	{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mii1_init,	DEV_ON_DGHTR_BRD, PROFILE_ALL},
 	{usb0_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{usb1_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
 	{evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
 	{spi1_init,	DEV_ON_DGHTR_BRD, PROFILE_ALL},
 	{uart3_init,	DEV_ON_DGHTR_BRD, PROFILE_ALL},
 	{i2c1_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mmc0_no_cd_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{NULL, 0, 0},
 };
 /* Beaglebone < Rev A3 */
 static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {
 	{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},
 	{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},
 	{rmii1_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{usb0_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{usb1_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{mmc0_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{i2c2_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{sgx_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{NULL, 0, 0},
 };
 /* Beaglebone Rev A3 and after */
 static struct evm_dev_cfg beaglebone_dev_cfg[] = {
 	{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_NONE},
 	{clkout2_enable, DEV_ON_BASEBOARD, PROFILE_NONE},
 	{tps65217_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{mii1_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{usb0_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{usb1_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{mmc0_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{i2c2_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{sgx_init,	DEV_ON_BASEBOARD, PROFILE_NONE},
 	{NULL, 0, 0},
 };
 /* EVM - Starter Kit */
 static struct evm_dev_cfg evm_sk_dev_cfg[] = {
 	{am335x_rtc_init, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mmc1_wl12xx_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mmc0_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{rgmii1_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{rgmii2_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{lcdc_init,     DEV_ON_BASEBOARD, PROFILE_ALL},
 	{enable_ecap2,     DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mfd_tscadc_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{gpio_keys_init,  DEV_ON_BASEBOARD, PROFILE_ALL},
 	{gpio_led_init,  DEV_ON_BASEBOARD, PROFILE_ALL},
 	{lis331dlh_init, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{mcasp1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
 	{uart1_wl12xx_init, DEV_ON_BASEBOARD, PROFILE_ALL},
 	{wl12xx_init,       DEV_ON_BASEBOARD, PROFILE_ALL},
 	{gpio_ddr_vtt_enb_init,	DEV_ON_BASEBOARD, PROFILE_ALL},
 	{sgx_init,       DEV_ON_BASEBOARD, PROFILE_ALL},
 	{NULL, 0, 0},
 };
 static int am33xx_evm_tx_clk_dly_phy_fixup(struct phy_device *phydev)
 {
 	phy_write(phydev, AR8051_PHY_DEBUG_ADDR_REG,
 		  AR8051_DEBUG_RGMII_CLK_DLY_REG);
 	phy_write(phydev, AR8051_PHY_DEBUG_DATA_REG, AR8051_RGMII_TX_CLK_DLY);
 	return 0;
 }
-#define AM33XX_VDD_MPU_OPP50_UV		1100000
+#define AM33XX_VDD_CORE_OPP50_UV		1100000
 #define AM33XX_OPP120_FREQ		600000000
 #define AM33XX_OPPTURBO_FREQ		720000000
-#define AM33XX_ES2_0_VDD_MPU_OPP50_UV	950000
+#define AM33XX_ES2_0_VDD_CORE_OPP50_UV	950000
+#define AM33XX_ES2_0_OPP120_FREQ	720000000
 #define AM33XX_ES2_0_OPPTURBO_FREQ	800000000
 #define AM33XX_ES2_0_OPPNITRO_FREQ	1000000000
-#define AM33XX_ES2_1_VDD_MPU_OPP50_UV	950000
+#define AM33XX_ES2_1_VDD_CORE_OPP50_UV	950000
+#define AM33XX_ES2_1_OPP120_FREQ	720000000
 #define AM33XX_ES2_1_OPPTURBO_FREQ	800000000
 #define AM33XX_ES2_1_OPPNITRO_FREQ	1000000000
 static void am335x_opp_update(void)
 {
 	u32 rev;
 	int voltage_uv = 0;
 	struct device *core_dev, *mpu_dev;
 	struct regulator *core_reg;
 	core_dev = omap_device_get_by_hwmod_name("l3_main");
 	mpu_dev = omap_device_get_by_hwmod_name("mpu");
 	if (!mpu_dev || !core_dev) {
 		pr_err("%s: Aiee.. no mpu/core devices? %p %p\n", __func__,
 		       mpu_dev, core_dev);
 		return;
 	}
 	core_reg = regulator_get(core_dev, "vdd_core");
 	if (IS_ERR(core_reg)) {
 		pr_err("%s: unable to get core regulator\n", __func__);
 		return;
 	}
 	/*
 	 * Ensure physical regulator is present.
 	 * (e.g. could be dummy regulator.)
 	 */
 	voltage_uv = regulator_get_voltage(core_reg);
 	if (voltage_uv < 0) {
 		pr_err("%s: physical regulator not present for core" \
 		       "(%d)\n", __func__, voltage_uv);
 		regulator_put(core_reg);
 		return;
 	}
 	pr_debug("%s: core regulator value %d\n", __func__, voltage_uv);
 	if (voltage_uv > 0) {
 		rev = omap_rev();
 		switch (rev) {
 		case AM335X_REV_ES1_0:
-			if (voltage_uv <= AM33XX_VDD_MPU_OPP50_UV) {
+			if (voltage_uv <= AM33XX_VDD_CORE_OPP50_UV) {
 				/*
 				 * disable the higher freqs - we dont care about
 				 * the results
 				 */
 				opp_disable(mpu_dev, AM33XX_OPP120_FREQ);
 				opp_disable(mpu_dev, AM33XX_OPPTURBO_FREQ);
 			}
 			break;
 		case AM335X_REV_ES2_0:
-			if (voltage_uv <= AM33XX_ES2_0_VDD_MPU_OPP50_UV) {
+			if (voltage_uv <= AM33XX_ES2_0_VDD_CORE_OPP50_UV) {
 				/*
 				 * disable the higher freqs - we dont care about
 				 * the results
 				 */
 				opp_disable(mpu_dev,
+					    AM33XX_ES2_0_OPP120_FREQ);
+				opp_disable(mpu_dev,
 					    AM33XX_ES2_0_OPPTURBO_FREQ);
 				opp_disable(mpu_dev,
 					    AM33XX_ES2_0_OPPNITRO_FREQ);
 			}
 			break;
 		case AM335X_REV_ES2_1:
 		/* FALLTHROUGH */
 		default:
-			if (voltage_uv <= AM33XX_ES2_1_VDD_MPU_OPP50_UV) {
+			if (voltage_uv <= AM33XX_ES2_1_VDD_CORE_OPP50_UV) {
 				/*
 				 * disable the higher freqs - we dont care about
 				 * the results
 				 */
+				opp_disable(mpu_dev,
+					    AM33XX_ES2_1_OPP120_FREQ);
 				opp_disable(mpu_dev,
 					    AM33XX_ES2_1_OPPTURBO_FREQ);
 				opp_disable(mpu_dev,
 					    AM33XX_ES2_1_OPPNITRO_FREQ);
 			}
 			break;
 		}
 	}
 }
 static void setup_general_purpose_evm(void)
 {
 	u32 prof_sel = am335x_get_profile_selection();
 	u32 boardid = GEN_PURP_EVM;
 	if (!strncmp("1.5A", config.version, 4))
 		boardid = GEN_PURP_DDR3_EVM;
 	pr_info("The board is general purpose EVM %sin profile %d\n",
 			((boardid == GEN_PURP_DDR3_EVM) ? "with DDR3 " : ""),
 			prof_sel);
 	_configure_device(boardid, gen_purp_evm_dev_cfg, (1L << prof_sel));
 	am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);
 	/* Atheros Tx Clk delay Phy fixup */
 	phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,
 				   am33xx_evm_tx_clk_dly_phy_fixup);
 }
 static void setup_ind_auto_motor_ctrl_evm(void)
 {
 	u32 prof_sel = am335x_get_profile_selection();
 	pr_info("The board is an industrial automation EVM in profile %d\n",
 		prof_sel);
 	/* Only Profile 0 is supported */
 	if ((1L << prof_sel) != PROFILE_0) {
 		pr_err("AM335X: Only Profile 0 is supported\n");
 		pr_err("Assuming profile 0 & continuing\n");
 		prof_sel = PROFILE_0;
 	}
 	_configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
 		PROFILE_0);
 	am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, "0:1e", "0:00");
 }
 /* BeagleBone < Rev A3 */
 static void setup_beaglebone_old(void)
 {
 	pr_info("The board is a AM335x Beaglebone < Rev A3.\n");
 	/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
 	am335x_mmc[0].gpio_wp = -EINVAL;
 	_configure_device(BEAGLE_BONE_OLD, beaglebone_old_dev_cfg,
 								PROFILE_NONE);
 	phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,
 					beaglebone_phy_fixup);
 	am33xx_cpsw_init(AM33XX_CPSW_MODE_RMII, NULL, NULL);
 }
 /* BeagleBone after Rev A3 */
 static void setup_beaglebone(void)
 {
 	pr_info("The board is a AM335x Beaglebone.\n");
 	/* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
 	am335x_mmc[0].gpio_wp = -EINVAL;
 	_configure_device(BEAGLE_BONE_A3, beaglebone_dev_cfg, PROFILE_NONE);
 	/* TPS65217 regulator has full constraints */
 	regulator_has_full_constraints();
 	am33xx_cpsw_init(AM33XX_CPSW_MODE_MII, NULL, NULL);
 }
 /* EVM - Starter Kit */
 static void setup_starterkit(void)
 {
 	pr_info("The board is a AM335x Starter Kit.\n");
 	/* Starter Kit has Micro-SD slot which doesn't have Write Protect pin */
 	am335x_mmc[0].gpio_wp = -EINVAL;
 	_configure_device(EVM_SK, evm_sk_dev_cfg, PROFILE_NONE);
 	am33xx_cpsw_init(AM33XX_CPSW_MODE_RGMII, NULL, NULL);
 	/* Atheros Tx Clk delay Phy fixup */
 	phy_register_fixup_for_uid(AM335X_EVM_PHY_ID, AM335X_EVM_PHY_MASK,
 				   am33xx_evm_tx_clk_dly_phy_fixup);
 }
 static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
 {
 	int ret;
 	/*
 	 * Read from the EEPROM to see the presence of daughter board.
 	 * If present, print the cpld version.
 	 */
 	ret = m->read(m, (char *)&config1, 0, sizeof(config1));
 	if (ret == sizeof(config1)) {
 		pr_info("Detected a daughter card on AM335x EVM..");
 		daughter_brd_detected = true;
 	}
 	 else {
 		pr_info("No daughter card found\n");
 		daughter_brd_detected = false;
 		return;
 	}
 	if (!strncmp("CPLD", config1.cpld_ver, 4))
 		pr_info("CPLD version: %s\n", config1.cpld_ver);
 	else
 		pr_err("Unknown CPLD version found\n");
 }
 static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
 {
 	int ret;
 	char tmp[10];
 	/* 1st get the MAC address from EEPROM */
 	ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,
 		EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));
 	if (ret != sizeof(am335x_mac_addr)) {
 		pr_warning("AM335X: EVM Config read fail: %d\n", ret);
 		return;
 	}
 	/* Fillup global mac id */
 	am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],
 				&am335x_mac_addr[1][0]);
 	/* get board specific data */
 	ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
 	if (ret != sizeof(config)) {
 		pr_err("AM335X EVM config read fail, read %d bytes\n", ret);
 		pr_err("This likely means that there either is no/or a failed EEPROM\n");
 		goto out;
 	}
 	if (config.header != AM335X_EEPROM_HEADER) {
 		pr_err("AM335X: wrong header 0x%x, expected 0x%x\n",
 			config.header, AM335X_EEPROM_HEADER);
 		goto out;
 	}
 	if (strncmp("A335", config.name, 4)) {
 		pr_err("Board %s\ndoesn't look like an AM335x board\n",
 			config.name);
 		goto out;
 	}
 	snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);
 	pr_info("Board name: %s\n", tmp);
 	snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);
 	pr_info("Board version: %s\n", tmp);
 	if (!strncmp("A335BONE", config.name, 8)) {
 		daughter_brd_detected = false;
 		if(!strncmp("00A1", config.version, 4) ||
 		   !strncmp("00A2", config.version, 4))
 			setup_beaglebone_old();
 		else
 			setup_beaglebone();
 	} else if (!strncmp("A335X_SK", config.name, 8)) {
 		daughter_brd_detected = false;
 		setup_starterkit();
 	} else {
 		/* only 6 characters of options string used for now */
 		snprintf(tmp, 7, "%s", config.opt);
 		pr_info("SKU: %s\n", tmp);
 		if (!strncmp("SKU#01", config.opt, 6))
 			setup_general_purpose_evm();
 		else if (!strncmp("SKU#02", config.opt, 6))
 			setup_ind_auto_motor_ctrl_evm();
 		else
 			goto out;
 	}
 	am335x_opp_update();
 	return;
 out:
 	/*
 	 * If the EEPROM hasn't been programed or an incorrect header
 	 * or board name are read then the hardware details are unknown.
 	 * Notify the user and call machine_halt to stop the boot process.
 	 */
 	pr_err("The error message above indicates that there is an issue with\n"
 		   "the EEPROM or the EEPROM contents.  After verifying the EEPROM\n"
 		   "contents, if any, refer to the %s function in the\n"
 		   "%s file to modify the board\n"
 		   "initialization code to match the hardware configuration\n",
 		   __func__ , __FILE__);
 	machine_halt();
 }
 static struct at24_platform_data am335x_daughter_board_eeprom_info = {
 	.byte_len       = (256*1024) / 8,
 	.page_size      = 64,
 	.flags          = AT24_FLAG_ADDR16,
 	.setup          = am335x_setup_daughter_board,
 	.context        = (void *)NULL,
 };
 static struct at24_platform_data am335x_baseboard_eeprom_info = {
 	.byte_len       = (256*1024) / 8,
 	.page_size      = 64,
 	.flags          = AT24_FLAG_ADDR16,
 	.setup          = am335x_evm_setup,
 	.context        = (void *)NULL,
 };
 static struct regulator_init_data am335x_dummy = {
 	.constraints.always_on	= true,
 };
 static struct regulator_consumer_supply am335x_vdd1_supply[] = {
 	REGULATOR_SUPPLY("vdd_mpu", NULL),
 };
 static struct regulator_init_data am335x_vdd1 = {
 	.constraints = {
 		.min_uV			= 600000,
 		.max_uV			= 1500000,
 		.valid_modes_mask	= REGULATOR_MODE_NORMAL,
 		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,
 		.always_on		= 1,
 	},
 	.num_consumer_supplies	= ARRAY_SIZE(am335x_vdd1_supply),
 	.consumer_supplies	= am335x_vdd1_supply,
 };
 static struct regulator_consumer_supply am335x_vdd2_supply[] = {
 	REGULATOR_SUPPLY("vdd_core", NULL),
 };
 static struct regulator_init_data am335x_vdd2 = {
 	.constraints = {
 		.min_uV			= 600000,
 		.max_uV			= 1500000,
 		.valid_modes_mask	= REGULATOR_MODE_NORMAL,
 		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE,
 		.always_on		= 1,
 	},
 	.num_consumer_supplies	= ARRAY_SIZE(am335x_vdd2_supply),
 	.consumer_supplies	= am335x_vdd2_supply,
 };
 static struct tps65910_board am335x_tps65910_info = {
 	.tps65910_pmic_init_data[TPS65910_REG_VRTC]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VIO]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VDD1]	= &am335x_vdd1,
 	.tps65910_pmic_init_data[TPS65910_REG_VDD2]	= &am335x_vdd2,
 	.tps65910_pmic_init_data[TPS65910_REG_VDD3]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VDIG1]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VDIG2]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VPLL]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VDAC]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VAUX1]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VAUX2]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VAUX33]	= &am335x_dummy,
 	.tps65910_pmic_init_data[TPS65910_REG_VMMC]	= &am335x_dummy,
 };
 /*
 * Daughter board Detection.
 * Every board has a ID memory (EEPROM) on board. We probe these devices at
 * machine init, starting from daughter board and ending with baseboard.
 * Assumptions :
 *	1. probe for i2c devices are called in the order they are included in
 *	   the below struct. Daughter boards eeprom are probed 1st. Baseboard
 *	   eeprom probe is called last.
 */
 static struct i2c_board_info __initdata am335x_i2c0_boardinfo[] = {
 	{
 		/* Daughter Board EEPROM */
 		I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
 		.platform_data  = &am335x_daughter_board_eeprom_info,
 	},
 	{
 		/* Baseboard board EEPROM */
 		I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
 		.platform_data  = &am335x_baseboard_eeprom_info,
 	},
 	{
 		I2C_BOARD_INFO("cpld_reg", 0x35),
 	},
 	{
 		I2C_BOARD_INFO("tlc59108", 0x40),
 	},
 	{
 		I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),
 		.platform_data  = &am335x_tps65910_info,
 	},
 	{
 		I2C_BOARD_INFO("tlv320aic3x", 0x1b),
 	},
 };
 static struct omap_musb_board_data musb_board_data = {
 	.interface_type	= MUSB_INTERFACE_ULPI,
 	/*
 	 * mode[0:3] = USB0PORT's mode
 	 * mode[4:7] = USB1PORT's mode
 	 * AM335X beta EVM has USB0 in OTG mode and USB1 in host mode.
 	 */
 	.mode           = (MUSB_HOST << 4) | MUSB_OTG,
 	.power		= 500,
 	.instances	= 1,
 };
 static int cpld_reg_probe(struct i2c_client *client,
 	    const struct i2c_device_id *id)
 {
 	cpld_client = client;
 	return 0;
 }
 static int __devexit cpld_reg_remove(struct i2c_client *client)
 {
 	cpld_client = NULL;
 	return 0;
 }
 static const struct i2c_device_id cpld_reg_id[] = {
 	{ "cpld_reg", 0 },
 	{ }
 };
 static struct i2c_driver cpld_reg_driver = {
 	.driver = {
 		.name	= "cpld_reg",
 	},
 	.probe		= cpld_reg_probe,
 	.remove		= cpld_reg_remove,
 	.id_table	= cpld_reg_id,
 };
 static void evm_init_cpld(void)
 {
 	i2c_add_driver(&cpld_reg_driver);
 }
 static void __init am335x_evm_i2c_init(void)
 {
 	/* Initially assume General Purpose EVM Config */
 	am335x_evm_id = GEN_PURP_EVM;
 	evm_init_cpld();
 	omap_register_i2c_bus(1, 100, am335x_i2c0_boardinfo,
 				ARRAY_SIZE(am335x_i2c0_boardinfo));
 }
 void __iomem *am33xx_emif_base;
 void __iomem * __init am33xx_get_mem_ctlr(void)
 {
 	am33xx_emif_base = ioremap(AM33XX_EMIF0_BASE, SZ_32K);
 	if (!am33xx_emif_base)
 		pr_warning("%s: Unable to map DDR2 controller",	__func__);
 	return am33xx_emif_base;
 }
 void __iomem *am33xx_get_ram_base(void)
 {
 	return am33xx_emif_base;
 }
 void __iomem *am33xx_gpio0_base;
 void __iomem *am33xx_get_gpio0_base(void)
 {
 	am33xx_gpio0_base = ioremap(AM33XX_GPIO0_BASE, SZ_4K);
 	return am33xx_gpio0_base;
 }
 static struct resource am33xx_cpuidle_resources[] = {
 	{
 		.start		= AM33XX_EMIF0_BASE,
 		.end		= AM33XX_EMIF0_BASE + SZ_32K - 1,
 		.flags		= IORESOURCE_MEM,
 	},
 };
 /* AM33XX devices support DDR2 power down */
 static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {
 	.ddr2_pdown	= 1,
 };
 static struct platform_device am33xx_cpuidle_device = {
 	.name			= "cpuidle-am33xx",
 	.num_resources		= ARRAY_SIZE(am33xx_cpuidle_resources),
 	.resource		= am33xx_cpuidle_resources,
 	.dev = {
 		.platform_data	= &am33xx_cpuidle_pdata,
 	},
 };
 static void __init am33xx_cpuidle_init(void)
 {
 	int ret;
 	am33xx_cpuidle_pdata.emif_base = am33xx_get_mem_ctlr();
 	ret = platform_device_register(&am33xx_cpuidle_device);
 	if (ret)
 		pr_warning("AM33XX cpuidle registration failed\n");
 }
 static void __init am335x_evm_init(void)
 {
 	am33xx_cpuidle_init();
 	am33xx_mux_init(board_mux);
 	omap_serial_init();
 	am335x_evm_i2c_init();
 	omap_sdrc_init(NULL, NULL);
 	usb_musb_init(&musb_board_data);
 	omap_board_config = am335x_evm_config;
 	omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
 	/* Create an alias for icss clock */
 	if (clk_add_alias("pruss", NULL, "pruss_uart_gclk", NULL))
 		pr_warn("failed to create an alias: icss_uart_gclk --> pruss\n");
 	/* Create an alias for gfx/sgx clock */
 	if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))
 		pr_warn("failed to create an alias: gfx_fclk --> sgx_ck\n");
 }
 static void __init am335x_evm_map_io(void)
 {
 	omap2_set_globals_am33xx();
 	omapam33xx_map_common_io();
 }
 MACHINE_START(AM335XEVM, "am335xevm")
 	/* Maintainer: Texas Instruments */
 	.atag_offset	= 0x100,
 	.map_io		= am335x_evm_map_io,
 	.init_early	= am33xx_init_early,
 	.init_irq	= ti81xx_init_irq,
 	.handle_irq     = omap3_intc_handle_irq,
 	.timer		= &omap3_am33xx_timer,
 	.init_machine	= am335x_evm_init,
 MACHINE_END
 MACHINE_START(AM335XIAEVM, "am335xiaevm")
 	/* Maintainer: Texas Instruments */
 	.atag_offset	= 0x100,
 	.map_io		= am335x_evm_map_io,
 	.init_irq	= ti81xx_init_irq,
 	.init_early	= am33xx_init_early,
 	.timer		= &omap3_am33xx_timer,
 	.init_machine	= am335x_evm_init,
 MACHINE_END