Commit d5720d33bc7c434f9a023dbb62c795538f976b7a
1 parent
97bdb69b0e
Exists in
v3.2_SMARCT335xPSP_04.06.00.11
and in
3 other branches
ARM: OMAP2+: AM335x: update OPP50 handling
Recent commit from Greg (OPP Table fix for 720MHZ and ZCE support) added OPP120 support for PG 2.x. OPP120 support needs to be disabled when the board is booted and running at OPP50. This is as per the Advisory 1.0.15 (ARM Cortex-A8: OPP50 Operation on MPU Domain Not Supported) Voltage checked here are Core Voltage and not MPU. Hence, When here correct the preprocessors to indicate correct voltages. As per Sitara AM335x ARM Cortex -A8 Microprocessors (MPUs) data sheet (SPRS717F) APRIL 2013 available at http://www.ti.com/lit/ds/symlink/am3359.pdf Table 3-7 and 3-9 has been updated to show the defined OPPs on ZCZ and ZCE packages respectively Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com>
Showing 1 changed file with 12 additions and 6 deletions Side-by-side Diff
arch/arm/mach-omap2/board-am335xevm.c
| ... | ... | @@ -2181,15 +2181,17 @@ |
| 2181 | 2181 | return 0; |
| 2182 | 2182 | } |
| 2183 | 2183 | |
| 2184 | -#define AM33XX_VDD_MPU_OPP50_UV 1100000 | |
| 2184 | +#define AM33XX_VDD_CORE_OPP50_UV 1100000 | |
| 2185 | 2185 | #define AM33XX_OPP120_FREQ 600000000 |
| 2186 | 2186 | #define AM33XX_OPPTURBO_FREQ 720000000 |
| 2187 | 2187 | |
| 2188 | -#define AM33XX_ES2_0_VDD_MPU_OPP50_UV 950000 | |
| 2188 | +#define AM33XX_ES2_0_VDD_CORE_OPP50_UV 950000 | |
| 2189 | +#define AM33XX_ES2_0_OPP120_FREQ 720000000 | |
| 2189 | 2190 | #define AM33XX_ES2_0_OPPTURBO_FREQ 800000000 |
| 2190 | 2191 | #define AM33XX_ES2_0_OPPNITRO_FREQ 1000000000 |
| 2191 | 2192 | |
| 2192 | -#define AM33XX_ES2_1_VDD_MPU_OPP50_UV 950000 | |
| 2193 | +#define AM33XX_ES2_1_VDD_CORE_OPP50_UV 950000 | |
| 2194 | +#define AM33XX_ES2_1_OPP120_FREQ 720000000 | |
| 2193 | 2195 | #define AM33XX_ES2_1_OPPTURBO_FREQ 800000000 |
| 2194 | 2196 | #define AM33XX_ES2_1_OPPNITRO_FREQ 1000000000 |
| 2195 | 2197 | |
| ... | ... | @@ -2232,7 +2234,7 @@ |
| 2232 | 2234 | rev = omap_rev(); |
| 2233 | 2235 | switch (rev) { |
| 2234 | 2236 | case AM335X_REV_ES1_0: |
| 2235 | - if (voltage_uv <= AM33XX_VDD_MPU_OPP50_UV) { | |
| 2237 | + if (voltage_uv <= AM33XX_VDD_CORE_OPP50_UV) { | |
| 2236 | 2238 | /* |
| 2237 | 2239 | * disable the higher freqs - we dont care about |
| 2238 | 2240 | * the results |
| 2239 | 2241 | |
| ... | ... | @@ -2242,12 +2244,14 @@ |
| 2242 | 2244 | } |
| 2243 | 2245 | break; |
| 2244 | 2246 | case AM335X_REV_ES2_0: |
| 2245 | - if (voltage_uv <= AM33XX_ES2_0_VDD_MPU_OPP50_UV) { | |
| 2247 | + if (voltage_uv <= AM33XX_ES2_0_VDD_CORE_OPP50_UV) { | |
| 2246 | 2248 | /* |
| 2247 | 2249 | * disable the higher freqs - we dont care about |
| 2248 | 2250 | * the results |
| 2249 | 2251 | */ |
| 2250 | 2252 | opp_disable(mpu_dev, |
| 2253 | + AM33XX_ES2_0_OPP120_FREQ); | |
| 2254 | + opp_disable(mpu_dev, | |
| 2251 | 2255 | AM33XX_ES2_0_OPPTURBO_FREQ); |
| 2252 | 2256 | opp_disable(mpu_dev, |
| 2253 | 2257 | AM33XX_ES2_0_OPPNITRO_FREQ); |
| 2254 | 2258 | |
| ... | ... | @@ -2256,11 +2260,13 @@ |
| 2256 | 2260 | case AM335X_REV_ES2_1: |
| 2257 | 2261 | /* FALLTHROUGH */ |
| 2258 | 2262 | default: |
| 2259 | - if (voltage_uv <= AM33XX_ES2_1_VDD_MPU_OPP50_UV) { | |
| 2263 | + if (voltage_uv <= AM33XX_ES2_1_VDD_CORE_OPP50_UV) { | |
| 2260 | 2264 | /* |
| 2261 | 2265 | * disable the higher freqs - we dont care about |
| 2262 | 2266 | * the results |
| 2263 | 2267 | */ |
| 2268 | + opp_disable(mpu_dev, | |
| 2269 | + AM33XX_ES2_1_OPP120_FREQ); | |
| 2264 | 2270 | opp_disable(mpu_dev, |
| 2265 | 2271 | AM33XX_ES2_1_OPPTURBO_FREQ); |
| 2266 | 2272 | opp_disable(mpu_dev, |