01 Mar, 2013

2 commits

  • ADC is ideally expected to work at a frequency of 3MHz.
    The present code had a check, which returned error if the frequency
    went below the threshold value. But since AM335x supports various
    working frequencies, this check is not required.
    Now the code just uses the internal ADC clock divider to set the ADC
    frequency w.r.t the sys clock.

    Signed-off-by: Patil, Rachna

    Patil, Rachna
     
  • The code did not have context save done on IRQ register bits
    for the MFD device.
    Also the control register bits after resume were loaded to the
    default value. Now changes have been made to save both IRQ and control
    register bits in MFD core.
    In ADC client the mode in which ADC is operating has to store,
    hence modify the step_config function to pass the current mode.

    Signed-off-by: Patil, Rachna

    Patil, Rachna
     

22 Feb, 2013

1 commit


12 Feb, 2013

3 commits


10 Sep, 2012

1 commit

  • ADC uses steps from the end i.e. from 16 towards 0.
    The current code does not enable steps 15 and 16
    due to which even if steps 15 and 16 are configured
    they do not get applied.
    Due to which junk values were read on these channels.
    Correcting the same.

    Signed-off-by: Patil, Rachna

    Patil, Rachna
     

31 Aug, 2012

3 commits