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Commit b82727ec646578bdd3a6f31f6451f67784874675

Authored by Thomas Gleixner
1 parent efa63c6495
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

m32r: Convert mappi3 irq chip 

Convert the irq chips to the new functions and use proper flow
handlers. handle_level_irq is appropriate.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Hirokazu Takata <takata@linux-m32r.org>
Cc: Paul Mundt <lethal@linux-sh.org>

Showing 1 changed file with 31 additions and 31 deletions Side-by-side Diff

arch/m32r/platforms/mappi3/setup.c
Diff comments   View file @ b82727e
... ... @@ -46,98 +46,98 @@
46 46 outl(data, port);
47 47 }
48 48  
49   -static void mask_and_ack_mappi3(unsigned int irq)
  49 +static void mask_mappi3(struct irq_data *data)
50 50 {
51   - disable_mappi3_irq(irq);
  51 + disable_mappi3_irq(data->irq);
52 52 }
53 53  
54   -static void end_mappi3_irq(unsigned int irq)
  54 +static void unmask_mappi3(struct irq_data *data)
55 55 {
56   - enable_mappi3_irq(irq);
  56 + enable_mappi3_irq(data->irq);
57 57 }
58 58  
59   -static unsigned int startup_mappi3_irq(unsigned int irq)
  59 +static void shutdown_mappi3(struct irq_data *data)
60 60 {
61   - enable_mappi3_irq(irq);
62   - return (0);
63   -}
64   -
65   -static void shutdown_mappi3_irq(unsigned int irq)
66   -{
67 61 unsigned long port;
68 62  
69   - port = irq2port(irq);
  63 + port = irq2port(data->irq);
70 64 outl(M32R_ICUCR_ILEVEL7, port);
71 65 }
72 66  
73   -static struct irq_chip mappi3_irq_type =
74   -{
75   - .name = "MAPPI3-IRQ",
76   - .startup = startup_mappi3_irq,
77   - .shutdown = shutdown_mappi3_irq,
78   - .enable = enable_mappi3_irq,
79   - .disable = disable_mappi3_irq,
80   - .ack = mask_and_ack_mappi3,
81   - .end = end_mappi3_irq
  67 +static struct irq_chip mappi3_irq_type = {
  68 + .name = "MAPPI3-IRQ",
  69 + .irq_shutdown = shutdown_mappi3,
  70 + .irq_mask = mask_mappi3,
  71 + .irq_unmask = unmask_mappi3,
82 72 };
83 73  
84 74 void __init init_IRQ(void)
85 75 {
86 76 #if defined(CONFIG_SMC91X)
87 77 /* INT0 : LAN controller (SMC91111) */
88   - set_irq_chip(M32R_IRQ_INT0, &mappi3_irq_type);
  78 + set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
  79 + handle_level_irq);
89 80 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
90 81 disable_mappi3_irq(M32R_IRQ_INT0);
91 82 #endif /* CONFIG_SMC91X */
92 83  
93 84 /* MFT2 : system timer */
94   - set_irq_chip(M32R_IRQ_MFT2, &mappi3_irq_type);
  85 + set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
  86 + handle_level_irq);
95 87 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
96 88 disable_mappi3_irq(M32R_IRQ_MFT2);
97 89  
98 90 #ifdef CONFIG_SERIAL_M32R_SIO
99 91 /* SIO0_R : uart receive data */
100   - set_irq_chip(M32R_IRQ_SIO0_R, &mappi3_irq_type);
  92 + set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
  93 + handle_level_irq);
101 94 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
102 95 disable_mappi3_irq(M32R_IRQ_SIO0_R);
103 96  
104 97 /* SIO0_S : uart send data */
105   - set_irq_chip(M32R_IRQ_SIO0_S, &mappi3_irq_type);
  98 + set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
  99 + handle_level_irq);
106 100 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
107 101 disable_mappi3_irq(M32R_IRQ_SIO0_S);
108 102 /* SIO1_R : uart receive data */
109   - set_irq_chip(M32R_IRQ_SIO1_R, &mappi3_irq_type);
  103 + set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
  104 + handle_level_irq);
110 105 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
111 106 disable_mappi3_irq(M32R_IRQ_SIO1_R);
112 107  
113 108 /* SIO1_S : uart send data */
114   - set_irq_chip(M32R_IRQ_SIO1_S, &mappi3_irq_type);
  109 + set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
  110 + handle_level_irq);
115 111 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
116 112 disable_mappi3_irq(M32R_IRQ_SIO1_S);
117 113 #endif /* CONFIG_M32R_USE_DBG_CONSOLE */
118 114  
119 115 #if defined(CONFIG_USB)
120 116 /* INT1 : USB Host controller interrupt */
121   - set_irq_chip(M32R_IRQ_INT1, &mappi3_irq_type);
  117 + set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
  118 + handle_level_irq);
122 119 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
123 120 disable_mappi3_irq(M32R_IRQ_INT1);
124 121 #endif /* CONFIG_USB */
125 122  
126 123 /* CFC IREQ */
127   - set_irq_chip(PLD_IRQ_CFIREQ, &mappi3_irq_type);
  124 + set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
  125 + handle_level_irq);
128 126 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
129 127 disable_mappi3_irq(PLD_IRQ_CFIREQ);
130 128  
131 129 #if defined(CONFIG_M32R_CFC)
132 130 /* ICUCR41: CFC Insert & eject */
133   - set_irq_chip(PLD_IRQ_CFC_INSERT, &mappi3_irq_type);
  131 + set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
  132 + handle_level_irq);
134 133 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
135 134 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
136 135  
137 136 #endif /* CONFIG_M32R_CFC */
138 137  
139 138 /* IDE IREQ */
140   - set_irq_chip(PLD_IRQ_IDEIREQ, &mappi3_irq_type);
  139 + set_irq_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
  140 + handle_level_irq);
141 141 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
142 142 disable_mappi3_irq(PLD_IRQ_IDEIREQ);
143 143