13 Apr, 2015
1 commit
10 Apr, 2015
1 commit
-
Update to the SATA PHY initialization. This is needed for SATA detection
to succeed in all configurations.Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8886/
Signed-off-by: Ralf Baechle
08 Apr, 2015
1 commit
-
Signed-off-by: Ralf Baechle
01 Apr, 2015
13 commits
-
Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8896/
Signed-off-by: Ralf Baechle -
The new I2C block in XLP9XX has 4 interrupts, add the mapping for
these in nlm_hal.cSigned-off-by: Subhendu Sekhar Behera
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8897/
Signed-off-by: Ralf Baechle -
Add support for third XHCI port in XLPII processors.
Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8895/
Signed-off-by: Ralf Baechle -
Enabling the SUE bit for core can can result in rare cache errors
which are difficult to track down, so do not enable it. This can
cause a minor performance loss in some tests.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8894/
Signed-off-by: Ralf Baechle -
Core configuration register IFU_BRUB_RESERVE has to be setup to handle
a silicon errata which can result in a CPU hang.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8902/
Signed-off-by: Ralf Baechle -
Change name of xlp_get_dram_map to nlm_get_dram_map to be consistent
with the rest of the functions in the file. Pass the the size of the
array 'dram_map' to the function, and ensure that it does not write
past the end of the array.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8892/
Signed-off-by: Ralf Baechle -
Use the current_cpu_data package field to get the node of the current CPU.
This allows us to remove xlp_cores_per_node and move nlm_threads_per_node()
and nlm_cores_per_node() to netlogic/common.h, which simplifies code.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8889/
Signed-off-by: Ralf Baechle -
commit bda4584cd943 ("MIPS: Support CPU topology files in sysfs")
added topology related macros for all MIPS platforms and commit
bbbf6d8768f5 ("MIPS: NL: Fix nlm_xlp_defconfig build error")
removed most of the contents from mach-netlogic/topology.h.The netlogic specific topology is not needed anymore, we just need
to setup the package field in current_cpu_data.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8888/
Signed-off-by: Ralf Baechle -
Change the PIC frequency calculation to use the register that has the
current configuration. The existing code used the register that is
written to change frequency, which can have an invalid value if the
firmware did not set it up correctly.Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8885/
Signed-off-by: Ralf Baechle -
If the device header of a block is not present, return invalid IRT
value so that we do not program an incorrect offset.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8882/
Signed-off-by: Ralf Baechle -
PRID register should be masked with IMP_MASK to get processor ID.
Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8883/
Signed-off-by: Ralf Baechle -
The variable ref_div is initialized to the correct divisor but not
used in the frequency calculation. This caused incorrect frequency
to be reported when the clock divisor is not 3.Signed-off-by: Qingmin Liu
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8884/
Signed-off-by: Ralf Baechle -
For core 0, the condition of "cpu == bootcpu" is always true, so it
does not wait for other three threads to become ready. Fix this by
using correct check.Signed-off-by: Shanghui Liu
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8881/
Signed-off-by: Ralf Baechle
14 Feb, 2015
1 commit
-
printk and friends can now format bitmaps using '%*pb[l]'. cpumask
and nodemask also provide cpumask_pr_args() and nodemask_pr_args()
respectively which can be used to generate the two printf arguments
necessary to format the specified cpu/nodemask.Signed-off-by: Tejun Heo
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
24 Nov, 2014
2 commits
-
Commits a951440971d0 ("MIPS: Netlogic: Support for XLP3XX on-chip SATA")
and fedfcb1137d2 ("MIPS: Netlogic: XLP9XX on-chip SATA support") added
ahci-init and ahci-init-xlp2 as objects to build when CONFIG_SATA_AHCI
is enabled.If CONFIG_SATA_AHCI is made modular, these two files will also get built
as modules (obj-m), which will result in the following linking failure:ERROR: "nlm_set_pic_extra_ack" [arch/mips/netlogic/xlp/ahci-init.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/ahci-init.ko] undefined!
ERROR: "nlm_nodes" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko] undefined!
ERROR: "nlm_set_pic_extra_ack"
[arch/mips/netlogic/xlp/ahci-init-xlp2.ko] undefined!
ERROR: "xlp_socdev_to_node" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/ahci-init-xlp2.ko]
undefined!Just check whether CONFIG_SATA_AHCI is defined for this build, and if
that is the case, add these objects to the list of built-in object
files.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: ganesanr@broadcom.com
Cc: jchandra@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/7855/
Signed-off-by: Ralf Baechle -
Commit 1004165f346a ("MIPS: Netlogic: USB support for XLP") and then
commit 9eac3591e78b ("MIPS: Netlogic: Add support for USB on XLP2xx")
added usb-init and usb-init-xlp2 as objects to build when CONFIG_USB is
enabled.If CONFIG_USB is made modular, these two files will also get built as
modules (obj-m), which will result in the following linking failure:ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/usb-init.ko] undefined!
ERROR: "nlm_nodes" [arch/mips/netlogic/xlp/usb-init-xlp2.ko] undefined!
ERROR: "nlm_set_pic_extra_ack" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!
ERROR: "xlp_socdev_to_node" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!
ERROR: "nlm_io_base" [arch/mips/netlogic/xlp/usb-init-xlp2.ko]
undefined!Just check whether CONFIG_USB is defined for this build, and if that is
the case, add these objects to the list of built-in object files.Signed-off-by: Florian Fainelli
Cc: linux-mips@linux-mips.org
Cc: ganesanr@broadcom.com
Cc: jchandra@broadcom.com
Patchwork: https://patchwork.linux-mips.org/patch/7854/
Signed-off-by: Ralf Baechle
22 Sep, 2014
1 commit
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Move the Netlogic XLP device-trees to arch/mips/boot/dts/ and update the
Makefiles accordingly. A built-in device-tree is optional, so select
BUILTIN_DTB when it is requested.Signed-off-by: Andrew Bresticker
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: James Hogan
Cc: Paul Burton
Cc: David Daney
Cc: John Crispin
Cc: Jayachandran C
Cc: Qais Yousef
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7560/
Signed-off-by: Ralf Baechle
10 Jun, 2014
1 commit
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Pull MIPS updates from Ralf Baechle:
- three fixes for 3.15 that didn't make it in time
- limited Octeon 3 support.
- paravirtualization support
- improvment to platform support for Netlogix SOCs.
- add support for powering down the Malta eval board in software
- add many instructions to the in-kernel microassembler.
- add support for the BPF JIT.
- minor cleanups of the BCM47xx code.
- large cleanup of math emu code resulting in significant code size
reduction, better readability of the code and more accurate
emulation.
- improvments to the MIPS CPS code.
- support C3 power status for the R4k count/compare clock device.
- improvments to the GIO support for older SGI workstations.
- increase number of supported CPUs to 256; this can be reached on
certain embedded multithreaded ccNUMA configurations.
- various small cleanups, updates and fixes* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (173 commits)
MIPS: IP22/IP28: Improve GIO support
MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX
DEC: Document the R4k MB ASIC mini interrupt controller
DEC: Add self as the maintainer
MIPS: Add microMIPS MSA support.
MIPS: Replace calls to obsolete strict_strto call with kstrto* equivalents.
MIPS: Replace obsolete strict_strto call with kstrto
MIPS: BFP: Simplify code slightly.
MIPS: Call find_vma with the mmap_sem held
MIPS: Fix 'write_msa_##' inline macro.
MIPS: Fix MSA toolchain support detection.
mips: Update the email address of Geert Uytterhoeven
MIPS: Add minimal defconfig for mips_paravirt
MIPS: Enable build for new system 'paravirt'
MIPS: paravirt: Add pci controller for virtio
MIPS: Add code for new system 'paravirt'
MIPS: Add functions for hypervisor call
MIPS: OCTEON: Add OCTEON3 to __get_cpu_type
MIPS: Add function get_ebase_cpunum
MIPS: Add minimal support for OCTEON3 to c-r4k.c
...
30 May, 2014
13 commits
-
The XLP9XX SoC has an on-chip SATA controller with two ports. Add
ahci-init-xlp2.c to initialize the controller, setup the glue logic
registers, fixup PCI quirks and setup interrupt ack logic.Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6913/
Signed-off-by: Ralf Baechle -
XLP3XX includes an on-chip SATA controller with 4 ports. The
controller needs glue logic initialization and PCI fixup before
it can be used with the standard AHCI driver.Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6872/
Signed-off-by: Ralf Baechle -
Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.Signed-off-by: Yonghong Song
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/
Signed-off-by: Ralf Baechle -
Calculate XLP 9XX and 2XX core frequency from the per-core PLL. This
should give the correct value for all board configurations.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6870/
Signed-off-by: Ralf Baechle -
Update PIC frequency calculation for XLP9XX and 2XX processors using
the correct PLL registers. This should work for all possible board
configurations.Signed-off-by: Ganesan Ramalingam
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6876/
Signed-off-by: Ralf Baechle -
Add the compatible property to the PIC entry. Also fix up the nodename
to use the correct address.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6869/
Signed-off-by: Ralf Baechle -
Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor
type.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6868/
Signed-off-by: Ralf Baechle -
Add IRQ to IRT (PIC interupt table index) mapping for SATA, GPIO, NAND
and SPI interfaces on the XLP SoC. Fix offsets for few blocks and add
device IDs for a few blocks.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6911/
Signed-off-by: Ralf Baechle -
The ELPA bit needs to be set in the PAGEGRAIN register to enable
access to >64GB physical address. Update reset.S to do this from
every hardware thread.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6866/
Signed-off-by: Ralf Baechle -
Update thread wakeup function to use scratch registers for saving SP and
RA. Move the register restore code needed for thread 0 to the calling
function. This reduces the size of code copied to the reset vector.Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6910/
Signed-off-by: Ralf Baechle -
Use standard function to print cpumask. Also fixup a typo in the same
file.Signed-off-by: Jayachandran C
Cc: g@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6909/
Signed-off-by: Ralf Baechle -
Warn and return if invalid IRQ is passed to nlm_set_pic_extra_ack.
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6862/
Signed-off-by: Ralf Baechle -
This is needed for nlm_node_present(0) to work on uniprocessor compile.
Signed-off-by: Jayachandran C
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6861/
Signed-off-by: Ralf Baechle
27 May, 2014
1 commit
-
Nothing was using the method and there isn't any need for this hook. This
leaves smp_cpus_done() empty for the moment.As suggested by Paul Bolle .
Signed-off-by: Ralf Baechle
30 Apr, 2014
2 commits
-
Unify the various architectures __dtb_start and __dtb_end definitions
moving them into of_fdt.h.Signed-off-by: Rob Herring
Acked-by: Vineet Gupta
Acked-by: James Hogan
Tested-by: Michal Simek
Cc: Ralf Baechle
Cc: Jonas Bonn
Cc: Chris Zankel
Cc: Max Filippov
Cc: linux-metag@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux@lists.openrisc.net
Cc: linux-xtensa@linux-xtensa.org
Tested-by: Grant Likely
Tested-by: Stephen Chivers -
The existing code is buggy because built-in DTBs are in init memory.
It is also broken because the reserved bootmem was then freed after
unflattening, but the unflattened tree points to data in the flat tree.
Fix this by using the unflatten_and_copy_device_tree function.This removes all accesses to FDT header data by the arch code.
Signed-off-by: Rob Herring
Cc: Ralf Baechle
Cc: linux-mips@linux-mips.org
Tested-by: Grant Likely
31 Jan, 2014
1 commit
-
Pull MIPS updates from Ralf Baechle:
"The most notable new addition inside this pull request is the support
for MIPS's latest and greatest core called "inter/proAptiv". The
patch series describes this core as follows."The interAptiv is a power-efficient multi-core microprocessor
for use in system-on-chip (SoC) applications. The interAptiv combines
a multi-threading pipeline with a coherence manager to deliver improved
computational throughput and power efficiency. The interAptiv can
contain one to four MIPS32R3 interAptiv cores, system level
coherence manager with L2 cache, optional coherent I/O port,
and optional floating point unit."The platform specific patches touch all 3 Broadcom families. It adds
support for the new Broadcom/Netlogix XLP9xx Soc, building a common
BCM63XX SMP kernel for all BCM63XX SoCs regardless of core type/count
and full gpio button/led descriptions for BCM47xx.The rest of the series are cleanups and bug fixes that are MIPS
generic and consist largely of changes that Imgtec/MIPS had published
in their linux-mti-3.10.git stable tree. Random other cleanups and
patches preparing code to be merged in 3.15"* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits)
mips: select ARCH_MIGHT_HAVE_PC_SERIO
mips: delete non-required instances of include
MIPS: KVM: remove shadow_tlb code
MIPS: KVM: use common EHINV aware UNIQUE_ENTRYHI
mips/ide: flush dcache also if icache does not snoop dcache
MIPS: BCM47XX: fix position of cpu_wait disabling
MIPS: BCM63XX: select correct MIPS_L1_CACHE_SHIFT value
MIPS: update MIPS_L1_CACHE_SHIFT based on MIPS_L1_CACHE_SHIFT_
MIPS: introduce MIPS_L1_CACHE_SHIFT_
MIPS: ZBOOT: gather string functions into string.c
arch/mips/pci: don't check resource with devm_ioremap_resource
arch/mips/lantiq/xway: don't check resource with devm_ioremap_resource
bcma: gpio: don't cast u32 to unsigned long
ssb: gpio: add own IRQ domain
MIPS: BCM47XX: fix sparse warnings in board.c
MIPS: BCM47XX: add board detection for Linksys WRT54GS V1
MIPS: BCM47XX: fix detection for some boards
MIPS: BCM47XX: Enable buttons support on SSB
MIPS: BCM47XX: Convert WNDR4500 to new syntax
MIPS: BCM47XX: Use "timer" trigger for status LEDs
...
25 Jan, 2014
2 commits
-
None of these files are actually using any __init type directives
and hence don't need to include . Most are just a
left over from __devinit and __cpuinit removal, or simply due to
code getting copied from one driver to the next.Signed-off-by: Paul Gortmaker
Signed-off-by: John Crispin
Patchwork: http://patchwork.linux-mips.org/patch/6320/ -
Move wakeup to after early console. This will allow us to display error
messages when cores are not woken up. Also reduce the wait time for core
to come up.Signed-off-by: Jayachandran C
Signed-off-by: John Crispin
Patchwork: http://patchwork.linux-mips.org/patch/6303/
