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include/mmc.h
27.6 KB
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/* SPDX-License-Identifier: GPL-2.0+ */ |
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/* |
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* Copyright 2008,2010 Freescale Semiconductor, Inc |
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* Andy Fleming * * Based (loosely) on the Linux code |
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*/ #ifndef _MMC_H_ #define _MMC_H_ |
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#include <linux/list.h> |
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#include <linux/sizes.h> |
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#include <linux/compiler.h> |
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#include <linux/dma-direction.h> |
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#include <part.h> |
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struct bd_info; |
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#if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) #define MMC_SUPPORTS_TUNING #endif #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) #define MMC_SUPPORTS_TUNING #endif |
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/* SD/MMC version bits; 8 flags, 8 major, 8 minor, 8 change */ #define SD_VERSION_SD (1U << 31) #define MMC_VERSION_MMC (1U << 30) #define MAKE_SDMMC_VERSION(a, b, c) \ ((((u32)(a)) << 16) | ((u32)(b) << 8) | (u32)(c)) #define MAKE_SD_VERSION(a, b, c) \ (SD_VERSION_SD | MAKE_SDMMC_VERSION(a, b, c)) #define MAKE_MMC_VERSION(a, b, c) \ (MMC_VERSION_MMC | MAKE_SDMMC_VERSION(a, b, c)) #define EXTRACT_SDMMC_MAJOR_VERSION(x) \ (((u32)(x) >> 16) & 0xff) #define EXTRACT_SDMMC_MINOR_VERSION(x) \ (((u32)(x) >> 8) & 0xff) #define EXTRACT_SDMMC_CHANGE_VERSION(x) \ ((u32)(x) & 0xff) #define SD_VERSION_3 MAKE_SD_VERSION(3, 0, 0) #define SD_VERSION_2 MAKE_SD_VERSION(2, 0, 0) #define SD_VERSION_1_0 MAKE_SD_VERSION(1, 0, 0) #define SD_VERSION_1_10 MAKE_SD_VERSION(1, 10, 0) #define MMC_VERSION_UNKNOWN MAKE_MMC_VERSION(0, 0, 0) #define MMC_VERSION_1_2 MAKE_MMC_VERSION(1, 2, 0) #define MMC_VERSION_1_4 MAKE_MMC_VERSION(1, 4, 0) #define MMC_VERSION_2_2 MAKE_MMC_VERSION(2, 2, 0) #define MMC_VERSION_3 MAKE_MMC_VERSION(3, 0, 0) #define MMC_VERSION_4 MAKE_MMC_VERSION(4, 0, 0) #define MMC_VERSION_4_1 MAKE_MMC_VERSION(4, 1, 0) #define MMC_VERSION_4_2 MAKE_MMC_VERSION(4, 2, 0) #define MMC_VERSION_4_3 MAKE_MMC_VERSION(4, 3, 0) |
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#define MMC_VERSION_4_4 MAKE_MMC_VERSION(4, 4, 0) |
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#define MMC_VERSION_4_41 MAKE_MMC_VERSION(4, 4, 1) #define MMC_VERSION_4_5 MAKE_MMC_VERSION(4, 5, 0) #define MMC_VERSION_5_0 MAKE_MMC_VERSION(5, 0, 0) |
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#define MMC_VERSION_5_1 MAKE_MMC_VERSION(5, 1, 0) |
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#define MMC_CAP(mode) (1 << mode) #define MMC_MODE_HS (MMC_CAP(MMC_HS) | MMC_CAP(SD_HS)) #define MMC_MODE_HS_52MHz MMC_CAP(MMC_HS_52) #define MMC_MODE_DDR_52MHz MMC_CAP(MMC_DDR_52) |
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#define MMC_MODE_HS200 MMC_CAP(MMC_HS_200) |
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#define MMC_MODE_HS400 MMC_CAP(MMC_HS_400) |
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#define MMC_MODE_HS400_ES MMC_CAP(MMC_HS_400_ES) |
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#define MMC_CAP_NONREMOVABLE BIT(14) #define MMC_CAP_NEEDS_POLL BIT(15) #define MMC_CAP_CD_ACTIVE_HIGH BIT(16) |
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#define MMC_MODE_8BIT BIT(30) #define MMC_MODE_4BIT BIT(29) |
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#define MMC_MODE_1BIT BIT(28) |
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#define MMC_MODE_SPI BIT(27) |
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#define SD_DATA_4BIT 0x00040000 |
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#define IS_SD(x) ((x)->version & SD_VERSION_SD) |
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#define IS_MMC(x) ((x)->version & MMC_VERSION_MMC) |
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#define MMC_DATA_READ 1 #define MMC_DATA_WRITE 2 |
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#define MMC_CMD_GO_IDLE_STATE 0 #define MMC_CMD_SEND_OP_COND 1 #define MMC_CMD_ALL_SEND_CID 2 #define MMC_CMD_SET_RELATIVE_ADDR 3 #define MMC_CMD_SET_DSR 4 |
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#define MMC_CMD_SWITCH 6 |
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#define MMC_CMD_SELECT_CARD 7 |
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#define MMC_CMD_SEND_EXT_CSD 8 |
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#define MMC_CMD_SEND_CSD 9 #define MMC_CMD_SEND_CID 10 |
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#define MMC_CMD_STOP_TRANSMISSION 12 |
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#define MMC_CMD_SEND_STATUS 13 #define MMC_CMD_SET_BLOCKLEN 16 #define MMC_CMD_READ_SINGLE_BLOCK 17 #define MMC_CMD_READ_MULTIPLE_BLOCK 18 |
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#define MMC_CMD_SEND_TUNING_BLOCK 19 |
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#define MMC_CMD_SEND_TUNING_BLOCK_HS200 21 |
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#define MMC_CMD_SET_BLOCK_COUNT 23 |
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#define MMC_CMD_WRITE_SINGLE_BLOCK 24 #define MMC_CMD_WRITE_MULTIPLE_BLOCK 25 |
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#define MMC_CMD_ERASE_GROUP_START 35 #define MMC_CMD_ERASE_GROUP_END 36 #define MMC_CMD_ERASE 38 |
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#define MMC_CMD_APP_CMD 55 |
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#define MMC_CMD_SPI_READ_OCR 58 #define MMC_CMD_SPI_CRC_ON_OFF 59 |
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#define MMC_CMD_RES_MAN 62 #define MMC_CMD62_ARG1 0xefac62ec #define MMC_CMD62_ARG2 0xcbaea7 |
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#define SD_CMD_SEND_RELATIVE_ADDR 3 |
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#define SD_CMD_SWITCH_FUNC 6 |
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#define SD_CMD_SEND_IF_COND 8 |
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#define SD_CMD_SWITCH_UHS18V 11 |
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#define SD_CMD_APP_SET_BUS_WIDTH 6 |
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#define SD_CMD_APP_SD_STATUS 13 |
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#define SD_CMD_ERASE_WR_BLK_START 32 #define SD_CMD_ERASE_WR_BLK_END 33 |
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#define SD_CMD_APP_SEND_OP_COND 41 |
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#define SD_CMD_APP_SEND_SCR 51 |
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static inline bool mmc_is_tuning_cmd(uint cmdidx) { |
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if ((cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200) || (cmdidx == MMC_CMD_SEND_TUNING_BLOCK)) |
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return true; return false; } |
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/* SCR definitions in different words */ #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 |
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#define UHS_SDR12_BUS_SPEED 0 #define HIGH_SPEED_BUS_SPEED 1 #define UHS_SDR25_BUS_SPEED 1 #define UHS_SDR50_BUS_SPEED 2 #define UHS_SDR104_BUS_SPEED 3 #define UHS_DDR50_BUS_SPEED 4 #define SD_MODE_UHS_SDR12 BIT(UHS_SDR12_BUS_SPEED) #define SD_MODE_UHS_SDR25 BIT(UHS_SDR25_BUS_SPEED) #define SD_MODE_UHS_SDR50 BIT(UHS_SDR50_BUS_SPEED) #define SD_MODE_UHS_SDR104 BIT(UHS_SDR104_BUS_SPEED) #define SD_MODE_UHS_DDR50 BIT(UHS_DDR50_BUS_SPEED) |
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#define OCR_BUSY 0x80000000 #define OCR_HCS 0x40000000 |
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#define OCR_S18R 0x1000000 |
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#define OCR_VOLTAGE_MASK 0x007FFF80 #define OCR_ACCESS_MODE 0x60000000 |
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#define MMC_ERASE_ARG 0x00000000 #define MMC_SECURE_ERASE_ARG 0x80000000 #define MMC_TRIM_ARG 0x00000001 #define MMC_DISCARD_ARG 0x00000003 #define MMC_SECURE_TRIM1_ARG 0x80000001 #define MMC_SECURE_TRIM2_ARG 0x80008000 |
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#define MMC_STATUS_MASK (~0x0206BF7F) |
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#define MMC_STATUS_SWITCH_ERROR (1 << 7) |
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#define MMC_STATUS_RDY_FOR_DATA (1 << 8) #define MMC_STATUS_CURR_STATE (0xf << 9) |
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#define MMC_STATUS_ERROR (1 << 19) |
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#define MMC_STATE_PRG (7 << 9) |
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#define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ #define MMC_SWITCH_MODE_CMD_SET 0x00 /* Change the command set */ #define MMC_SWITCH_MODE_SET_BITS 0x01 /* Set bits in EXT_CSD byte addressed by index which are 1 in value field */ #define MMC_SWITCH_MODE_CLEAR_BITS 0x02 /* Clear bits in EXT_CSD byte addressed by index, which are 1 in value field */ #define MMC_SWITCH_MODE_WRITE_BYTE 0x03 /* Set target byte to value */ #define SD_SWITCH_CHECK 0 #define SD_SWITCH_SWITCH 1 /* * EXT_CSD fields */ |
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#define EXT_CSD_ENH_START_ADDR 136 /* R/W */ #define EXT_CSD_ENH_SIZE_MULT 140 /* R/W */ |
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#define EXT_CSD_GP_SIZE_MULT 143 /* R/W */ |
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#define EXT_CSD_PARTITION_SETTING 155 /* R/W */ |
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#define EXT_CSD_PARTITIONS_ATTRIBUTE 156 /* R/W */ |
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#define EXT_CSD_MAX_ENH_SIZE_MULT 157 /* R */ |
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#define EXT_CSD_PARTITIONING_SUPPORT 160 /* RO */ |
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#define EXT_CSD_RST_N_FUNCTION 162 /* R/W */ |
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#define EXT_CSD_BKOPS_EN 163 /* R/W & R/W/E */ |
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#define EXT_CSD_WR_REL_PARAM 166 /* R */ #define EXT_CSD_WR_REL_SET 167 /* R/W */ |
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#define EXT_CSD_RPMB_MULT 168 /* RO */ |
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#define EXT_CSD_BOOT_WP 173 /* R/W & R/W/C_P */ |
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#define EXT_CSD_ERASE_GROUP_DEF 175 /* R/W */ |
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#define EXT_CSD_BOOT_BUS_WIDTH 177 |
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#define EXT_CSD_PART_CONF 179 /* R/W */ #define EXT_CSD_BUS_WIDTH 183 /* R/W */ |
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#define EXT_CSD_STROBE_SUPPORT 184 /* R/W */ |
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#define EXT_CSD_HS_TIMING 185 /* R/W */ #define EXT_CSD_REV 192 /* RO */ #define EXT_CSD_CARD_TYPE 196 /* RO */ |
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#define EXT_CSD_PART_SWITCH_TIME 199 /* RO */ |
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#define EXT_CSD_SEC_CNT 212 /* RO, 4 bytes */ |
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#define EXT_CSD_HC_WP_GRP_SIZE 221 /* RO */ |
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#define EXT_CSD_HC_ERASE_GRP_SIZE 224 /* RO */ |
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#define EXT_CSD_BOOT_MULT 226 /* RO */ |
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#define EXT_CSD_GENERIC_CMD6_TIME 248 /* RO */ |
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#define EXT_CSD_BKOPS_SUPPORT 502 /* RO */ |
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/* * EXT_CSD field definitions */ |
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#define EXT_CSD_CMD_SET_NORMAL (1 << 0) #define EXT_CSD_CMD_SET_SECURE (1 << 1) #define EXT_CSD_CMD_SET_CPSECURE (1 << 2) |
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#define EXT_CSD_CARD_TYPE_26 (1 << 0) /* Card can run at 26MHz */ #define EXT_CSD_CARD_TYPE_52 (1 << 1) /* Card can run at 52MHz */ |
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#define EXT_CSD_CARD_TYPE_DDR_1_8V (1 << 2) #define EXT_CSD_CARD_TYPE_DDR_1_2V (1 << 3) #define EXT_CSD_CARD_TYPE_DDR_52 (EXT_CSD_CARD_TYPE_DDR_1_8V \ | EXT_CSD_CARD_TYPE_DDR_1_2V) |
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#define EXT_CSD_CARD_TYPE_HS200_1_8V BIT(4) /* Card can run at 200MHz */ /* SDR mode @1.8V I/O */ #define EXT_CSD_CARD_TYPE_HS200_1_2V BIT(5) /* Card can run at 200MHz */ /* SDR mode @1.2V I/O */ #define EXT_CSD_CARD_TYPE_HS200 (EXT_CSD_CARD_TYPE_HS200_1_8V | \ EXT_CSD_CARD_TYPE_HS200_1_2V) |
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#define EXT_CSD_CARD_TYPE_HS400_1_8V BIT(6) #define EXT_CSD_CARD_TYPE_HS400_1_2V BIT(7) #define EXT_CSD_CARD_TYPE_HS400 (EXT_CSD_CARD_TYPE_HS400_1_8V | \ EXT_CSD_CARD_TYPE_HS400_1_2V) |
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#define EXT_CSD_BUS_WIDTH_1 0 /* Card is in 1 bit mode */ #define EXT_CSD_BUS_WIDTH_4 1 /* Card is in 4 bit mode */ #define EXT_CSD_BUS_WIDTH_8 2 /* Card is in 8 bit mode */ |
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#define EXT_CSD_DDR_BUS_WIDTH_4 5 /* Card is in 4 bit DDR mode */ #define EXT_CSD_DDR_BUS_WIDTH_8 6 /* Card is in 8 bit DDR mode */ |
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#define EXT_CSD_DDR_FLAG BIT(2) /* Flag for DDR mode */ |
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#define EXT_CSD_BUS_WIDTH_STROBE BIT(7) /* Enhanced strobe mode */ |
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#define EXT_CSD_TIMING_LEGACY 0 /* no high speed */ #define EXT_CSD_TIMING_HS 1 /* HS */ |
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#define EXT_CSD_TIMING_HS200 2 /* HS200 */ |
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#define EXT_CSD_TIMING_HS400 3 /* HS400 */ |
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#define EXT_CSD_DRV_STR_SHIFT 4 /* Driver Strength shift */ |
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#define EXT_CSD_BOOT_ACK_ENABLE (1 << 6) #define EXT_CSD_BOOT_PARTITION_ENABLE (1 << 3) #define EXT_CSD_PARTITION_ACCESS_ENABLE (1 << 0) #define EXT_CSD_PARTITION_ACCESS_DISABLE (0 << 0) #define EXT_CSD_BOOT_ACK(x) (x << 6) #define EXT_CSD_BOOT_PART_NUM(x) (x << 3) #define EXT_CSD_PARTITION_ACCESS(x) (x << 0) |
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#define EXT_CSD_EXTRACT_BOOT_ACK(x) (((x) >> 6) & 0x1) #define EXT_CSD_EXTRACT_BOOT_PART(x) (((x) >> 3) & 0x7) #define EXT_CSD_EXTRACT_PARTITION_ACCESS(x) ((x) & 0x7) |
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#define EXT_CSD_BOOT_BUS_WIDTH_MODE(x) (x << 3) #define EXT_CSD_BOOT_BUS_WIDTH_RESET(x) (x << 2) #define EXT_CSD_BOOT_BUS_WIDTH_WIDTH(x) (x) |
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#define EXT_CSD_PARTITION_SETTING_COMPLETED (1 << 0) |
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#define EXT_CSD_ENH_USR (1 << 0) /* user data area is enhanced */ #define EXT_CSD_ENH_GP(x) (1 << ((x)+1)) /* GP part (x+1) is enhanced */ |
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#define EXT_CSD_HS_CTRL_REL (1 << 0) /* host controlled WR_REL_SET */ #define EXT_CSD_WR_DATA_REL_USR (1 << 0) /* user data area WR_REL */ #define EXT_CSD_WR_DATA_REL_GP(x) (1 << ((x)+1)) /* GP part (x+1) WR_REL */ |
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#define R1_ILLEGAL_COMMAND (1 << 22) #define R1_APP_CMD (1 << 5) |
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#define MMC_RSP_PRESENT (1 << 0) |
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#define MMC_RSP_136 (1 << 1) /* 136 bit response */ #define MMC_RSP_CRC (1 << 2) /* expect valid crc */ #define MMC_RSP_BUSY (1 << 3) /* card may send busy */ #define MMC_RSP_OPCODE (1 << 4) /* response contains opcode */ |
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#define MMC_RSP_NONE (0) #define MMC_RSP_R1 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
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#define MMC_RSP_R1b (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE| \ MMC_RSP_BUSY) |
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#define MMC_RSP_R2 (MMC_RSP_PRESENT|MMC_RSP_136|MMC_RSP_CRC) #define MMC_RSP_R3 (MMC_RSP_PRESENT) #define MMC_RSP_R4 (MMC_RSP_PRESENT) #define MMC_RSP_R5 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R6 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) #define MMC_RSP_R7 (MMC_RSP_PRESENT|MMC_RSP_CRC|MMC_RSP_OPCODE) |
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#define MMCPART_NOAVAILABLE (0xff) #define PART_ACCESS_MASK (0x7) #define PART_SUPPORT (0x1) |
c3dbb4f9b mmc: extend mmcin... |
314 |
#define ENHNCD_SUPPORT (0x2) |
1937e5aa3 mmc: Fix erase_gr... |
315 |
#define PART_ENH_ATTRIB (0x1f) |
71f951180 * Fix CONFIG_NET_... |
316 |
|
83dc42271 mmc: Retry some M... |
317 318 |
#define MMC_QUIRK_RETRY_SEND_CID BIT(0) #define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1) |
d4a5fa314 mmc: add addition... |
319 |
#define MMC_QUIRK_RETRY_APP_CMD BIT(2) |
83dc42271 mmc: Retry some M... |
320 |
|
648a4c537 MA-14916-8 [iot] ... |
321 |
#define BOOT1_PWR_WP (0x83) |
aff5d3c83 mmc: Enable signa... |
322 323 |
enum mmc_voltage { MMC_SIGNAL_VOLTAGE_000 = 0, |
bc1e3272f mmc: use the righ... |
324 325 326 |
MMC_SIGNAL_VOLTAGE_120 = 1, MMC_SIGNAL_VOLTAGE_180 = 2, MMC_SIGNAL_VOLTAGE_330 = 4, |
aff5d3c83 mmc: Enable signa... |
327 |
}; |
bc1e3272f mmc: use the righ... |
328 329 330 |
#define MMC_ALL_SIGNAL_VOLTAGE (MMC_SIGNAL_VOLTAGE_120 |\ MMC_SIGNAL_VOLTAGE_180 |\ MMC_SIGNAL_VOLTAGE_330) |
8bfa195e4 mmc: Define a con... |
331 332 |
/* Maximum block size for MMC */ #define MMC_MAX_BLOCK_LEN 512 |
3690d6d66 MMC: APIs to supp... |
333 334 335 336 |
/* The number of MMC physical partitions. These consist of: * boot partitions (2), general purpose partitions (4) in MMC v4.4. */ #define MMC_NUM_BOOT_PARTITION 2 |
91fdabc67 eMMC: add support... |
337 |
#define MMC_PART_RPMB 3 /* RPMB partition number */ |
3690d6d66 MMC: APIs to supp... |
338 |
|
e7ecf7cb5 dm: mmc: Add an M... |
339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 |
/* Driver model support */ /** * struct mmc_uclass_priv - Holds information about a device used by the uclass */ struct mmc_uclass_priv { struct mmc *mmc; }; /** * mmc_get_mmc_dev() - get the MMC struct pointer for a device * * Provided that the device is already probed and ready for use, this value * will be available. * * @dev: Device * @return associated mmc struct pointer if available, else NULL */ struct mmc *mmc_get_mmc_dev(struct udevice *dev); /* End of driver model support */ |
1de97f985 Eliminated arch-s... |
360 361 362 363 364 365 366 367 |
struct mmc_cid { unsigned long psn; unsigned short oid; unsigned char mid; unsigned char prv; unsigned char mdt; char pnm[7]; }; |
272cc70b2 Add MMC Framework |
368 369 370 371 |
struct mmc_cmd { ushort cmdidx; uint resp_type; uint cmdarg; |
0b453ffe2 mmc: fix response... |
372 |
uint response[4]; |
272cc70b2 Add MMC Framework |
373 374 375 376 377 378 379 380 381 382 383 |
}; struct mmc_data { union { char *dest; const char *src; /* src buffers don't get written to */ }; uint flags; uint blocks; uint blocksize; }; |
ab769f227 mmc: Remove ops f... |
384 385 |
/* forward decl. */ struct mmc; |
e7881d85a dm: mmc: Drop CON... |
386 |
#if CONFIG_IS_ENABLED(DM_MMC) |
8ca51e51c dm: mmc: Add a wa... |
387 388 |
struct dm_mmc_ops { /** |
32860bdbc mmc: Add a deferr... |
389 390 391 392 393 394 395 396 |
* deferred_probe() - Some configurations that need to be deferred * to just before enumerating the device * * @dev: Device to init * @return 0 if Ok, -ve if error */ int (*deferred_probe)(struct udevice *dev); /** |
8ca51e51c dm: mmc: Add a wa... |
397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 |
* send_cmd() - Send a command to the MMC device * * @dev: Device to receive the command * @cmd: Command to send * @data: Additional data to send/receive * @return 0 if OK, -ve on error */ int (*send_cmd)(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data); /** * set_ios() - Set the I/O speed/width for an MMC device * * @dev: Device to update * @return 0 if OK, -ve on error */ int (*set_ios)(struct udevice *dev); /** * get_cd() - See whether a card is present * * @dev: Device to check * @return 0 if not present, 1 if present, -ve on error */ int (*get_cd)(struct udevice *dev); /** * get_wp() - See whether a card has write-protect enabled * * @dev: Device to check * @return 0 if write-enabled, 1 if write-protected, -ve on error */ int (*get_wp)(struct udevice *dev); |
ec841209a mmc: Add a execut... |
430 |
|
f99c2efe5 mmc: make UHS and... |
431 |
#ifdef MMC_SUPPORTS_TUNING |
ec841209a mmc: Add a execut... |
432 433 434 435 436 437 438 439 |
/** * execute_tuning() - Start the tuning process * * @dev: Device to start the tuning * @opcode: Command opcode to send * @return 0 if OK, -ve on error */ int (*execute_tuning)(struct udevice *dev, uint opcode); |
f99c2efe5 mmc: make UHS and... |
440 |
#endif |
c10b85d6c mmc: Add support ... |
441 442 443 444 445 446 447 |
/** * wait_dat0() - wait until dat0 is in the target state * (CLK must be running during the wait) * * @dev: Device to check * @state: target state |
6cf8a903c mmc: Rename timeo... |
448 |
* @timeout_us: timeout in us |
c10b85d6c mmc: Add support ... |
449 450 |
* @return 0 if dat0 is in the target state, -ve on error */ |
6cf8a903c mmc: Rename timeo... |
451 |
int (*wait_dat0)(struct udevice *dev, int state, int timeout_us); |
44acd4924 mmc: support hs40... |
452 453 454 455 456 |
#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) /* set_enhanced_strobe() - set HS400 enhanced strobe */ int (*set_enhanced_strobe)(struct udevice *dev); #endif |
3602a56ac mmc: add a driver... |
457 458 459 460 461 462 463 464 465 466 |
/** * host_power_cycle - host specific tasks in power cycle sequence * Called between mmc_power_off() and * mmc_power_on() * * @dev: Device to check * @return 0 if not present, 1 if present, -ve on error */ int (*host_power_cycle)(struct udevice *dev); |
8ca51e51c dm: mmc: Add a wa... |
467 468 469 470 471 472 473 474 475 |
}; #define mmc_get_ops(dev) ((struct dm_mmc_ops *)(dev)->driver->ops) int dm_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, struct mmc_data *data); int dm_mmc_set_ios(struct udevice *dev); int dm_mmc_get_cd(struct udevice *dev); int dm_mmc_get_wp(struct udevice *dev); |
ec841209a mmc: Add a execut... |
476 |
int dm_mmc_execute_tuning(struct udevice *dev, uint opcode); |
6cf8a903c mmc: Rename timeo... |
477 |
int dm_mmc_wait_dat0(struct udevice *dev, int state, int timeout_us); |
3602a56ac mmc: add a driver... |
478 |
int dm_mmc_host_power_cycle(struct udevice *dev); |
32860bdbc mmc: Add a deferr... |
479 |
int dm_mmc_deferred_probe(struct udevice *dev); |
8ca51e51c dm: mmc: Add a wa... |
480 481 482 483 484 |
/* Transition functions for compatibility */ int mmc_set_ios(struct mmc *mmc); int mmc_getcd(struct mmc *mmc); int mmc_getwp(struct mmc *mmc); |
ec841209a mmc: Add a execut... |
485 |
int mmc_execute_tuning(struct mmc *mmc, uint opcode); |
6cf8a903c mmc: Rename timeo... |
486 |
int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us); |
44acd4924 mmc: support hs40... |
487 |
int mmc_set_enhanced_strobe(struct mmc *mmc); |
3602a56ac mmc: add a driver... |
488 |
int mmc_host_power_cycle(struct mmc *mmc); |
32860bdbc mmc: Add a deferr... |
489 |
int mmc_deferred_probe(struct mmc *mmc); |
8ca51e51c dm: mmc: Add a wa... |
490 491 |
#else |
ab769f227 mmc: Remove ops f... |
492 493 494 |
struct mmc_ops { int (*send_cmd)(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data); |
07b0b9c00 mmc: change the s... |
495 |
int (*set_ios)(struct mmc *mmc); |
ab769f227 mmc: Remove ops f... |
496 497 498 |
int (*init)(struct mmc *mmc); int (*getcd)(struct mmc *mmc); int (*getwp)(struct mmc *mmc); |
3602a56ac mmc: add a driver... |
499 |
int (*host_power_cycle)(struct mmc *mmc); |
ab769f227 mmc: Remove ops f... |
500 |
}; |
8ca51e51c dm: mmc: Add a wa... |
501 |
#endif |
ab769f227 mmc: Remove ops f... |
502 |
|
93bfd6167 mmc: Split mmc st... |
503 504 |
struct mmc_config { const char *name; |
e7881d85a dm: mmc: Drop CON... |
505 |
#if !CONFIG_IS_ENABLED(DM_MMC) |
93bfd6167 mmc: Split mmc st... |
506 |
const struct mmc_ops *ops; |
8ca51e51c dm: mmc: Add a wa... |
507 |
#endif |
93bfd6167 mmc: Split mmc st... |
508 509 510 511 512 513 514 |
uint host_caps; uint voltages; uint f_min; uint f_max; uint b_max; unsigned char part_type; }; |
3697e5992 mmc: sd: extracti... |
515 516 517 518 519 |
struct sd_ssr { unsigned int au; /* In sectors */ unsigned int erase_timeout; /* In milliseconds */ unsigned int erase_offset; /* In milliseconds */ }; |
35f9e196f mmc: introduce mm... |
520 521 |
enum bus_mode { MMC_LEGACY, |
35f9e196f mmc: introduce mm... |
522 523 |
MMC_HS, SD_HS, |
f99c2efe5 mmc: make UHS and... |
524 525 |
MMC_HS_52, MMC_DDR_52, |
35f9e196f mmc: introduce mm... |
526 527 528 |
UHS_SDR12, UHS_SDR25, UHS_SDR50, |
35f9e196f mmc: introduce mm... |
529 |
UHS_DDR50, |
f99c2efe5 mmc: make UHS and... |
530 |
UHS_SDR104, |
35f9e196f mmc: introduce mm... |
531 |
MMC_HS_200, |
3dd2626f4 mmc: add HS400 su... |
532 |
MMC_HS_400, |
44acd4924 mmc: support hs40... |
533 |
MMC_HS_400_ES, |
35f9e196f mmc: introduce mm... |
534 535 536 537 |
MMC_MODES_END }; const char *mmc_mode_name(enum bus_mode mode); |
4c9d2aaa7 mmc: Add a functi... |
538 |
void mmc_dump_capabilities(const char *text, uint caps); |
35f9e196f mmc: introduce mm... |
539 |
|
3862b8547 mmc: refactor MMC... |
540 541 |
static inline bool mmc_is_mode_ddr(enum bus_mode mode) { |
f99c2efe5 mmc: make UHS and... |
542 543 544 545 |
if (mode == MMC_DDR_52) return true; #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) else if (mode == UHS_DDR50) |
3862b8547 mmc: refactor MMC... |
546 |
return true; |
f99c2efe5 mmc: make UHS and... |
547 |
#endif |
3dd2626f4 mmc: add HS400 su... |
548 549 550 551 |
#if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) else if (mode == MMC_HS_400) return true; #endif |
44acd4924 mmc: support hs40... |
552 553 554 555 |
#if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT) else if (mode == MMC_HS_400_ES) return true; #endif |
3862b8547 mmc: refactor MMC... |
556 557 558 |
else return false; } |
c10b85d6c mmc: Add support ... |
559 560 561 562 563 564 |
#define UHS_CAPS (MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) | \ MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_SDR104) | \ MMC_CAP(UHS_DDR50)) static inline bool supports_uhs(uint caps) { |
f99c2efe5 mmc: make UHS and... |
565 |
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) |
c10b85d6c mmc: Add support ... |
566 |
return (caps & UHS_CAPS) ? true : false; |
f99c2efe5 mmc: make UHS and... |
567 568 569 |
#else return false; #endif |
c10b85d6c mmc: Add support ... |
570 |
} |
8ca51e51c dm: mmc: Add a wa... |
571 572 573 574 575 576 |
/* * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device * with mmc_get_mmc_dev(). * * TODO struct mmc should be in mmc_private but it's hard to fix right now */ |
272cc70b2 Add MMC Framework |
577 |
struct mmc { |
c4d660d4d dm: mmc: Allow di... |
578 |
#if !CONFIG_IS_ENABLED(BLK) |
272cc70b2 Add MMC Framework |
579 |
struct list_head link; |
33fb211dd dm: mmc: Add supp... |
580 |
#endif |
93bfd6167 mmc: Split mmc st... |
581 |
const struct mmc_config *cfg; /* provided configuration */ |
272cc70b2 Add MMC Framework |
582 |
uint version; |
93bfd6167 mmc: Split mmc st... |
583 |
void *priv; |
bc897b1d4 mmc: enable parti... |
584 |
uint has_init; |
272cc70b2 Add MMC Framework |
585 |
int high_capacity; |
35f678205 mmc: add a new mm... |
586 |
bool clk_disable; /* true if the clock can be turned off */ |
272cc70b2 Add MMC Framework |
587 588 |
uint bus_width; uint clock; |
0d3c85848 mmc: Add a saved_... |
589 |
uint saved_clock; |
aff5d3c83 mmc: Enable signa... |
590 |
enum mmc_voltage signal_voltage; |
272cc70b2 Add MMC Framework |
591 |
uint card_caps; |
04a2ea248 mmc: disable UHS ... |
592 |
uint host_caps; |
272cc70b2 Add MMC Framework |
593 |
uint ocr; |
ab71188ce mmc: add setdsr s... |
594 595 |
uint dsr; uint dsr_imp; |
272cc70b2 Add MMC Framework |
596 597 |
uint scr[2]; uint csd[4]; |
0b453ffe2 mmc: fix response... |
598 |
uint cid[4]; |
272cc70b2 Add MMC Framework |
599 |
ushort rca; |
c3dbb4f9b mmc: extend mmcin... |
600 601 |
u8 part_support; u8 part_attr; |
9e41a00b5 mmc: extend mmcin... |
602 |
u8 wr_rel_set; |
7ca0d3dde mmc: Change 'part... |
603 |
u8 part_config; |
6cf8a903c mmc: Rename timeo... |
604 605 |
u8 gen_cmd6_time; /* units: 10 ms */ u8 part_switch_time; /* units: 10 ms */ |
272cc70b2 Add MMC Framework |
606 |
uint tran_speed; |
35f9e196f mmc: introduce mm... |
607 |
uint legacy_speed; /* speed for the legacy mode provided by the card */ |
272cc70b2 Add MMC Framework |
608 |
uint read_bl_len; |
e6fa5a546 mmc: compile out ... |
609 |
#if CONFIG_IS_ENABLED(MMC_WRITE) |
272cc70b2 Add MMC Framework |
610 |
uint write_bl_len; |
a4ff9f83f mmc: fix erase_gr... |
611 |
uint erase_grp_size; /* in 512-byte sectors */ |
e6fa5a546 mmc: compile out ... |
612 |
#endif |
b7a6e2c9c mmc: remove hc_wp... |
613 |
#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING) |
037dc0ab5 mmc: read the hig... |
614 |
uint hc_wp_grp_size; /* in 512-byte sectors */ |
b7a6e2c9c mmc: remove hc_wp... |
615 |
#endif |
5b2e72f32 mmc: read ssr onl... |
616 |
#if CONFIG_IS_ENABLED(MMC_WRITE) |
3697e5992 mmc: sd: extracti... |
617 |
struct sd_ssr ssr; /* SD status register */ |
5b2e72f32 mmc: read ssr onl... |
618 |
#endif |
272cc70b2 Add MMC Framework |
619 |
u64 capacity; |
f866a46d6 mmc: report capac... |
620 621 622 623 |
u64 capacity_user; u64 capacity_boot; u64 capacity_rpmb; u64 capacity_gp[4]; |
173c06dfc mmc: don't read t... |
624 |
#ifndef CONFIG_SPL_BUILD |
a7f852b68 mmc: read the siz... |
625 626 |
u64 enh_user_start; u64 enh_user_size; |
173c06dfc mmc: don't read t... |
627 |
#endif |
c4d660d4d dm: mmc: Allow di... |
628 |
#if !CONFIG_IS_ENABLED(BLK) |
4101f6879 dm: Drop the bloc... |
629 |
struct blk_desc block_dev; |
33fb211dd dm: mmc: Add supp... |
630 |
#endif |
e95504497 mmc: Split device... |
631 632 633 |
char op_cond_pending; /* 1 if we are waiting on an op_cond command */ char init_in_progress; /* 1 if we have done mmc_start_init() */ char preinit; /* start init as early as possible */ |
786e8f818 mmc: Fix handling... |
634 |
int ddr_mode; |
c4d660d4d dm: mmc: Allow di... |
635 |
#if CONFIG_IS_ENABLED(DM_MMC) |
cffe5d86c dm: mmc: Set up t... |
636 |
struct udevice *dev; /* Device for this MMC controller */ |
06ec045fe mmc: dm: get the ... |
637 638 639 640 |
#if CONFIG_IS_ENABLED(DM_REGULATOR) struct udevice *vmmc_supply; /* Main voltage regulator (Vcc)*/ struct udevice *vqmmc_supply; /* IO voltage regulator (Vccq)*/ #endif |
cffe5d86c dm: mmc: Set up t... |
641 |
#endif |
dfda9d88e mmc: make ext_csd... |
642 |
u8 *ext_csd; |
bc1e3272f mmc: use the righ... |
643 644 |
u32 cardtype; /* cardtype read from the MMC */ enum mmc_voltage current_voltage; |
01298da31 mmc: Change mode ... |
645 646 647 648 649 650 |
enum bus_mode selected_mode; /* mode currently used */ enum bus_mode best_mode; /* best mode is the supported mode with the * highest bandwidth. It may not always be the * operating mode due to limitations when * accessing the boot partitions */ |
83dc42271 mmc: Retry some M... |
651 |
u32 quirks; |
272cc70b2 Add MMC Framework |
652 |
}; |
ac9da0e08 mmc: add API to d... |
653 654 655 656 |
struct mmc_hwpart_conf { struct { uint enh_start; /* in 512-byte sectors */ uint enh_size; /* in 512-byte sectors, if 0 no enh area */ |
8dda5b0e6 mmc: extend the m... |
657 658 |
unsigned wr_rel_change : 1; unsigned wr_rel_set : 1; |
ac9da0e08 mmc: add API to d... |
659 660 661 |
} user; struct { uint size; /* in 512-byte sectors */ |
8dda5b0e6 mmc: extend the m... |
662 663 664 |
unsigned enhanced : 1; unsigned wr_rel_change : 1; unsigned wr_rel_set : 1; |
ac9da0e08 mmc: add API to d... |
665 666 667 668 669 670 671 672 |
} gp_part[4]; }; enum mmc_hwpart_conf_mode { MMC_HWPART_CONF_CHECK, MMC_HWPART_CONF_SET, MMC_HWPART_CONF_COMPLETE, }; |
93bfd6167 mmc: Split mmc st... |
673 |
struct mmc *mmc_create(const struct mmc_config *cfg, void *priv); |
ad27dd5e1 dm: mmc: Add a wa... |
674 675 676 677 678 679 680 681 682 683 684 685 686 687 |
/** * mmc_bind() - Set up a new MMC device ready for probing * * A child block device is bound with the IF_TYPE_MMC interface type. This * allows the device to be used with CONFIG_BLK * * @dev: MMC device to set up * @mmc: MMC struct * @cfg: MMC configuration * @return 0 if OK, -ve on error */ int mmc_bind(struct udevice *dev, struct mmc *mmc, const struct mmc_config *cfg); |
93bfd6167 mmc: Split mmc st... |
688 |
void mmc_destroy(struct mmc *mmc); |
ad27dd5e1 dm: mmc: Add a wa... |
689 690 691 692 693 694 695 696 |
/** * mmc_unbind() - Unbind a MMC device's child block device * * @dev: MMC device * @return 0 if OK, -ve on error */ int mmc_unbind(struct udevice *dev); |
bd602c536 mmc: make <mmc.h>... |
697 |
int mmc_initialize(struct bd_info *bis); |
80f02019e spl: dm_mmc: Init... |
698 |
int mmc_init_device(int num); |
272cc70b2 Add MMC Framework |
699 |
int mmc_init(struct mmc *mmc); |
9815e3ba8 mmc: add a librar... |
700 |
int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error); |
7abff2c3b dm: mmc: update m... |
701 |
|
fceea9926 mmc: Downgrade SD... |
702 703 704 705 706 |
#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) int mmc_deinit(struct mmc *mmc); #endif |
7abff2c3b dm: mmc: update m... |
707 708 709 710 711 712 713 714 |
/** * mmc_of_parse() - Parse the device tree to get the capabilities of the host * * @dev: MMC device * @cfg: MMC configuration * @return 0 if OK, -ve on error */ int mmc_of_parse(struct udevice *dev, struct mmc_config *cfg); |
272cc70b2 Add MMC Framework |
715 |
int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size); |
35f678205 mmc: add a new mm... |
716 717 |
/** |
bc1e3272f mmc: use the righ... |
718 719 720 721 722 723 724 725 |
* mmc_voltage_to_mv() - Convert a mmc_voltage in mV * * @voltage: The mmc_voltage to convert * @return the value in mV if OK, -EINVAL on error (invalid mmc_voltage value) */ int mmc_voltage_to_mv(enum mmc_voltage voltage); /** |
35f678205 mmc: add a new mm... |
726 727 728 729 730 731 732 |
* mmc_set_clock() - change the bus clock * @mmc: MMC struct * @clock: bus frequency in Hz * @disable: flag indicating if the clock must on or off * @return 0 if OK, -ve on error */ int mmc_set_clock(struct mmc *mmc, uint clock, bool disable); |
651171825 mmc: add the MMC_... |
733 734 |
#define MMC_CLK_ENABLE false #define MMC_CLK_DISABLE true |
272cc70b2 Add MMC Framework |
735 |
struct mmc *find_mmc_device(int dev_num); |
89716964d mmc: add function... |
736 |
int mmc_set_dev(int dev_num); |
272cc70b2 Add MMC Framework |
737 |
void print_mmc_devices(char separator); |
46683f3da mmc-uclass: corre... |
738 739 740 741 742 743 |
/** * get_mmc_num() - get the total MMC device number * * @return 0 if there is no MMC device, else the number of devices */ |
ea6ebe217 cmd_mmc: eliminat... |
744 |
int get_mmc_num(void); |
b5b838f1a mmc: Tinification... |
745 |
int mmc_switch_part(struct mmc *mmc, unsigned int part_num); |
ac9da0e08 mmc: add API to d... |
746 747 |
int mmc_hwpart_config(struct mmc *mmc, const struct mmc_hwpart_conf *conf, enum mmc_hwpart_conf_mode mode); |
8ca51e51c dm: mmc: Add a wa... |
748 |
|
e7881d85a dm: mmc: Drop CON... |
749 |
#if !CONFIG_IS_ENABLED(DM_MMC) |
48972d907 mmc: Implement ca... |
750 |
int mmc_getcd(struct mmc *mmc); |
750121c35 mmc: prevent some... |
751 |
int board_mmc_getcd(struct mmc *mmc); |
d23d8d7e0 mmc: add support ... |
752 |
int mmc_getwp(struct mmc *mmc); |
750121c35 mmc: prevent some... |
753 |
int board_mmc_getwp(struct mmc *mmc); |
8ca51e51c dm: mmc: Add a wa... |
754 |
#endif |
ab71188ce mmc: add setdsr s... |
755 |
int mmc_set_dsr(struct mmc *mmc, u16 val); |
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/* Function to change the size of boot partition and rpmb partitions */ int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, unsigned long rpmbsize); |
792970b0a cmd_mmc.c: Add 'p... |
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/* Function to modify the PARTITION_CONFIG field of EXT_CSD */ int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access); |
5a99b9de1 cmd_mmc.c: Add bo... |
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/* Function to modify the BOOT_BUS_WIDTH field of EXT_CSD */ int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode); |
33ace362f mmc: Add 'mmc rst... |
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/* Function to modify the RST_n_FUNCTION field of EXT_CSD */ int mmc_set_rst_n_function(struct mmc *mmc, u8 enable); |
91fdabc67 eMMC: add support... |
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/* Functions to read / write the RPMB partition */ |
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/* Sizes of RPMB data frame */ #define RPMB_SZ_STUFF 196 #define RPMB_SZ_MAC 32 #define RPMB_SZ_DATA 256 #define RPMB_SZ_NONCE 16 /* Structure of RPMB data frame. */ struct s_rpmb { unsigned char stuff[RPMB_SZ_STUFF]; unsigned char mac[RPMB_SZ_MAC]; unsigned char data[RPMB_SZ_DATA]; unsigned char nonce[RPMB_SZ_NONCE]; |
d678bb111 MA-14916-4 [iot] ... |
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unsigned int write_counter; |
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unsigned short address; unsigned short block_count; unsigned short result; unsigned short request; }; |
91fdabc67 eMMC: add support... |
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int mmc_rpmb_set_key(struct mmc *mmc, void *key); int mmc_rpmb_get_counter(struct mmc *mmc, unsigned long *counter); int mmc_rpmb_read(struct mmc *mmc, void *addr, unsigned short blk, unsigned short cnt, unsigned char *key); int mmc_rpmb_write(struct mmc *mmc, void *addr, unsigned short blk, unsigned short cnt, unsigned char *key); |
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/** * mmc_rpmb_route_frames() - route RPMB data frames * @mmc Pointer to a MMC device struct * @req Request data frames * @reqlen Length of data frames in bytes * @rsp Supplied buffer for response data frames * @rsplen Length of supplied buffer for response data frames * * The RPMB data frames are routed to/from some external entity, for * example a Trusted Exectuion Environment in an arm TrustZone protected * secure world. It's expected that it's the external entity who is in * control of the RPMB key. * * Returns 0 on success, < 0 on error. */ int mmc_rpmb_route_frames(struct mmc *mmc, void *req, unsigned long reqlen, void *rsp, unsigned long rsplen); |
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int mmc_rpmb_request(struct mmc *mmc, const struct s_rpmb *s, unsigned int count, bool is_rel_write); int mmc_rpmb_response(struct mmc *mmc, struct s_rpmb *s, unsigned int count, unsigned short expected); |
cd3d48807 mmc: add bkops-en... |
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#ifdef CONFIG_CMD_BKOPS_ENABLE int mmc_set_bkops_enable(struct mmc *mmc); #endif |
e95504497 mmc: Split device... |
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/** * Start device initialization and return immediately; it does not block on |
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* polling OCR (operation condition register) status. Useful for checking * the presence of SD/eMMC when no card detect logic is available. * * @param mmc Pointer to a MMC device struct * @return 0 on success, <0 on error. */ int mmc_get_op_cond(struct mmc *mmc); /** * Start device initialization and return immediately; it does not block on |
e95504497 mmc: Split device... |
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* polling OCR (operation condition register) status. Then you should call * mmc_init, which would block on polling OCR status and complete the device * initializatin. * * @param mmc Pointer to a MMC device struct |
31d950049 mmc: drop mention... |
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* @return 0 on success, <0 on error. |
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*/ int mmc_start_init(struct mmc *mmc); /** * Set preinit flag of mmc device. * * This will cause the device to be pre-inited during mmc_initialize(), * which may save boot time if the device is not accessed until later. * Some eMMC devices take 200-300ms to init, but unfortunately they * must be sent a series of commands to even get them to start preparing * for operation. * * @param mmc Pointer to a MMC device struct * @param preinit preinit flag value */ void mmc_set_preinit(struct mmc *mmc, int preinit); |
8687d5c80 mmc: size optimiz... |
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#ifdef CONFIG_MMC_SPI |
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#define mmc_host_is_spi(mmc) ((mmc)->cfg->host_caps & MMC_MODE_SPI) |
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#else #define mmc_host_is_spi(mmc) 0 #endif |
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|
95de9ab20 mmc: Board-specif... |
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void board_mmc_power_init(void); |
bd602c536 mmc: make <mmc.h>... |
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int board_mmc_init(struct bd_info *bis); int cpu_mmc_init(struct bd_info *bis); |
aeb805558 mmc: add prototyp... |
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int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr); |
43d17c485 env: fix allow to... |
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# ifdef CONFIG_SYS_MMC_ENV_PART extern uint mmc_get_env_part(struct mmc *mmc); # endif |
aa844fe10 mmc: add missing ... |
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int mmc_get_env_dev(void); |
a2018ab0d MLK-18591-3 andro... |
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int mmc_map_to_kernel_blk(int dev_no); |
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|
513e00b64 mmc: When switchi... |
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/* Minimum partition switch timeout in units of 10-milliseconds */ #define MMC_MIN_PART_SWITCH_TIME 30 /* 300 ms */ |
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/* Set block count limit because of 16 bit register limit on some hardware*/ #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 #endif |
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/** * mmc_get_blk_desc() - Get the block descriptor for an MMC device * * @mmc: MMC device * @return block device if found, else NULL */ struct blk_desc *mmc_get_blk_desc(struct mmc *mmc); |
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static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data) { return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE; } |
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#endif /* _MMC_H_ */ |