Blame view
common/cmd_i2c.c
36.9 KB
81a8824f2 Initial revision |
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 |
/* * (C) Copyright 2001 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ /* * I2C Functions similar to the standard memory functions. * * There are several parameters in many of the commands that bear further * explanations: * |
81a8824f2 Initial revision |
30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 |
* {i2c_chip} is the I2C chip address (the first byte sent on the bus). * Each I2C chip on the bus has a unique address. On the I2C data bus, * the address is the upper seven bits and the LSB is the "read/write" * bit. Note that the {i2c_chip} address specified on the command * line is not shifted up: e.g. a typical EEPROM memory chip may have * an I2C address of 0x50, but the data put on the bus will be 0xA0 * for write and 0xA1 for read. This "non shifted" address notation * matches at least half of the data sheets :-/. * * {addr} is the address (or offset) within the chip. Small memory * chips have 8 bit addresses. Large memory chips have 16 bit * addresses. Other memory chips have 9, 10, or 11 bit addresses. * Many non-memory chips have multiple registers and {addr} is used * as the register index. Some non-memory chips have only one register * and therefore don't need any {addr} parameter. * * The default {addr} parameter is one byte (.1) which works well for * memories and registers with 8 bits of address space. * * You can specify the length of the {addr} field with the optional .0, * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are * manipulating a single register device which doesn't use an address * field, use "0.0" for the address and the ".0" length field will * suppress the address in the I2C data stream. This also works for * successive reads using the I2C auto-incrementing memory pointer. * * If you are manipulating a large memory with 2-byte addresses, use * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal). * * Then there are the unfortunate memory chips that spill the most * significant 1, 2, or 3 bits of address into the chip address byte. * This effectively makes one chip (logically) look like 2, 4, or * 8 chips. This is handled (awkwardly) by #defining |
6d0f6bcf3 rename CFG_ macro... |
63 |
* CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the |
81a8824f2 Initial revision |
64 65 66 |
* {addr} field (since .1 is the default, it doesn't actually have to * be specified). Examples: given a memory chip at I2C chip address * 0x50, the following would happen... |
0f89c54be i2c: Update refer... |
67 |
* i2c md 50 0 10 display 16 bytes starting at 0x000 |
81a8824f2 Initial revision |
68 |
* On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd> |
0f89c54be i2c: Update refer... |
69 |
* i2c md 50 100 10 display 16 bytes starting at 0x100 |
81a8824f2 Initial revision |
70 |
* On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd> |
0f89c54be i2c: Update refer... |
71 |
* i2c md 50 210 10 display 16 bytes starting at 0x210 |
81a8824f2 Initial revision |
72 73 74 75 76 77 78 79 80 |
* On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd> * This is awfully ugly. It would be nice if someone would think up * a better way of handling this. * * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de). */ #include <common.h> #include <command.h> |
67b23a322 I2C: adding new "... |
81 |
#include <environment.h> |
81a8824f2 Initial revision |
82 |
#include <i2c.h> |
67b23a322 I2C: adding new "... |
83 |
#include <malloc.h> |
81a8824f2 Initial revision |
84 |
#include <asm/byteorder.h> |
81a8824f2 Initial revision |
85 86 87 88 89 90 91 92 93 94 95 |
/* Display values from last command. * Memory modify remembered values are different from display memory. */ static uchar i2c_dp_last_chip; static uint i2c_dp_last_addr; static uint i2c_dp_last_alen; static uint i2c_dp_last_length = 0x10; static uchar i2c_mm_last_chip; static uint i2c_mm_last_addr; static uint i2c_mm_last_alen; |
bb99ad6d8 Add support for m... |
96 97 98 99 |
/* If only one I2C bus is present, the list of devices to ignore when * the probe command is issued is represented by a 1D array of addresses. * When multiple buses are present, the list is an array of bus-address * pairs. The following macros take care of this */ |
6d0f6bcf3 rename CFG_ macro... |
100 |
#if defined(CONFIG_SYS_I2C_NOPROBES) |
bb99ad6d8 Add support for m... |
101 102 103 104 105 |
#if defined(CONFIG_I2C_MULTI_BUS) static struct { uchar bus; uchar addr; |
6d0f6bcf3 rename CFG_ macro... |
106 |
} i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d8 Add support for m... |
107 108 109 110 111 |
#define GET_BUS_NUM i2c_get_bus_num() #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b)) #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a)) #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr #else /* single bus */ |
6d0f6bcf3 rename CFG_ macro... |
112 |
static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES; |
bb99ad6d8 Add support for m... |
113 114 115 116 117 118 119 |
#define GET_BUS_NUM 0 #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */ #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a)) #define NO_PROBE_ADDR(i) i2c_no_probes[(i)] #endif /* CONFIG_MULTI_BUS */ #define NUM_ELEMENTS_NOPROBE (sizeof(i2c_no_probes)/sizeof(i2c_no_probes[0])) |
81a8824f2 Initial revision |
120 |
#endif |
67b23a322 I2C: adding new "... |
121 122 |
#if defined(CONFIG_I2C_MUX) static I2C_MUX_DEVICE *i2c_mux_devices = NULL; |
6d0f6bcf3 rename CFG_ macro... |
123 |
static int i2c_mux_busid = CONFIG_SYS_MAX_I2C_BUS; |
67b23a322 I2C: adding new "... |
124 125 126 127 |
DECLARE_GLOBAL_DATA_PTR; #endif |
a266fe955 cmd_i2c: moved a ... |
128 |
#define DISP_LINE_LEN 16 |
c649dda53 i2c: add i2c debl... |
129 130 131 132 133 134 135 |
/* implement possible board specific board init */ void __def_i2c_init_board(void) { return; } void i2c_init_board(void) __attribute__((weak, alias("__def_i2c_init_board"))); |
655b34a78 i2c: Create commo... |
136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 |
/* TODO: Implement architecture-specific get/set functions */ unsigned int __def_i2c_get_bus_speed(void) { return CONFIG_SYS_I2C_SPEED; } unsigned int i2c_get_bus_speed(void) __attribute__((weak, alias("__def_i2c_get_bus_speed"))); int __def_i2c_set_bus_speed(unsigned int speed) { if (speed != CONFIG_SYS_I2C_SPEED) return -1; return 0; } int i2c_set_bus_speed(unsigned int) __attribute__((weak, alias("__def_i2c_set_bus_speed"))); |
652e53546 cmd_i2c.c: added ... |
153 |
/* |
2c0dc9902 cmd_i2c: introduc... |
154 |
* get_alen: small parser helper function to get address length |
7a92e53cd CMD_I2C: make ale... |
155 |
* returns the address length |
2c0dc9902 cmd_i2c: introduc... |
156 157 158 159 160 161 162 163 164 165 |
*/ static uint get_alen(char *arg) { int j; int alen; alen = 1; for (j = 0; j < 8; j++) { if (arg[j] == '.') { alen = arg[j+1] - '0'; |
2c0dc9902 cmd_i2c: introduc... |
166 167 168 169 170 171 172 173 |
break; } else if (arg[j] == '\0') break; } return alen; } /* |
652e53546 cmd_i2c.c: added ... |
174 175 176 |
* Syntax: * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr} */ |
54841ab50 Make sure that ar... |
177 |
static int do_i2c_read ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
652e53546 cmd_i2c.c: added ... |
178 179 180 181 |
{ u_char chip; uint devaddr, alen, length; u_char *memaddr; |
652e53546 cmd_i2c.c: added ... |
182 |
|
47e26b1bf cmd_usage(): simp... |
183 |
if (argc != 5) |
4c12eeb8b Convert cmd_usage... |
184 |
return CMD_RET_USAGE; |
652e53546 cmd_i2c.c: added ... |
185 186 187 188 189 190 191 192 193 194 195 |
/* * I2C chip address */ chip = simple_strtoul(argv[1], NULL, 16); /* * I2C data address within the chip. This can be 1 or * 2 bytes long. Some day it might be 3 bytes long :-). */ devaddr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
196 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
197 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
198 |
return CMD_RET_USAGE; |
652e53546 cmd_i2c.c: added ... |
199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 |
/* * Length is the number of objects, not number of bytes. */ length = simple_strtoul(argv[3], NULL, 16); /* * memaddr is the address where to store things in memory */ memaddr = (u_char *)simple_strtoul(argv[4], NULL, 16); if (i2c_read(chip, devaddr, alen, memaddr, length) != 0) { puts ("Error reading the chip. "); return 1; } return 0; } |
4a8cf3382 cmd_i2c: moved mi... |
217 218 219 220 |
/* * Syntax: * i2c md {i2c_chip} {addr}{.0, .1, .2} {len} */ |
54841ab50 Make sure that ar... |
221 |
static int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
222 223 224 225 226 227 228 229 230 231 232 233 |
{ u_char chip; uint addr, alen, length; int j, nbytes, linebytes; /* We use the last specified parameters, unless new ones are * entered. */ chip = i2c_dp_last_chip; addr = i2c_dp_last_addr; alen = i2c_dp_last_alen; length = i2c_dp_last_length; |
47e26b1bf cmd_usage(): simp... |
234 |
if (argc < 3) |
4c12eeb8b Convert cmd_usage... |
235 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
236 237 238 239 240 |
if ((flag & CMD_FLAG_REPEAT) == 0) { /* * New command specified. */ |
81a8824f2 Initial revision |
241 242 243 244 245 246 247 248 249 250 251 |
/* * I2C chip address */ chip = simple_strtoul(argv[1], NULL, 16); /* * I2C data address within the chip. This can be 1 or * 2 bytes long. Some day it might be 3 bytes long :-). */ addr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
252 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
253 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
254 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 |
/* * If another parameter, it is the length to display. * Length is the number of objects, not number of bytes. */ if (argc > 3) length = simple_strtoul(argv[3], NULL, 16); } /* * Print the lines. * * We buffer all read data, so we can make sure data is read only * once. */ nbytes = length; do { unsigned char linebuf[DISP_LINE_LEN]; unsigned char *cp; linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes; |
e857a5bdb mpc83xx: Miscella... |
276 |
if (i2c_read(chip, addr, alen, linebuf, linebytes) != 0) |
4b9206ed5 * Patches by Thom... |
277 278 |
puts ("Error reading the chip. "); |
e857a5bdb mpc83xx: Miscella... |
279 |
else { |
81a8824f2 Initial revision |
280 281 282 283 284 285 |
printf("%04x:", addr); cp = linebuf; for (j=0; j<linebytes; j++) { printf(" %02x", *cp++); addr++; } |
4b9206ed5 * Patches by Thom... |
286 |
puts (" "); |
81a8824f2 Initial revision |
287 288 289 |
cp = linebuf; for (j=0; j<linebytes; j++) { if ((*cp < 0x20) || (*cp > 0x7e)) |
4b9206ed5 * Patches by Thom... |
290 |
puts ("."); |
81a8824f2 Initial revision |
291 292 293 294 |
else printf("%c", *cp); cp++; } |
4b9206ed5 * Patches by Thom... |
295 296 |
putc (' '); |
81a8824f2 Initial revision |
297 298 299 300 301 302 303 304 305 306 307 |
} nbytes -= linebytes; } while (nbytes > 0); i2c_dp_last_chip = chip; i2c_dp_last_addr = addr; i2c_dp_last_alen = alen; i2c_dp_last_length = length; return 0; } |
81a8824f2 Initial revision |
308 309 310 311 |
/* Write (fill) memory * * Syntax: |
0f89c54be i2c: Update refer... |
312 |
* i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}] |
81a8824f2 Initial revision |
313 |
*/ |
54841ab50 Make sure that ar... |
314 |
static int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
315 316 317 318 319 320 |
{ uchar chip; ulong addr; uint alen; uchar byte; int count; |
81a8824f2 Initial revision |
321 |
|
47e26b1bf cmd_usage(): simp... |
322 |
if ((argc < 4) || (argc > 5)) |
4c12eeb8b Convert cmd_usage... |
323 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
324 325 |
/* |
53677ef18 Big white-space c... |
326 327 |
* Chip is always specified. */ |
81a8824f2 Initial revision |
328 329 330 331 332 333 |
chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
334 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
335 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
336 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
337 338 339 340 341 342 343 344 345 |
/* * Value to write is always specified. */ byte = simple_strtoul(argv[3], NULL, 16); /* * Optional count */ |
e857a5bdb mpc83xx: Miscella... |
346 |
if (argc == 5) |
81a8824f2 Initial revision |
347 |
count = simple_strtoul(argv[4], NULL, 16); |
e857a5bdb mpc83xx: Miscella... |
348 |
else |
81a8824f2 Initial revision |
349 |
count = 1; |
81a8824f2 Initial revision |
350 351 |
while (count-- > 0) { |
e857a5bdb mpc83xx: Miscella... |
352 |
if (i2c_write(chip, addr++, alen, &byte, 1) != 0) |
4b9206ed5 * Patches by Thom... |
353 354 |
puts ("Error writing the chip. "); |
81a8824f2 Initial revision |
355 356 357 |
/* * Wait for the write to complete. The write can take * up to 10mSec (we allow a little more time). |
81a8824f2 Initial revision |
358 |
*/ |
d4f5c7289 FRAM memory acces... |
359 360 361 |
/* * No write delay with FRAM devices. */ |
6d0f6bcf3 rename CFG_ macro... |
362 |
#if !defined(CONFIG_SYS_I2C_FRAM) |
81a8824f2 Initial revision |
363 |
udelay(11000); |
d4f5c7289 FRAM memory acces... |
364 |
#endif |
81a8824f2 Initial revision |
365 366 367 368 |
} return (0); } |
81a8824f2 Initial revision |
369 370 371 |
/* Calculate a CRC on memory * * Syntax: |
0f89c54be i2c: Update refer... |
372 |
* i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count} |
81a8824f2 Initial revision |
373 |
*/ |
54841ab50 Make sure that ar... |
374 |
static int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
375 376 377 378 379 380 381 382 |
{ uchar chip; ulong addr; uint alen; int count; uchar byte; ulong crc; ulong err; |
81a8824f2 Initial revision |
383 |
|
47e26b1bf cmd_usage(): simp... |
384 |
if (argc < 4) |
4c12eeb8b Convert cmd_usage... |
385 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
386 387 |
/* |
53677ef18 Big white-space c... |
388 389 |
* Chip is always specified. */ |
81a8824f2 Initial revision |
390 391 392 393 394 395 |
chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
396 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
397 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
398 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
399 400 401 402 403 404 405 406 407 408 409 410 411 |
/* * Count is always specified */ count = simple_strtoul(argv[3], NULL, 16); printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1); /* * CRC a byte at a time. This is going to be slooow, but hey, the * memories are small and slow too so hopefully nobody notices. */ crc = 0; err = 0; |
e857a5bdb mpc83xx: Miscella... |
412 413 |
while (count-- > 0) { if (i2c_read(chip, addr, alen, &byte, 1) != 0) |
81a8824f2 Initial revision |
414 |
err++; |
81a8824f2 Initial revision |
415 416 417 |
crc = crc32 (crc, &byte, 1); addr++; } |
e857a5bdb mpc83xx: Miscella... |
418 |
if (err > 0) |
4b9206ed5 * Patches by Thom... |
419 420 |
puts ("Error reading the chip, "); |
e857a5bdb mpc83xx: Miscella... |
421 |
else |
81a8824f2 Initial revision |
422 423 |
printf ("%08lx ", crc); |
81a8824f2 Initial revision |
424 425 426 |
return 0; } |
81a8824f2 Initial revision |
427 428 429 |
/* Modify memory. * * Syntax: |
0f89c54be i2c: Update refer... |
430 431 |
* i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2} |
81a8824f2 Initial revision |
432 433 434 |
*/ static int |
54841ab50 Make sure that ar... |
435 |
mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
436 437 438 439 440 441 442 |
{ uchar chip; ulong addr; uint alen; ulong data; int size = 1; int nbytes; |
81a8824f2 Initial revision |
443 |
|
47e26b1bf cmd_usage(): simp... |
444 |
if (argc != 3) |
4c12eeb8b Convert cmd_usage... |
445 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 |
#ifdef CONFIG_BOOT_RETRY_TIME reset_cmd_timeout(); /* got a good command to get here */ #endif /* * We use the last specified parameters, unless new ones are * entered. */ chip = i2c_mm_last_chip; addr = i2c_mm_last_addr; alen = i2c_mm_last_alen; if ((flag & CMD_FLAG_REPEAT) == 0) { /* * New command specified. Check for a size specification. * Defaults to byte if no or incorrect specification. */ size = cmd_get_data_size(argv[0], 1); /* |
53677ef18 Big white-space c... |
466 467 |
* Chip is always specified. */ |
81a8824f2 Initial revision |
468 469 470 471 472 473 |
chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
474 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
475 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
476 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
477 478 479 480 481 482 483 484 |
} /* * Print the address, followed by value. Then accept input for * the next value. A non-converted value exits. */ do { printf("%08lx:", addr); |
e857a5bdb mpc83xx: Miscella... |
485 |
if (i2c_read(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed5 * Patches by Thom... |
486 487 488 |
puts (" Error reading the chip, "); |
e857a5bdb mpc83xx: Miscella... |
489 |
else { |
81a8824f2 Initial revision |
490 |
data = cpu_to_be32(data); |
e857a5bdb mpc83xx: Miscella... |
491 |
if (size == 1) |
81a8824f2 Initial revision |
492 |
printf(" %02lx", (data >> 24) & 0x000000FF); |
e857a5bdb mpc83xx: Miscella... |
493 |
else if (size == 2) |
81a8824f2 Initial revision |
494 |
printf(" %04lx", (data >> 16) & 0x0000FFFF); |
e857a5bdb mpc83xx: Miscella... |
495 |
else |
81a8824f2 Initial revision |
496 |
printf(" %08lx", data); |
81a8824f2 Initial revision |
497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 |
} nbytes = readline (" ? "); if (nbytes == 0) { /* * <CR> pressed as only input, don't modify current * location and move to next. */ if (incrflag) addr += size; nbytes = size; #ifdef CONFIG_BOOT_RETRY_TIME reset_cmd_timeout(); /* good enough to not time out */ #endif } #ifdef CONFIG_BOOT_RETRY_TIME |
e857a5bdb mpc83xx: Miscella... |
513 |
else if (nbytes == -2) |
81a8824f2 Initial revision |
514 |
break; /* timed out, exit the command */ |
81a8824f2 Initial revision |
515 516 517 518 519 |
#endif else { char *endp; data = simple_strtoul(console_buffer, &endp, 16); |
e857a5bdb mpc83xx: Miscella... |
520 |
if (size == 1) |
81a8824f2 Initial revision |
521 |
data = data << 24; |
e857a5bdb mpc83xx: Miscella... |
522 |
else if (size == 2) |
81a8824f2 Initial revision |
523 |
data = data << 16; |
81a8824f2 Initial revision |
524 525 526 527 528 529 530 531 532 |
data = be32_to_cpu(data); nbytes = endp - console_buffer; if (nbytes) { #ifdef CONFIG_BOOT_RETRY_TIME /* * good enough to not time out */ reset_cmd_timeout(); #endif |
e857a5bdb mpc83xx: Miscella... |
533 |
if (i2c_write(chip, addr, alen, (uchar *)&data, size) != 0) |
4b9206ed5 * Patches by Thom... |
534 535 |
puts ("Error writing the chip. "); |
6d0f6bcf3 rename CFG_ macro... |
536 537 |
#ifdef CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); |
2535d6027 * Patch by Martin... |
538 |
#endif |
81a8824f2 Initial revision |
539 540 541 542 543 |
if (incrflag) addr += size; } } } while (nbytes); |
0800707b6 mod_i2c_mem() bugfix |
544 545 546 |
i2c_mm_last_chip = chip; i2c_mm_last_addr = addr; i2c_mm_last_alen = alen; |
81a8824f2 Initial revision |
547 548 549 550 551 552 |
return 0; } /* * Syntax: |
0f89c54be i2c: Update refer... |
553 |
* i2c probe {addr}{.0, .1, .2} |
81a8824f2 Initial revision |
554 |
*/ |
54841ab50 Make sure that ar... |
555 |
static int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
556 557 |
{ int j; |
6d0f6bcf3 rename CFG_ macro... |
558 |
#if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f2 Initial revision |
559 |
int k, skip; |
bb99ad6d8 Add support for m... |
560 561 |
uchar bus = GET_BUS_NUM; #endif /* NOPROBES */ |
81a8824f2 Initial revision |
562 |
|
4b9206ed5 * Patches by Thom... |
563 |
puts ("Valid chip addresses:"); |
e857a5bdb mpc83xx: Miscella... |
564 |
for (j = 0; j < 128; j++) { |
6d0f6bcf3 rename CFG_ macro... |
565 |
#if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f2 Initial revision |
566 |
skip = 0; |
e857a5bdb mpc83xx: Miscella... |
567 568 |
for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) { |
81a8824f2 Initial revision |
569 570 571 572 573 574 575 |
skip = 1; break; } } if (skip) continue; #endif |
e857a5bdb mpc83xx: Miscella... |
576 |
if (i2c_probe(j) == 0) |
81a8824f2 Initial revision |
577 |
printf(" %02X", j); |
81a8824f2 Initial revision |
578 |
} |
4b9206ed5 * Patches by Thom... |
579 580 |
putc (' '); |
81a8824f2 Initial revision |
581 |
|
6d0f6bcf3 rename CFG_ macro... |
582 |
#if defined(CONFIG_SYS_I2C_NOPROBES) |
81a8824f2 Initial revision |
583 |
puts ("Excluded chip addresses:"); |
e857a5bdb mpc83xx: Miscella... |
584 585 |
for (k=0; k < NUM_ELEMENTS_NOPROBE; k++) { if (COMPARE_BUS(bus,k)) |
bb99ad6d8 Add support for m... |
586 587 |
printf(" %02X", NO_PROBE_ADDR(k)); } |
4b9206ed5 * Patches by Thom... |
588 589 |
putc (' '); |
81a8824f2 Initial revision |
590 591 592 593 |
#endif return 0; } |
81a8824f2 Initial revision |
594 595 |
/* * Syntax: |
0f89c54be i2c: Update refer... |
596 |
* i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}] |
81a8824f2 Initial revision |
597 598 599 |
* {length} - Number of bytes to read * {delay} - A DECIMAL number and defaults to 1000 uSec */ |
54841ab50 Make sure that ar... |
600 |
static int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
601 602 603 604 605 606 607 |
{ u_char chip; ulong alen; uint addr; uint length; u_char bytes[16]; int delay; |
81a8824f2 Initial revision |
608 |
|
47e26b1bf cmd_usage(): simp... |
609 |
if (argc < 3) |
4c12eeb8b Convert cmd_usage... |
610 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
611 612 613 614 615 616 617 618 619 620 |
/* * Chip is always specified. */ chip = simple_strtoul(argv[1], NULL, 16); /* * Address is always specified. */ addr = simple_strtoul(argv[2], NULL, 16); |
2c0dc9902 cmd_i2c: introduc... |
621 |
alen = get_alen(argv[2]); |
7a92e53cd CMD_I2C: make ale... |
622 |
if (alen > 3) |
4c12eeb8b Convert cmd_usage... |
623 |
return CMD_RET_USAGE; |
81a8824f2 Initial revision |
624 625 626 627 628 629 |
/* * Length is the number of objects, not number of bytes. */ length = 1; length = simple_strtoul(argv[3], NULL, 16); |
e857a5bdb mpc83xx: Miscella... |
630 |
if (length > sizeof(bytes)) |
81a8824f2 Initial revision |
631 |
length = sizeof(bytes); |
81a8824f2 Initial revision |
632 633 634 635 636 |
/* * The delay time (uSec) is optional. */ delay = 1000; |
e857a5bdb mpc83xx: Miscella... |
637 |
if (argc > 3) |
81a8824f2 Initial revision |
638 |
delay = simple_strtoul(argv[4], NULL, 10); |
81a8824f2 Initial revision |
639 640 641 |
/* * Run the loop... */ |
e857a5bdb mpc83xx: Miscella... |
642 643 |
while (1) { if (i2c_read(chip, addr, alen, bytes, length) != 0) |
4b9206ed5 * Patches by Thom... |
644 645 |
puts ("Error reading the chip. "); |
81a8824f2 Initial revision |
646 647 648 649 650 651 |
udelay(delay); } /* NOTREACHED */ return 0; } |
81a8824f2 Initial revision |
652 653 654 655 |
/* * The SDRAM command is separately configured because many * (most?) embedded boards don't use SDRAM DIMMs. */ |
c76fe4742 common/cmd_[i-n]*... |
656 |
#if defined(CONFIG_CMD_SDRAM) |
632de0672 Refactor code for... |
657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 |
static void print_ddr2_tcyc (u_char const b) { printf ("%d.", (b >> 4) & 0x0F); switch (b & 0x0F) { case 0x0: case 0x1: case 0x2: case 0x3: case 0x4: case 0x5: case 0x6: case 0x7: case 0x8: case 0x9: printf ("%d ns ", b & 0x0F); break; case 0xA: puts ("25 ns "); break; case 0xB: puts ("33 ns "); break; case 0xC: puts ("66 ns "); break; case 0xD: puts ("75 ns "); break; default: puts ("?? ns "); break; } } static void decode_bits (u_char const b, char const *str[], int const do_once) { u_char mask; for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) { if (b & mask) { puts (*str); if (do_once) return; } } } |
81a8824f2 Initial revision |
709 710 711 |
/* * Syntax: |
0f89c54be i2c: Update refer... |
712 |
* i2c sdram {i2c_chip} |
81a8824f2 Initial revision |
713 |
*/ |
54841ab50 Make sure that ar... |
714 |
static int do_sdram (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
81a8824f2 Initial revision |
715 |
{ |
632de0672 Refactor code for... |
716 |
enum { unknown, EDO, SDRAM, DDR2 } type; |
81a8824f2 Initial revision |
717 718 719 720 |
u_char chip; u_char data[128]; u_char cksum; int j; |
632de0672 Refactor code for... |
721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 |
static const char *decode_CAS_DDR2[] = { " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD" }; static const char *decode_CAS_default[] = { " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1" }; static const char *decode_CS_WE_default[] = { " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0" }; static const char *decode_byte21_default[] = { " TBD (bit 7) ", " Redundant row address ", " Differential clock input ", " Registerd DQMB inputs ", " Buffered DQMB inputs ", " On-card PLL ", " Registered address/control lines ", " Buffered address/control lines " }; static const char *decode_byte22_DDR2[] = { " TBD (bit 7) ", " TBD (bit 6) ", " TBD (bit 5) ", " TBD (bit 4) ", " TBD (bit 3) ", " Supports partial array self refresh ", " Supports 50 ohm ODT ", " Supports weak driver " }; static const char *decode_row_density_DDR2[] = { "512 MiB", "256 MiB", "128 MiB", "16 GiB", "8 GiB", "4 GiB", "2 GiB", "1 GiB" }; static const char *decode_row_density_default[] = { "512 MiB", "256 MiB", "128 MiB", "64 MiB", "32 MiB", "16 MiB", "8 MiB", "4 MiB" }; |
47e26b1bf cmd_usage(): simp... |
780 |
if (argc < 2) |
4c12eeb8b Convert cmd_usage... |
781 |
return CMD_RET_USAGE; |
47e26b1bf cmd_usage(): simp... |
782 |
|
81a8824f2 Initial revision |
783 784 |
/* * Chip is always specified. |
632de0672 Refactor code for... |
785 786 |
*/ chip = simple_strtoul (argv[1], NULL, 16); |
81a8824f2 Initial revision |
787 |
|
632de0672 Refactor code for... |
788 |
if (i2c_read (chip, 0, 1, data, sizeof (data)) != 0) { |
4b9206ed5 * Patches by Thom... |
789 790 |
puts ("No SDRAM Serial Presence Detect found. "); |
81a8824f2 Initial revision |
791 792 793 794 795 796 797 |
return 1; } cksum = 0; for (j = 0; j < 63; j++) { cksum += data[j]; } |
e857a5bdb mpc83xx: Miscella... |
798 |
if (cksum != data[63]) { |
81a8824f2 Initial revision |
799 800 |
printf ("WARNING: Configuration data checksum failure: " |
632de0672 Refactor code for... |
801 802 |
" is 0x%02x, calculated 0x%02x ", data[63], cksum); |
81a8824f2 Initial revision |
803 |
} |
632de0672 Refactor code for... |
804 805 |
printf ("SPD data revision %d.%d ", |
81a8824f2 Initial revision |
806 |
(data[62] >> 4) & 0x0F, data[62] & 0x0F); |
632de0672 Refactor code for... |
807 808 809 810 |
printf ("Bytes used 0x%02X ", data[0]); printf ("Serial memory size 0x%02X ", 1 << data[1]); |
4b9206ed5 * Patches by Thom... |
811 |
puts ("Memory type "); |
632de0672 Refactor code for... |
812 |
switch (data[2]) { |
0df6b8446 Fix "i2c sdram" c... |
813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 |
case 2: type = EDO; puts ("EDO "); break; case 4: type = SDRAM; puts ("SDRAM "); break; case 8: type = DDR2; puts ("DDR2 "); break; default: type = unknown; puts ("unknown "); break; |
81a8824f2 Initial revision |
833 |
} |
632de0672 Refactor code for... |
834 |
|
4b9206ed5 * Patches by Thom... |
835 |
puts ("Row address bits "); |
e857a5bdb mpc83xx: Miscella... |
836 |
if ((data[3] & 0x00F0) == 0) |
632de0672 Refactor code for... |
837 838 |
printf ("%d ", data[3] & 0x0F); |
e857a5bdb mpc83xx: Miscella... |
839 |
else |
632de0672 Refactor code for... |
840 841 |
printf ("%d/%d ", data[3] & 0x0F, (data[3] >> 4) & 0x0F); |
4b9206ed5 * Patches by Thom... |
842 |
puts ("Column address bits "); |
e857a5bdb mpc83xx: Miscella... |
843 |
if ((data[4] & 0x00F0) == 0) |
632de0672 Refactor code for... |
844 845 |
printf ("%d ", data[4] & 0x0F); |
e857a5bdb mpc83xx: Miscella... |
846 |
else |
632de0672 Refactor code for... |
847 848 |
printf ("%d/%d ", data[4] & 0x0F, (data[4] >> 4) & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
849 850 851 |
switch (type) { case DDR2: |
632de0672 Refactor code for... |
852 853 854 |
printf ("Number of ranks %d ", (data[5] & 0x07) + 1); |
0df6b8446 Fix "i2c sdram" c... |
855 856 |
break; default: |
632de0672 Refactor code for... |
857 858 |
printf ("Module rows %d ", data[5]); |
0df6b8446 Fix "i2c sdram" c... |
859 860 861 862 863 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
864 865 |
printf ("Module data width %d bits ", data[6]); |
0df6b8446 Fix "i2c sdram" c... |
866 867 |
break; default: |
632de0672 Refactor code for... |
868 869 870 |
printf ("Module data width %d bits ", (data[7] << 8) | data[6]); |
0df6b8446 Fix "i2c sdram" c... |
871 872 |
break; } |
4b9206ed5 * Patches by Thom... |
873 |
puts ("Interface signal levels "); |
81a8824f2 Initial revision |
874 |
switch(data[8]) { |
0df6b8446 Fix "i2c sdram" c... |
875 876 |
case 0: puts ("TTL 5.0 V "); break; |
4b9206ed5 * Patches by Thom... |
877 878 |
case 1: puts ("LVTTL "); break; |
0df6b8446 Fix "i2c sdram" c... |
879 880 881 882 883 884 885 886 |
case 2: puts ("HSTL 1.5 V "); break; case 3: puts ("SSTL 3.3 V "); break; case 4: puts ("SSTL 2.5 V "); break; case 5: puts ("SSTL 1.8 V "); break; |
4b9206ed5 * Patches by Thom... |
887 888 |
default: puts ("unknown "); break; |
81a8824f2 Initial revision |
889 |
} |
0df6b8446 Fix "i2c sdram" c... |
890 891 892 |
switch (type) { case DDR2: |
632de0672 Refactor code for... |
893 894 |
printf ("SDRAM cycle time "); print_ddr2_tcyc (data[9]); |
0df6b8446 Fix "i2c sdram" c... |
895 896 |
break; default: |
632de0672 Refactor code for... |
897 898 899 |
printf ("SDRAM cycle time %d.%d ns ", (data[9] >> 4) & 0x0F, data[9] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
900 901 902 903 904 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
905 906 907 |
printf ("SDRAM access time 0.%d%d ns ", (data[10] >> 4) & 0x0F, data[10] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
908 909 |
break; default: |
632de0672 Refactor code for... |
910 911 912 |
printf ("SDRAM access time %d.%d ns ", (data[10] >> 4) & 0x0F, data[10] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
913 914 |
break; } |
4b9206ed5 * Patches by Thom... |
915 |
puts ("EDC configuration "); |
632de0672 Refactor code for... |
916 |
switch (data[11]) { |
4b9206ed5 * Patches by Thom... |
917 918 919 920 921 922 923 924 |
case 0: puts ("None "); break; case 1: puts ("Parity "); break; case 2: puts ("ECC "); break; default: puts ("unknown "); break; |
81a8824f2 Initial revision |
925 |
} |
632de0672 Refactor code for... |
926 |
|
e857a5bdb mpc83xx: Miscella... |
927 |
if ((data[12] & 0x80) == 0) |
4b9206ed5 * Patches by Thom... |
928 |
puts ("No self refresh, rate "); |
e857a5bdb mpc83xx: Miscella... |
929 |
else |
4b9206ed5 * Patches by Thom... |
930 |
puts ("Self refresh, rate "); |
632de0672 Refactor code for... |
931 |
|
81a8824f2 Initial revision |
932 |
switch(data[12] & 0x7F) { |
632de0672 Refactor code for... |
933 934 935 936 937 938 939 940 941 942 943 944 |
case 0: puts ("15.625 us "); break; case 1: puts ("3.9 us "); break; case 2: puts ("7.8 us "); break; case 3: puts ("31.3 us "); break; case 4: puts ("62.5 us "); break; case 5: puts ("125 us "); break; |
4b9206ed5 * Patches by Thom... |
945 946 |
default: puts ("unknown "); break; |
81a8824f2 Initial revision |
947 |
} |
0df6b8446 Fix "i2c sdram" c... |
948 949 950 |
switch (type) { case DDR2: |
632de0672 Refactor code for... |
951 952 |
printf ("SDRAM width (primary) %d ", data[13]); |
0df6b8446 Fix "i2c sdram" c... |
953 954 |
break; default: |
632de0672 Refactor code for... |
955 956 |
printf ("SDRAM width (primary) %d ", data[13] & 0x7F); |
0df6b8446 Fix "i2c sdram" c... |
957 |
if ((data[13] & 0x80) != 0) { |
632de0672 Refactor code for... |
958 959 960 |
printf (" (second bank) %d ", 2 * (data[13] & 0x7F)); |
0df6b8446 Fix "i2c sdram" c... |
961 962 963 964 965 966 967 |
} break; } switch (type) { case DDR2: if (data[14] != 0) |
632de0672 Refactor code for... |
968 969 |
printf ("EDC width %d ", data[14]); |
0df6b8446 Fix "i2c sdram" c... |
970 971 972 |
break; default: if (data[14] != 0) { |
632de0672 Refactor code for... |
973 974 975 |
printf ("EDC width %d ", data[14] & 0x7F); |
0df6b8446 Fix "i2c sdram" c... |
976 977 |
if ((data[14] & 0x80) != 0) { |
632de0672 Refactor code for... |
978 979 980 |
printf (" (second bank) %d ", 2 * (data[14] & 0x7F)); |
0df6b8446 Fix "i2c sdram" c... |
981 982 983 |
} } break; |
81a8824f2 Initial revision |
984 |
} |
0df6b8446 Fix "i2c sdram" c... |
985 |
|
632de0672 Refactor code for... |
986 987 988 989 |
if (DDR2 != type) { printf ("Min clock delay, back-to-back random column addresses " "%d ", data[15]); |
0df6b8446 Fix "i2c sdram" c... |
990 |
} |
4b9206ed5 * Patches by Thom... |
991 992 993 994 995 996 997 998 |
puts ("Burst length(s) "); if (data[16] & 0x80) puts (" Page"); if (data[16] & 0x08) puts (" 8"); if (data[16] & 0x04) puts (" 4"); if (data[16] & 0x02) puts (" 2"); if (data[16] & 0x01) puts (" 1"); putc (' '); |
632de0672 Refactor code for... |
999 1000 |
printf ("Number of banks %d ", data[17]); |
0df6b8446 Fix "i2c sdram" c... |
1001 1002 1003 1004 |
switch (type) { case DDR2: puts ("CAS latency(s) "); |
632de0672 Refactor code for... |
1005 |
decode_bits (data[18], decode_CAS_DDR2, 0); |
0df6b8446 Fix "i2c sdram" c... |
1006 1007 1008 1009 1010 |
putc (' '); break; default: puts ("CAS latency(s) "); |
632de0672 Refactor code for... |
1011 |
decode_bits (data[18], decode_CAS_default, 0); |
0df6b8446 Fix "i2c sdram" c... |
1012 1013 1014 1015 1016 1017 1018 |
putc (' '); break; } if (DDR2 != type) { puts ("CS latency(s) "); |
632de0672 Refactor code for... |
1019 |
decode_bits (data[19], decode_CS_WE_default, 0); |
0df6b8446 Fix "i2c sdram" c... |
1020 1021 1022 1023 1024 1025 |
putc (' '); } if (DDR2 != type) { puts ("WE latency(s) "); |
632de0672 Refactor code for... |
1026 |
decode_bits (data[20], decode_CS_WE_default, 0); |
0df6b8446 Fix "i2c sdram" c... |
1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 |
putc (' '); } switch (type) { case DDR2: puts ("Module attributes: "); if (data[21] & 0x80) puts (" TBD (bit 7) "); if (data[21] & 0x40) puts (" Analysis probe installed "); if (data[21] & 0x20) puts (" TBD (bit 5) "); if (data[21] & 0x10) puts (" FET switch external enable "); |
632de0672 Refactor code for... |
1047 1048 |
printf (" %d PLLs on DIMM ", (data[21] >> 2) & 0x03); |
0df6b8446 Fix "i2c sdram" c... |
1049 |
if (data[20] & 0x11) { |
632de0672 Refactor code for... |
1050 1051 1052 |
printf (" %d active registers on DIMM ", (data[21] & 0x03) + 1); |
0df6b8446 Fix "i2c sdram" c... |
1053 1054 1055 1056 1057 1058 1059 1060 |
} break; default: puts ("Module attributes: "); if (!data[21]) puts (" (none) "); |
632de0672 Refactor code for... |
1061 1062 |
else decode_bits (data[21], decode_byte21_default, 0); |
0df6b8446 Fix "i2c sdram" c... |
1063 1064 1065 1066 1067 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1068 |
decode_bits (data[22], decode_byte22_DDR2, 0); |
0df6b8446 Fix "i2c sdram" c... |
1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 |
break; default: puts ("Device attributes: "); if (data[22] & 0x80) puts (" TBD (bit 7) "); if (data[22] & 0x40) puts (" TBD (bit 6) "); if (data[22] & 0x20) puts (" Upper Vcc tolerance 5% "); else puts (" Upper Vcc tolerance 10% "); if (data[22] & 0x10) puts (" Lower Vcc tolerance 5% "); else puts (" Lower Vcc tolerance 10% "); if (data[22] & 0x08) puts (" Supports write1/read burst "); if (data[22] & 0x04) puts (" Supports precharge all "); if (data[22] & 0x02) puts (" Supports auto precharge "); if (data[22] & 0x01) puts (" Supports early RAS# precharge "); break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1098 1099 |
printf ("SDRAM cycle time (2nd highest CAS latency) "); print_ddr2_tcyc (data[23]); |
0df6b8446 Fix "i2c sdram" c... |
1100 1101 |
break; default: |
632de0672 Refactor code for... |
1102 1103 1104 |
printf ("SDRAM cycle time (2nd highest CAS latency) %d." "%d ns ", (data[23] >> 4) & 0x0F, data[23] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1105 1106 1107 1108 1109 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1110 1111 1112 |
printf ("SDRAM access from clock (2nd highest CAS latency) 0." "%d%d ns ", (data[24] >> 4) & 0x0F, data[24] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1113 1114 |
break; default: |
632de0672 Refactor code for... |
1115 1116 1117 |
printf ("SDRAM access from clock (2nd highest CAS latency) %d." "%d ns ", (data[24] >> 4) & 0x0F, data[24] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1118 1119 1120 1121 1122 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1123 1124 |
printf ("SDRAM cycle time (3rd highest CAS latency) "); print_ddr2_tcyc (data[25]); |
0df6b8446 Fix "i2c sdram" c... |
1125 1126 |
break; default: |
632de0672 Refactor code for... |
1127 1128 1129 |
printf ("SDRAM cycle time (3rd highest CAS latency) %d." "%d ns ", (data[25] >> 4) & 0x0F, data[25] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1130 1131 1132 1133 1134 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1135 1136 1137 |
printf ("SDRAM access from clock (3rd highest CAS latency) 0." "%d%d ns ", (data[26] >> 4) & 0x0F, data[26] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1138 1139 |
break; default: |
632de0672 Refactor code for... |
1140 1141 1142 |
printf ("SDRAM access from clock (3rd highest CAS latency) %d." "%d ns ", (data[26] >> 4) & 0x0F, data[26] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1143 1144 1145 1146 1147 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1148 1149 1150 |
printf ("Minimum row precharge %d.%02d ns ", (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03)); |
0df6b8446 Fix "i2c sdram" c... |
1151 1152 |
break; default: |
632de0672 Refactor code for... |
1153 1154 |
printf ("Minimum row precharge %d ns ", data[27]); |
0df6b8446 Fix "i2c sdram" c... |
1155 1156 1157 1158 1159 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1160 1161 1162 |
printf ("Row active to row active min %d.%02d ns ", (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03)); |
0df6b8446 Fix "i2c sdram" c... |
1163 1164 |
break; default: |
632de0672 Refactor code for... |
1165 1166 |
printf ("Row active to row active min %d ns ", data[28]); |
0df6b8446 Fix "i2c sdram" c... |
1167 1168 1169 1170 1171 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1172 1173 1174 |
printf ("RAS to CAS delay min %d.%02d ns ", (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03)); |
0df6b8446 Fix "i2c sdram" c... |
1175 1176 |
break; default: |
632de0672 Refactor code for... |
1177 1178 |
printf ("RAS to CAS delay min %d ns ", data[29]); |
0df6b8446 Fix "i2c sdram" c... |
1179 1180 |
break; } |
632de0672 Refactor code for... |
1181 1182 |
printf ("Minimum RAS pulse width %d ns ", data[30]); |
0df6b8446 Fix "i2c sdram" c... |
1183 1184 1185 |
switch (type) { case DDR2: |
632de0672 Refactor code for... |
1186 1187 1188 1189 |
puts ("Density of each row "); decode_bits (data[31], decode_row_density_DDR2, 1); putc (' '); |
0df6b8446 Fix "i2c sdram" c... |
1190 1191 |
break; default: |
632de0672 Refactor code for... |
1192 1193 1194 1195 |
puts ("Density of each row "); decode_bits (data[31], decode_row_density_default, 1); putc (' '); |
0df6b8446 Fix "i2c sdram" c... |
1196 1197 1198 1199 1200 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1201 |
puts ("Command and Address setup "); |
0df6b8446 Fix "i2c sdram" c... |
1202 |
if (data[32] >= 0xA0) { |
632de0672 Refactor code for... |
1203 1204 1205 |
printf ("1.%d%d ns ", ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1206 |
} else { |
632de0672 Refactor code for... |
1207 1208 1209 |
printf ("0.%d%d ns ", ((data[32] >> 4) & 0x0F), data[32] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1210 1211 1212 |
} break; default: |
632de0672 Refactor code for... |
1213 1214 1215 1216 |
printf ("Command and Address setup %c%d.%d ns ", (data[32] & 0x80) ? '-' : '+', (data[32] >> 4) & 0x07, data[32] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1217 1218 1219 1220 1221 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1222 |
puts ("Command and Address hold "); |
0df6b8446 Fix "i2c sdram" c... |
1223 |
if (data[33] >= 0xA0) { |
632de0672 Refactor code for... |
1224 1225 1226 |
printf ("1.%d%d ns ", ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1227 |
} else { |
632de0672 Refactor code for... |
1228 1229 1230 |
printf ("0.%d%d ns ", ((data[33] >> 4) & 0x0F), data[33] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1231 1232 1233 |
} break; default: |
632de0672 Refactor code for... |
1234 1235 1236 1237 |
printf ("Command and Address hold %c%d.%d ns ", (data[33] & 0x80) ? '-' : '+', (data[33] >> 4) & 0x07, data[33] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1238 1239 1240 1241 1242 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1243 1244 1245 |
printf ("Data signal input setup 0.%d%d ns ", (data[34] >> 4) & 0x0F, data[34] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1246 1247 |
break; default: |
632de0672 Refactor code for... |
1248 1249 1250 1251 |
printf ("Data signal input setup %c%d.%d ns ", (data[34] & 0x80) ? '-' : '+', (data[34] >> 4) & 0x07, data[34] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1252 1253 1254 1255 1256 |
break; } switch (type) { case DDR2: |
632de0672 Refactor code for... |
1257 1258 1259 |
printf ("Data signal input hold 0.%d%d ns ", (data[35] >> 4) & 0x0F, data[35] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1260 1261 |
break; default: |
632de0672 Refactor code for... |
1262 1263 1264 1265 |
printf ("Data signal input hold %c%d.%d ns ", (data[35] & 0x80) ? '-' : '+', (data[35] >> 4) & 0x07, data[35] & 0x0F); |
0df6b8446 Fix "i2c sdram" c... |
1266 1267 |
break; } |
4b9206ed5 * Patches by Thom... |
1268 |
puts ("Manufacturer's JEDEC ID "); |
e857a5bdb mpc83xx: Miscella... |
1269 |
for (j = 64; j <= 71; j++) |
632de0672 Refactor code for... |
1270 |
printf ("%02X ", data[j]); |
4b9206ed5 * Patches by Thom... |
1271 1272 |
putc (' '); |
632de0672 Refactor code for... |
1273 1274 |
printf ("Manufacturing Location %02X ", data[72]); |
4b9206ed5 * Patches by Thom... |
1275 |
puts ("Manufacturer's Part Number "); |
e857a5bdb mpc83xx: Miscella... |
1276 |
for (j = 73; j <= 90; j++) |
632de0672 Refactor code for... |
1277 |
printf ("%02X ", data[j]); |
4b9206ed5 * Patches by Thom... |
1278 1279 |
putc (' '); |
632de0672 Refactor code for... |
1280 1281 1282 1283 |
printf ("Revision Code %02X %02X ", data[91], data[92]); printf ("Manufacturing Date %02X %02X ", data[93], data[94]); |
4b9206ed5 * Patches by Thom... |
1284 |
puts ("Assembly Serial Number "); |
e857a5bdb mpc83xx: Miscella... |
1285 |
for (j = 95; j <= 98; j++) |
632de0672 Refactor code for... |
1286 |
printf ("%02X ", data[j]); |
4b9206ed5 * Patches by Thom... |
1287 1288 |
putc (' '); |
81a8824f2 Initial revision |
1289 |
|
0df6b8446 Fix "i2c sdram" c... |
1290 |
if (DDR2 != type) { |
632de0672 Refactor code for... |
1291 1292 1293 |
printf ("Speed rating PC%d ", data[126] == 0x66 ? 66 : data[126]); |
0df6b8446 Fix "i2c sdram" c... |
1294 |
} |
81a8824f2 Initial revision |
1295 1296 |
return 0; } |
902531788 common/: Remove l... |
1297 |
#endif |
81a8824f2 Initial revision |
1298 |
|
67b23a322 I2C: adding new "... |
1299 |
#if defined(CONFIG_I2C_MUX) |
54841ab50 Make sure that ar... |
1300 |
static int do_i2c_add_bus(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
67b23a322 I2C: adding new "... |
1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 |
{ int ret=0; if (argc == 1) { /* show all busses */ I2C_MUX *mux; I2C_MUX_DEVICE *device = i2c_mux_devices; printf ("Busses reached over muxes: "); while (device != NULL) { printf ("Bus ID: %x ", device->busid); printf (" reached over Mux(es): "); mux = device->mux; while (mux != NULL) { printf (" %s@%x ch: %x ", mux->name, mux->chip, mux->channel); mux = mux->next; } device = device->next; } } else { |
e8260cb25 common/cmd_i2c.c:... |
1325 |
(void)i2c_mux_ident_muxstring ((uchar *)argv[1]); |
67b23a322 I2C: adding new "... |
1326 1327 1328 1329 1330 |
ret = 0; } return ret; } #endif /* CONFIG_I2C_MUX */ |
bb99ad6d8 Add support for m... |
1331 |
#if defined(CONFIG_I2C_MULTI_BUS) |
54841ab50 Make sure that ar... |
1332 |
static int do_i2c_bus_num(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d8 Add support for m... |
1333 1334 |
{ int bus_idx, ret=0; |
e857a5bdb mpc83xx: Miscella... |
1335 1336 |
if (argc == 1) /* querying current setting */ |
bb99ad6d8 Add support for m... |
1337 1338 |
printf("Current bus is %d ", i2c_get_bus_num()); |
e857a5bdb mpc83xx: Miscella... |
1339 |
else { |
bb99ad6d8 Add support for m... |
1340 1341 1342 1343 |
bus_idx = simple_strtoul(argv[1], NULL, 10); printf("Setting bus to %d ", bus_idx); ret = i2c_set_bus_num(bus_idx); |
e857a5bdb mpc83xx: Miscella... |
1344 |
if (ret) |
bb99ad6d8 Add support for m... |
1345 1346 |
printf("Failure changing bus number (%d) ", ret); |
bb99ad6d8 Add support for m... |
1347 1348 1349 1350 |
} return ret; } #endif /* CONFIG_I2C_MULTI_BUS */ |
54841ab50 Make sure that ar... |
1351 |
static int do_i2c_bus_speed(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d8 Add support for m... |
1352 1353 |
{ int speed, ret=0; |
e857a5bdb mpc83xx: Miscella... |
1354 1355 |
if (argc == 1) /* querying current speed */ |
bb99ad6d8 Add support for m... |
1356 1357 |
printf("Current bus speed=%d ", i2c_get_bus_speed()); |
e857a5bdb mpc83xx: Miscella... |
1358 |
else { |
bb99ad6d8 Add support for m... |
1359 1360 1361 1362 |
speed = simple_strtoul(argv[1], NULL, 10); printf("Setting bus speed to %d Hz ", speed); ret = i2c_set_bus_speed(speed); |
e857a5bdb mpc83xx: Miscella... |
1363 |
if (ret) |
bb99ad6d8 Add support for m... |
1364 1365 |
printf("Failure changing bus speed (%d) ", ret); |
bb99ad6d8 Add support for m... |
1366 1367 1368 |
} return ret; } |
54841ab50 Make sure that ar... |
1369 |
static int do_i2c_mm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bb99ad6d8 Add support for m... |
1370 |
{ |
bfc3b77eb cmd_i2c.c: rework... |
1371 1372 |
return mod_i2c_mem (cmdtp, 1, flag, argc, argv); } |
54841ab50 Make sure that ar... |
1373 |
static int do_i2c_nm(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77eb cmd_i2c.c: rework... |
1374 1375 1376 |
{ return mod_i2c_mem (cmdtp, 0, flag, argc, argv); } |
e96ad5d3a cmd_i2c: Clean up... |
1377 |
|
54841ab50 Make sure that ar... |
1378 |
static int do_i2c_reset(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77eb cmd_i2c.c: rework... |
1379 1380 1381 1382 1383 1384 |
{ i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 0; } static cmd_tbl_t cmd_i2c_sub[] = { |
67b23a322 I2C: adding new "... |
1385 |
#if defined(CONFIG_I2C_MUX) |
bfc3b77eb cmd_i2c.c: rework... |
1386 |
U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_add_bus, "", ""), |
67b23a322 I2C: adding new "... |
1387 |
#endif /* CONFIG_I2C_MUX */ |
bfc3b77eb cmd_i2c.c: rework... |
1388 |
U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""), |
bb99ad6d8 Add support for m... |
1389 |
#if defined(CONFIG_I2C_MULTI_BUS) |
bfc3b77eb cmd_i2c.c: rework... |
1390 |
U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""), |
bb99ad6d8 Add support for m... |
1391 |
#endif /* CONFIG_I2C_MULTI_BUS */ |
bfc3b77eb cmd_i2c.c: rework... |
1392 1393 1394 1395 1396 1397 |
U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""), U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""), U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""), U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""), U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""), U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""), |
652e53546 cmd_i2c.c: added ... |
1398 |
U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""), |
bfc3b77eb cmd_i2c.c: rework... |
1399 |
U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""), |
c76fe4742 common/cmd_[i-n]*... |
1400 |
#if defined(CONFIG_CMD_SDRAM) |
bfc3b77eb cmd_i2c.c: rework... |
1401 |
U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""), |
902531788 common/: Remove l... |
1402 |
#endif |
bfc3b77eb cmd_i2c.c: rework... |
1403 1404 |
U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""), }; |
2e5167cca Replace CONFIG_RE... |
1405 |
#ifdef CONFIG_NEEDS_MANUAL_RELOC |
f1d2b313c ARM: add relocati... |
1406 1407 1408 1409 |
void i2c_reloc(void) { fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub)); } #endif |
54841ab50 Make sure that ar... |
1410 |
static int do_i2c(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) |
bfc3b77eb cmd_i2c.c: rework... |
1411 1412 |
{ cmd_tbl_t *c; |
4444b221f i2c: fix command ... |
1413 |
if (argc < 2) |
4c12eeb8b Convert cmd_usage... |
1414 |
return CMD_RET_USAGE; |
4444b221f i2c: fix command ... |
1415 |
|
bfc3b77eb cmd_i2c.c: rework... |
1416 1417 1418 1419 1420 |
/* Strip off leading 'i2c' command argument */ argc--; argv++; c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub)); |
47e26b1bf cmd_usage(): simp... |
1421 |
if (c) |
4c12eeb8b Convert cmd_usage... |
1422 |
return c->cmd(cmdtp, flag, argc, argv); |
47e26b1bf cmd_usage(): simp... |
1423 |
else |
4c12eeb8b Convert cmd_usage... |
1424 |
return CMD_RET_USAGE; |
bb99ad6d8 Add support for m... |
1425 |
} |
8bde7f776 * Code cleanup: |
1426 1427 |
/***************************************************/ |
d9fc70324 [PATCH] I2C: disa... |
1428 1429 |
U_BOOT_CMD( i2c, 6, 1, do_i2c, |
2fb2604d5 Command usage cle... |
1430 |
"I2C sub-system", |
67b23a322 I2C: adding new "... |
1431 |
#if defined(CONFIG_I2C_MUX) |
fb0070e91 cmd_i2c.c: sorted... |
1432 1433 |
"bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes i2c " |
67b23a322 I2C: adding new "... |
1434 |
#endif /* CONFIG_I2C_MUX */ |
fb0070e91 cmd_i2c.c: sorted... |
1435 1436 |
"crc32 chip address[.0, .1, .2] count - compute CRC32 checksum " |
d9fc70324 [PATCH] I2C: disa... |
1437 |
#if defined(CONFIG_I2C_MULTI_BUS) |
9bc2e4eee cmd_i2c: Fix help... |
1438 1439 |
"i2c dev [dev] - show or set current I2C bus " |
d9fc70324 [PATCH] I2C: disa... |
1440 |
#endif /* CONFIG_I2C_MULTI_BUS */ |
fb0070e91 cmd_i2c.c: sorted... |
1441 1442 |
"i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device " |
d9fc70324 [PATCH] I2C: disa... |
1443 1444 1445 1446 1447 1448 1449 1450 |
"i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device " "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing) " "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill) " "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address) " |
d9fc70324 [PATCH] I2C: disa... |
1451 1452 |
"i2c probe - show devices on the I2C bus " |
652e53546 cmd_i2c.c: added ... |
1453 1454 |
"i2c read chip address[.0, .1, .2] length memaddress - read to memory " |
e43a27c49 I2C: add new comm... |
1455 1456 |
"i2c reset - re-init the I2C Controller " |
c76fe4742 common/cmd_[i-n]*... |
1457 |
#if defined(CONFIG_CMD_SDRAM) |
fb0070e91 cmd_i2c.c: sorted... |
1458 1459 |
"i2c sdram chip - print SDRAM configuration information " |
902531788 common/: Remove l... |
1460 |
#endif |
fb0070e91 cmd_i2c.c: sorted... |
1461 |
"i2c speed [speed] - show or set I2C bus speed" |
d9fc70324 [PATCH] I2C: disa... |
1462 |
); |
67b23a322 I2C: adding new "... |
1463 1464 |
#if defined(CONFIG_I2C_MUX) |
fd03ea896 i2c: made unused ... |
1465 |
static int i2c_mux_add_device(I2C_MUX_DEVICE *dev) |
67b23a322 I2C: adding new "... |
1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 |
{ I2C_MUX_DEVICE *devtmp = i2c_mux_devices; if (i2c_mux_devices == NULL) { i2c_mux_devices = dev; return 0; } while (devtmp->next != NULL) devtmp = devtmp->next; devtmp->next = dev; return 0; } I2C_MUX_DEVICE *i2c_mux_search_device(int id) { I2C_MUX_DEVICE *device = i2c_mux_devices; while (device != NULL) { if (device->busid == id) return device; device = device->next; } return NULL; } /* searches in the buf from *pos the next ':'. * returns: * 0 if found (with *pos = where) * < 0 if an error occured * > 0 if the end of buf is reached */ static int i2c_mux_search_next (int *pos, uchar *buf, int len) { while ((buf[*pos] != ':') && (*pos < len)) { *pos += 1; } if (*pos >= len) return 1; if (buf[*pos] != ':') return -1; return 0; } static int i2c_mux_get_busid (void) { int tmp = i2c_mux_busid; i2c_mux_busid ++; return tmp; } |
f9a78b8d4 cosmetic: spell f... |
1517 1518 |
/* Analyses a Muxstring and immediately sends the commands to the muxes. Runs from flash. |
67b23a322 I2C: adding new "... |
1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 |
*/ int i2c_mux_ident_muxstring_f (uchar *buf) { int pos = 0; int oldpos; int ret = 0; int len = strlen((char *)buf); int chip; uchar channel; int was = 0; while (ret == 0) { oldpos = pos; /* search name */ ret = i2c_mux_search_next(&pos, buf, len); if (ret != 0) printf ("ERROR "); /* search address */ pos ++; oldpos = pos; ret = i2c_mux_search_next(&pos, buf, len); if (ret != 0) printf ("ERROR "); buf[pos] = 0; chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); buf[pos] = ':'; /* search channel */ pos ++; oldpos = pos; ret = i2c_mux_search_next(&pos, buf, len); if (ret < 0) printf ("ERROR "); was = 0; if (buf[pos] != 0) { buf[pos] = 0; was = 1; } channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); if (was) buf[pos] = ':'; if (i2c_write(chip, 0, 0, &channel, 1) != 0) { printf ("Error setting Mux: chip:%x channel: \ %x ", chip, channel); return -1; } pos ++; oldpos = pos; } return 0; } /* Analyses a Muxstring and if this String is correct * adds a new I2C Bus. */ I2C_MUX_DEVICE *i2c_mux_ident_muxstring (uchar *buf) { I2C_MUX_DEVICE *device; I2C_MUX *mux; int pos = 0; int oldpos; int ret = 0; int len = strlen((char *)buf); int was = 0; device = (I2C_MUX_DEVICE *)malloc (sizeof(I2C_MUX_DEVICE)); device->mux = NULL; device->busid = i2c_mux_get_busid (); device->next = NULL; while (ret == 0) { mux = (I2C_MUX *)malloc (sizeof(I2C_MUX)); mux->next = NULL; /* search name of mux */ oldpos = pos; ret = i2c_mux_search_next(&pos, buf, len); if (ret != 0) printf ("%s no name. ", __FUNCTION__); mux->name = (char *)malloc (pos - oldpos + 1); memcpy (mux->name, &buf[oldpos], pos - oldpos); mux->name[pos - oldpos] = 0; /* search address */ pos ++; oldpos = pos; ret = i2c_mux_search_next(&pos, buf, len); if (ret != 0) printf ("%s no mux address. ", __FUNCTION__); buf[pos] = 0; mux->chip = simple_strtoul((char *)&buf[oldpos], NULL, 16); buf[pos] = ':'; /* search channel */ pos ++; oldpos = pos; ret = i2c_mux_search_next(&pos, buf, len); if (ret < 0) printf ("%s no mux channel. ", __FUNCTION__); was = 0; if (buf[pos] != 0) { buf[pos] = 0; was = 1; } mux->channel = simple_strtoul((char *)&buf[oldpos], NULL, 16); if (was) buf[pos] = ':'; if (device->mux == NULL) device->mux = mux; else { I2C_MUX *muxtmp = device->mux; while (muxtmp->next != NULL) { muxtmp = muxtmp->next; } muxtmp->next = mux; } pos ++; oldpos = pos; } if (ret > 0) { /* Add Device */ i2c_mux_add_device (device); return device; } return NULL; } int i2x_mux_select_mux(int bus) { I2C_MUX_DEVICE *dev; I2C_MUX *mux; if ((gd->flags & GD_FLG_RELOC) != GD_FLG_RELOC) { /* select Default Mux Bus */ |
6d0f6bcf3 rename CFG_ macro... |
1658 1659 |
#if defined(CONFIG_SYS_I2C_IVM_BUS) i2c_mux_ident_muxstring_f ((uchar *)CONFIG_SYS_I2C_IVM_BUS); |
67b23a322 I2C: adding new "... |
1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 |
#else { unsigned char *buf; buf = (unsigned char *) getenv("EEprom_ivm"); if (buf != NULL) i2c_mux_ident_muxstring_f (buf); } #endif return 0; } dev = i2c_mux_search_device(bus); if (dev == NULL) return -1; mux = dev->mux; while (mux != NULL) { |
c649dda53 i2c: add i2c debl... |
1676 1677 |
/* do deblocking on each level of mux, before mux config */ i2c_init_board(); |
67b23a322 I2C: adding new "... |
1678 1679 1680 1681 1682 1683 1684 1685 |
if (i2c_write(mux->chip, 0, 0, &mux->channel, 1) != 0) { printf ("Error setting Mux: chip:%x channel: \ %x ", mux->chip, mux->channel); return -1; } mux = mux->next; } |
c649dda53 i2c: add i2c debl... |
1686 1687 |
/* do deblocking on each level of mux and after mux config */ i2c_init_board(); |
67b23a322 I2C: adding new "... |
1688 1689 1690 |
return 0; } #endif /* CONFIG_I2C_MUX */ |